HAF2017(L), HAF2017(S) Silicon N Channel Power MOS FET Power Switching REJ03G0234-0200Z (Previous ADE-208-1637 (Z)) Rev.2.00 Apr.13.2004 Descriptions This FET has the over temperature shutdown capability sensing the junction temperature. This FET has the built-in over temperature shutdown circuit in the gate area. And this circuit operation to shutdown the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. Features • • • • Logic level operation (4 to 6 V Gate drive) High endurance capability against to the short circuit Built-in the over temperature shutdown circuit Latch type shutdown operation (Need 0 voltage recovery) Outline D LDPAK(L) LDPAK(S)-1 4 4 Gate Resistor G Temperature Sensing Circuit Latch Circuit Gate Shutdown Circuit 1 1 S Rev.2.00, Apr.13.2004, page 1 of 8 2 3 2 3 1. Gate 2. Drain 3. Source 4. Drain HAF2017(L), HAF2017(S) Absolute Maximum Ratings (Ta = 25°C) Item Symbol Rating Unit Drain to source voltage Gate to source voltage Gate to source voltage Drain current VDSS VGSS VGSS ID 60 16 –2.5 20 V V V A Drain peak current Body-drain diode reverse drain current Channel dissipation Channel temperature Storage temperature ID (pulse) IDR PchNote2 Tch Tstg 40 20 50 150 –55 to +150 A A W °C °C Note1 Notes: 1. PW ≤ 10µs, duty cycle ≤ 1% 2. Value at Tch = 25°C Typical Operation Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Input voltage VIH Input voltage Input current (Gate non shut down) Input current (Gate non shut down) Input current (Gate non shut down) Input current (Gate shut down) Input current (Gate shut down) Shutdown temperature Gate operation voltage VIL IIH1 IIH2 IIL IIH(sd)1 IIH(sd)2 Tsd VOP 3.5 — — — — — — — 3.5 — — — — — 0.8 0.35 175 — — 1.2 100 50 1 — — — 12 V V µA µA µA mA mA °C V Rev.2.00, Apr.13.2004, page 2 of 8 Test Conditions Vi = 8V, VDS =0 Vi = 3.5V, VDS =0 Vi = 1.2V, VDS =0 Vi = 8V, VDS =0 Vi = 3.5V, VDS =0 Channel temperature HAF2017(L), HAF2017(S) Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test conditions Darin current Darin current Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current ID1 ID2 V(BR)DSS V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(OP)1 IGS(OP)2 IDSS VGS(off) |yfs| RDS(on) RDS(on) Coss td(on) tr td(off) tf VDF trr 1 — 60 16 –2.5 — — — — — — — 1.4 6 — — — — — — — — — — — — — — — — — — 0.8 0.35 — — 21 35 27 460 8.7 44.6 2 2.6 0.9 120 — 10 — — — 100 50 1 –100 — — 10 2.6 — 53 43 ― ― — ― — — — A mA V V V µA µA µA µA mA mA µA V S mΩ mΩ pF µs µs µs µs V ns VGS = 3.5 V, VDS = 2 V VGS = 1.2 V, VDS = 2 V ID = 10 mA, VGS =0 IG = 800 µA, VDS =0 IG = –100 µA, VDS =0 VGS = 8 V, VDS =0 VGS = 3.5 V, VDS =0 VGS = 1.2 V, VDS =0 VGS = –2.4 V, VDS =0 VGS = 8 V, VDS =0 VGS = 3.5 V, VDS =0 VDS = 60 V, VGS = 0 VDS = 10 V, ID = 1 mA ID =10 A, VDS =10 VNote3 ID = 10 A, VGS = 4.5 VNote3 ID = 10 A, VGS = 10 VNote3 VDS = 10 V, VGS =0, f = 1 MHz VGS = 5 V, ID= 10 A, RL = 3 Ω tos1 tos2 — — 0.97 0.57 — — ms ms Input current (shut down) Zero gate voltage drain current Gate to source cutoff voltage Forward transfer admittance Static drain to source on state resistance Output capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Over load shut down operation timeNote4 IF = 20A, VGS = 0 IF = 20 A, VGS = 0, diF/dt = 50 A/µs VGS = 5 V, VDD = 16 V VGS = 5 V, VDD = 24 V Notes: 3. Pulse test 4. Include the time shift based on increasing of channel temperature when operate under over load condition. Rev.2.00, Apr.13.2004, page 3 of 8 HAF2017(L), HAF2017(S) Main Characteristics Power vs. Temperature Derating Thermal shut down operation area 60 40 20 0 50 100 150 100 10 50 0 20 1 10 0.5 Ta = 25°C 0.3 0.5 1 2 VDS = 10 V Pulse Test 5V 4V 20 VGS = 3.5 V 10 2 4 6 Drain to Source Voltage Drain to Source Saturation Voltage VDS(on) (V) Pulse Test 0.8 ID = 20 A 0.6 0.4 10 A 0.2 5A 2 4 6 Gate to Source Voltage Rev.2.00, Apr.13.2004, page 4 of 8 8 10 VGS (V) 30 Tc = -25°C 25°C 20 75°C 10 0 8 10 VDS (V) Drain Source Saturation Voltage vs. Gate to Source Voltage 1.0 Drain Current ID (A) 6V Static Drain to Source On State Resistance RDS(on) (mΩ) Drain Current ID (A) 40 30 0 50 100 Typical Transfer Characteristics 40 0 10 20 50 Pulse Test 8V 5 Drain to Source voltage VDS (V) Typical Output Characteristics 10 V m s Case Temperature Tc (°C) 50 µs PW DC = 1 0 (T O c = pe ms 25 ratio °C ) n 5 Operation in this area 2 is limited RDS(on) 1 200 µs Drain Current ID (A) 200 10 Channel Dissipation Pch (W) Maximum Safe Operation Area 500 80 2 4 6 8 10 Gate to Source Voltage VGS (V) Static Drain to Source State Resistance vs. Drain Current 1000 300 100 VGS = 4.5 V 30 VGS = 10 V 10 3 Pulse Test 1 0.1 0.3 1 3 10 30 Drain Current ID (A) 100 Static Drain to Source on State Resistance vs. Temperature 100 Pulse Test 80 ID = 20 A 10 A 60 40 5A VGS = 4.5 V 20 0 -25 ID = 20 A 5A 10 A VGS = 10 V 0 25 50 75 Forward Transfer Admittance |yfs| (S) Static Drain to Source On State Resistance RDS(on) (mΩ) HAF2017(L), HAF2017(S) 100 125 150 Case Temperature Forward Transfer Admittance vs. Drain Current 100 VDS = 10 V Pulse Teat 10 25°C 1 75°C 0.1 0.01 0.01 100 Switching Characteristics Switching Time t (µs) di / dt = 50 A / µs V GS = 0, Ta = 25°C 100 50 V GS = 5 V, V DD = 30 V 50 PW = 300 µs, duty < 1 % tr 20 t d(on) 10 5 tf 20 2 10 0.1 1 0.1 0.3 1 3 10 30 100 Reverse Drain Current IDR (A) Reverse Drain Current vs. Source to Drain Voltage t d(off) 0.3 1 3 10 30 Drain Current ID (A) 100 Typical Capacitance vs. Drain to Source Voltage 10000 Pulse Test 40 Capacitance C (pF) Reverse Recovery Time trr (ns) 10 100 200 Reverse Drain Current IDR (A) 1 Drain Current ID (A) 1000 50 0.1 Tc (°C) Body-Drain Diode Reverse Recovery Time 500 Tc = -25°C 30 VGS = 0 V 20 10 0 10 V 1000 Coss 100 5V VGS = 0 f = 1 MHz 10 0.4 0.8 1.2 Source to Drain Voltage Rev.2.00, Apr.13.2004, page 5 of 8 1.6 2.0 VDS (V) 0 10 20 30 40 50 60 Drain to Source Voltage VDS (V) HAF2017(L), HAF2017(S) Gate to Source Voltage vs. Shutdown Time of Load-Short Test Shutdown Case Temperature vs. Gate to Source Voltage 200 10 VDD = 16 V 24 V 5 0 100µ 1m 10m 100m Shutdown Case Temperature Tc (°C) Gate to Source Voltage VGS (V) 12 Shutdown Time of Load-Short Test Pw (S) 180 160 140 120 ID = 5 A 100 0 2 4 6 8 Gate to Source Voltage 10 VGS (V) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 1 Tc = 25°C D=1 0.5 0.3 0.2 0.1 0.1 θch - c(t) = γs (t) • θch - c θch - c = 2.5°C/W, Tc = 25°C 0.05 0.02 0.03 PDM 1 e 0.0 uls tp o h 1s 0.01 10 µ 100 µ PW T PW T 1m 10 m Pulse Width PW (S) Rev.2.00, Apr.13.2004, page 6 of 8 D= 100 m 1 10 HAF2017(L), HAF2017(S) Package Dimensions As of January, 2003 Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 (1.4) 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 0.4 ± 0.1 Package Code JEDEC JEITA Mass (reference value) LDPAK (L) — — 1.40 g As of January, 2003 Unit: mm (1.5) 10.0 2.49 ± 0.2 0.2 0.1 +– 0.1 7.8 7.0 + 0.3 – 0.5 8.6 ± 0.3 (1.5) 7.8 6.6 1.3 ± 0.15 1.7 (1.4) 4.44 ± 0.2 10.2 ± 0.3 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 1.3 ± 0.2 Package Code JEDEC JEITA Mass (reference value) Rev.2.00, Apr.13.2004, page 7 of 8 LDPAK (S)-(1) — — 1.30 g HAF2017(L), HAF2017(S) Ordering Information Part Name Quantity Shipping Container HAF2017-90L HAF2017-90S HAF2017-90STL HAF2017-90STR Max: 50 pcs/ sack Max: 50 pcs/ sack 1000 pcs/ Reel 1000 pcs/ Reel Sack Sack Embossed tape Embossed tape Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00, Apr.13.2004, page 8 of 8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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