High Reliability Serial EEPROMs WL-CSP EEPROM family Microwire Bus BU9891GUL-W No.10001EAT10 ●Description BU9891GUL-W is serial EEPROM of serial 3-line interface method ●Features 1) 3-line communications of chip select, serial clock, serial data input / output (the case where input and output are shared) 2) Actions available at high speed 2MHz clock (2.5~5.5V) 3) Speed write available (write time 5ms max.) 4) 1.7~5.5V single power source action 5) Address auto increment function at read action 6) Write mistake prevention function Write prohibition at power on Write prohibition by command code Write mistake prevention function at low voltage 7) Program cycle auto delete and auto end function 8) Program condition display by READY / BUSY 9) Low current consumption At write action (at 5V): 1.2mA (Typ.) At read action (at 5V): 0.3mA (Typ.) At standby action (at 5V): 0.1μA (Typ.) (CMOS input) 10) Data retention for 40 years 11) Data rewrite up to 100,000 times 12) Data at shipment all addresses FFFFh Capacity Bit format Type Power source voltage Package type 4Kbit 256×16 BU9891GUL-W 1.7~5.5V VCSP50L1 ●Absolute Maximum Ratings(Ta=25℃) Parameter Symbol Ratings Unit VCC -0.3~+6.5 V Pd 220 (VCSP50L1 ) *1 mW Storage temperature range Tstg -65~+125 ℃ Action temperature range Topr -40~+85 ℃ ‐ -0.3~VCC+0.3 V Impressed voltage Permissible dissipation Terminal voltage * When using at Ta=25℃ or higher, 2.2mW (to be reduced per 1℃. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Recommended action conditions Parameter Symbol Ratings VCC 1.7~5.5 VIN 0~VCC Power source voltage Unit V Input voltage ●Memory cell characteristics (VCC=1.7~5.5V) Limit Parameter Number of data rewrite times *1 Data hold years *1 Unit Condition Min. Typ. Max. 100,000 - - Times Ta=25℃ 40 - - Years Ta=25℃ ○Shipment data all address FFFFh *1 Not 100% TESTED ●Electrical characteristics (Unless otherwise specified, VCC=1.7~5.5V, Ta=-40~+85℃) Limits Symbol Parameter Min. Typ. Max. Unit Condition “L” input voltage 1 VIL1 -0.3 - 0.2×VCC V “H” input voltage 1 VIH1 0.8×VCC - VCC+0.3 V “L” output voltage 1 VOL1 0 - 0.4 V IOL=2.1mA, 4.0V≦VCC≦5.5V “L” output voltage 2 VOL2 0 - 0.2 V IOL=100μA “H” output voltage 1 VOH1 2.4 - VCC V IOH=-0.4mA, 4.0V≦VCC≦5.5V “H” output voltage 2 VOH2 VCC-0.2 - VCC V IOH=-100μA Input leak current ILI -1 - +1 µA VIN=0V~VCC Output leak current ILO -1 - +1 µA VOUT=0V~VCC, CS=0V ICC1 - - 3.0 mA fSK=2MHz, tE/W=5ms (WRITE) ICC2 - - 1.5 mA fSK=2MHz (READ) ISB - - 2 µA CS=0V, DO=OPEN Current consumption at action Standby current ◎Radiation resistance design is not made. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Action timing characteristics (Ta=-40~+85℃, VCC=2.5~5.5V) Parameter Symbol SK frequency SK “H” time SK “L” time CS “L” time CS setup time DI setup time CS hold time DI hold time Data “1” output delay time Data “0” output delay time Time from CS to output establishment Time from CS to High-Z Write cycle time Min. 230 230 200 200 100 0 100 - fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 tSV tDF tE/W 2.5V≦VCC≦5.5V Typ. Max. 2 200 200 150 150 5 Unit MHz ns ns ns ns ns ns ns ns ns ns ns ms (Ta=-40~+85℃, VCC=1.7~2.5V) Parameter 1.7V≦VCC≦2.5V Min. Typ. Max. 500 0.8 0.8 1 200 100 0 100 0.7 0.7 0.7 200 5 Symbol SK frequency SK “H” time SK “L” time CS “L” time CS setup time DI setup time CS hold time DI hold time Data “1” output delay time Data “0” output delay time Time from CS to output establishment Time from CS to High-Z Write cycle time fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 tSV tDF tE/W Unit kHz us us us ns ns ns ns us us us ns ms ●Sync data input / output timing CS tCSS tSKH tSKL tCSH SK tDIS tDI H DI tPD1 t PD0 DO(READ) tDF DO(WRITE) STATUS VALID Fig.1 Sync data input / output timing ○Data is taken by DI sync with the rise of SK. ○At read action, data is output from DO in sync with the rise of SK. ○The status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area DO where CS is “H”, and valid until the next command start bit is input. And, while CS is “L”, DO becomes High-Z. ○After completion of each mode execution, set CS “L” once for internal circuit reset, and execute the following action mode. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●BU9891GUL-W Characteristic data (The following characteristic data are Typ. values.) 6 6 Ta=-40℃ Ta=25℃ Ta=85℃ 5 5 4 VOL[V] 3 Ta=-40℃ Ta=25℃ Ta=85℃ 0.8 SPEC VIL[V] VIH[V] 4 1 Ta=-40℃ Ta=25℃ Ta=85℃ 3 2 0.6 0.4 2 SPEC 1 0.2 SPEC 1 0 0 0 0 1 2 3 4 5 1 2 3 4 5 6 0 VCC[V] 6 0 1 2 VCC[V] Fig.2 H input voltage VIL(CS,SK,DI) Fig.3 L input voltage VIL(CS,SK,DI) 1 5 5 Ta=-40℃ Ta=25℃ Ta=85℃ 0.8 0.6 0.4 Ta=-40℃ Ta=25℃ Ta=85℃ 4 3 VOH[V] 0.6 VOL[V] VOL[V] 4 Fig.4 L output voltage VOL-IOL(Vcc=1.8V) 1 Ta=-40℃ Ta=25℃ Ta=85℃ 0.8 3 IOL[mA] SPEC 2 0.4 SPEC 0.2 0 0 0 0 1 2 3 4 5 0 2 3 4 Fig.5 L output voltage VOL-IOL(Vcc=2.5V) Fig.6 L output voltage VOL-IOL(Vcc=4.0V) SPEC Ta=-40℃ Ta=25℃ Ta=85℃ 1 0 0.8 IOH[mA] 1.2 ILI[μA] VOH[V] SPEC 2 1 0.2 0.4 0.8 1.2 1.6 0 1 2 IOH[mA] 5 1 3 Ta=-40℃ Ta=25℃ Ta=85℃ 2 0 3 4 5 6 VCC[V] Fig.11 Output leak current ILO (DO) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Ta=-40℃ Ta=25℃ Ta=85℃ 1 0 0 2 1.5 0.5 1 0.2 6 SPEC ICC2(READ)[mA] ICC1(WRITE)[mA] 0.4 5 fSK=2MHz DATA=0000h 2 SPEC 0.6 4 2.5 fSK=2MHz DATA=0000h 4 Ta=-40℃ Ta=25℃ Ta=85℃ 3 VCC[V] Fig.10 Input leak current ILI(CS,SK,DI) Fig.9 H output voltage VOH-IOH(Vcc=4.0V) SPEC 1 0.6 0 0 1.2 0 Ta=-40℃ Ta=25℃ Ta=85℃ 0.4 0 1.6 Fig.8 H output voltage VOH-IOH(Vcc=2.5V) 0.8 1.6 1 4 SPEC 0.4 1.2 1.2 0.8 0 0.8 Fig.7 H output voltage VOH-IOH(Vcc=1.8V) 3 2 0.4 IOH[mA] 5 Ta=-40℃ Ta=25℃ Ta=85℃ 3 VOH[V] 0 5 IOL[mA] 4 ILO[μA] 1 IOL[mA] 5 SPEC 1 0.2 0 1 2 3 4 5 6 VCC[V] Fig.12 Current consumption at WRITE action ICC1 (WRITE, fSK=2MHz) 4/17 0 1 2 3 4 5 6 VCC[V] Fig.13 Consumption current at READ action ICC2 (READ, fSK=2MHz) 2010.07 - Rev.A Technical Note BU9891GUL-W ● BU9891GUL-W Characteristic data (The following characteristic data are Typ. values.) 2.5 5 fSK=500kHz DATA=0000h 2 SPEC ICC2(READ)[mA] ICC1(WRITE)[mA] SPEC 3 Ta=-40℃ Ta=25℃ Ta=85℃ 2 SPEC 2 1.5 ISB[μA] 4 2.5 fSK=500kHz DATA=0000h Ta=-40℃ Ta=25℃ Ta=85℃ 1 0.5 Ta=-40℃ Ta=25℃ Ta=85℃ 1.5 1 0.5 1 0 0 0 0 1 2 3 VCC[V] 4 5 1 2 3 VCC[V] 6 Fig.14 Current consumption at WRITE action 4 5 0 6 0 Fig.15 Consumption current at READ action ICC2 (READ, fSK=500kHz) 100 1 2 SPEC 0.4 Ta=-40℃ Ta=25℃ Ta=85℃ 0.6 0.4 SPEC SPEC Ta=-40℃ Ta=25℃ Ta=85℃ 0.1 Ta=-40℃ Ta=25℃ Ta=85℃ 0.6 tSKL[μs] tSKH [μs] fSK[MHz] SPEC 6 0.8 0.8 SPEC 5 1 SPEC 1 4 Fig.16 Consumption current at standby action ISB 1 10 3 VCC[V] 0.2 0.2 0 0 0 0.01 0 1 VCC[V] 3 VCC[V] Fig.17 SK frequency fSK Fig.18 SK high time tSKH 2 3 4 5 0 6 1 4 5 Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 4 5 6 200 Ta=-40℃ Ta=25℃ Ta=85℃ 0.8 tCSH[ns] 3 VCC[V] 300 0 0.6 2 Fig.19 SK low time tSKL -50 SPEC tCSS[ns] 1 1 6 50 1.2 tCS[μs] 2 -100 SPEC Ta=-40℃ Ta=25℃ Ta=85℃ 100 0 0.4 SPEC -150 -100 0.2 -200 0 0 1 2 3 VCC[V] 4 5 0 6 1 2 3 4 5 6 -200 0 1 2 3 VCC[V] VCC[V] Fig.20 CS low time tCS Fig.21 CS hold time tCSH Ta=-40℃ Ta=25℃ Ta=85℃ 100 Ta=-40℃ Ta=25℃ Ta=85℃ 0 SPEC Ta=-40℃ Ta=25℃ Ta=85℃ 50 tPD0 [μs] tDIS[ns] tDIH[ns] SPEC 50 2 0.4 0.2 0 -50 1 SPEC 0.6 SPEC 0 -50 0 6 1 0.8 100 5 Fig.22 CS setup time tCSS 150 150 4 3 4 5 6 VCC[V] Fig.23 DI hold time tDIH www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 0 1 2 3 4 5 6 0 1 2 3 VCC[V] 4 5 6 VCC[V] Fig.24 DI setup time tDIS 5/17 Fig.25 Data “0” output delay time tPD0 2010.07 - Rev.A Technical Note BU9891GUL-W Characteristic data (The following characteristic data are Typ. values.) ●BU9891GUL-W 1 1 Ta=-40℃ Ta=25℃ Ta=85℃ 0.8 SPEC SPEC SPEC 0.6 tDF [ns] 0.6 0.4 0.4 SPEC 0.2 2 3 4 5 100 50 0 0 1 SPEC 150 SPEC 0.2 0 Ta=-40℃ Ta=25℃ Ta=85℃ 200 tSV[μs] tPD1 [μs] 0.8 250 Ta=-40℃ Ta=25℃ Ta=85℃ 6 VCC[V] Fig.26 Output data “1” delay time tPD1 0 0 1 2 3 VCC[V] 4 5 6 Fig.27 Time from CS to output establishment tSV 0 1 2 3 VCC[V] 4 5 6 Fig.28 Time from CS to High-Z tDF 6 SPEC 5 tE/W[ms] 4 3 Ta=-40℃ Ta=25℃ Ta=85℃ 2 1 0 0 1 2 3 4 5 6 VCC[V] Fig.29 Write cycle time tE/W www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Block diagram CS Power source voltage detection Command decode Control SK DI DO Clock generation High voltage occurrence Write prohibition Address buffer Command register Address decoder 8bit Data register R/W amplifier 16bit 8bit 4,096 bit EEPROM 16bit Dummy bit Fig.30 Block diagram ●Pin assignment and function B B1 B2 (SK) A B3 (GND) A1 A2 (DI) (DO) 1 2 (CS) A3 (Vcc) 3 Fig.31 Pin assignment diagram Land No. Pin Name I/O A1 DI INPUT Start Bit, Op.code, Address, Serial Data Input A2 DO OUTPUT Serial Data Output, Ready/Busy Status Output A3 Vcc - B1 SK INPUT B2 GND - Grand (0V) B3 CS INPUT Chip Select www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Function Power Supply Serial Data Clock Input 7/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Description of operations Communications of the Microwire Bus are carried out by SK (serial clock), DI (serial data input),DO (serial data output) ,and CS (chip select) for device selection. When to connect one EEPROM to a microcontroller, connect it as shown in Fig.32(a) or Fig.32(b). When to use the input and output common I/O port of the microcontroller, connect DI and DO via a resistor as shown in Fig.32(b), and connection by 3 lines is available. In the case of plural connections, refer to Fig. 32 (c). Microcontroller BU9891GUL-W SK SK SK SK DO DI DO DI DI DO CS2 CS1 CS0 SK DO DI CS DO Fig.32-(a) Connection by 4 lines Fig.32-(b) Connection by 3 lines CS SK DI DO CS Microcontroller CS CS SK DI DO BU9891GUL-W CS SK DI DO Microcontroller CS Device 1 Device 2 Device 3 Fig.32-(c) Connection example of plural devices Fig.32 Connection method with microcontroller Communications of the Microwire Bus are started by the first “1” input after the rise of CS. This input is called a start bit. After input of the start bit, inputs ope code, address and data. Address and data are input all in MSB first manners. “0” input after the rise of CS to the start bit input is all ignored. Therefore, when there is limitation in the bit width of PIO of the microcontroller, input “0” before the start bit input, to control the bit width. ●Command mode Command Read (READ) *1 Write enable (WEN) Write (WRITE) *2 Write disable (WDS) Start bit Ope code Address Data 1 10 A7,A6,A5,A4,A3,A2,A1,A0 D15~D0(READ DATA) 1 00 1 01 1 00 1 1 * * * * * * A7,A6,A5,A4,A3,A2,A1,A0 0 0 * * * D15~D0(WRITE DATA) * * * ・ Input the address and the data in MSB first manners. ・ As for *, input either VIH or VIL. *Start bit Acceptance of all the commands of this IC starts at recognition of the start bit. The start bit means the first “1” input after the rise of CS. *1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and address data in significant order are sequentially output continuously. (Auto increment function) *2 When the read and the write all commands are executed, data written in the selected memory cell is automatically deleted, and input data is written. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Timing chart 1) Read cycle (READ) ～ ～ ～ ～ ～ ～ CS ～ ～ *1 1 4 27 28 ～ ～ DI 2 ～ ～ 1 ～ ～ SK 0 A7 A1 ～ ～ 1 A0 *2 D0 D1 D15 D14 ～ ～ D14 ～ ～ D15 ～ ～ ～ ～ ～ ～ 0 DO High-Z *1 Start bit When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is recognized as a start bit, and the following operation is started. This is common to all the commands to described hereafter. Fig. 33 Read cycle ○When the read command is recognized, input address data (16bit) is output to serial. And at that moment, at taking A0, in sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync with the rise of SK. This IC has an address auto increment function valid only at read command. This is the function where after the above read execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the auto increment, keep CS at “H”. ～ ～ ～ ～ ～ ～ 2) Write cycle (WRITE) tCS CS ～ ～ A1 A0 D15 D14 D1 D0 ～ ～ A7 ～ ～ 1 ～ ～ 0 ～ ～ 1 27 4 ～ ～ DI 2 ～ ～ 1 ～ ～ ～ ～ SK STATUS tSV BUSY READY ～ ～ DO High-Z tE/W Fig.34 Write cycle ○In this command, input 16bit data (D15~D0) are written to designated addresses (Am~A0). The actual write starts by the fall of CS of D0 taken SK clock. When STATUS is not detected, (CS=”L” fixed) Max. 5ms in conformity with tE/W, and when STATUS is detected (CS=”H”), all commands are not accepted for areas where “L” (BUSY) is output from D0, therefore, do not input any command. 3) Write enable (WEN) / disable (WDS) cycle ～ ～ CS 2 3 4 5 6 7 1 0 0 11 ～ ～ DI 8 ～ ～ ENABLE=1 1 DISABLE=0 0 ～ ～ 1 SK DO High-Z Fig.35 Write enable (WEN) / disable (WDS) cycle ○At power on, this IC is in write disable status by the internal RESET circuit. Before executing the write command, it is necessary to execute the write enable command. And, once this command is executed, it is valid unitl the write disable command is executed or the power is turned off. However, the read command is valid irrespective of write enable / diable command. Input to SK after 6 clocks of this command is available by either “H” or “L”, but be sure to input it. ○When the write enable command is executed after power on, write enable status gets in. When the write disable command is executed then, the IC gets in write disable status as same as at power on, and then the write command is canceled thereafter in software manner. However, the read command is executable. In write enable status, even when the write command is input by mistake, write is started. To prevent such a mistake, it is recommended to execute the write disable command after completion of write. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Application 1) Method to cancel each command ○READ Start bit Ope code Address Data 1bit 2bit 8bit Cancel is available in all areas in read mode. ・Method to cancel：cancel by CS=“L” 16bit Fig.36 READ cancel available timing ・27 Rise of clock ○WRITE SK DI 26 D1 *1 27 D0 Enlarged figure *1 Start bit 1bit Ope code Address Data 2bit 8bit 16bit a tE/W b a：From start bit to 27 clock rise＊1 Cancel by CS=“L” Note 1) If Vcc is made OFF in this area, designated address data is not guaranteed, therefore write once again. b：27 clock rise and after＊1 Cancellation is not available by any means. If Vcc is made OFF in this area, designated address data is not guaranteed, therefore write once again. And when SK clock is input continuously, cancellation is not available. Note 2) If CS is started at the same timing as that of the SK rise, write execution/cancel becomes unstable, therefore, it is recommended to fail in SK=”L” area. As for SK rise, necessary timing of tCSS/tCSH or higher. Fig.37 WRITE cancel available timing 2) At standby ○Standby current When CS is “L”, SK input is “L”, DI input is “H”, and even with middle electric potential, current does not increase. ○Timing As shown in Fig.38, when SK at standby is “H”, if CS is started, DI status may be read at the rise edge. At standby and at power ON/OFF, when to start CS, set SK input or DI input to “L” status. If CS is started when SK=”L” or DI=”L”, a start bit is recognized correctly. CS=SK=DI=”H” Wrong recognition as a start bit CS CS Start bit input SK SK DI DI Fig.39 Normal action timing Fig.38 Wrong action timing www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Start bit input 10/17 2010.07 - Rev.A Technical Note BU9891GUL-W 3) Equivalent circuit Output circuit Input citcuit RESET int. CSint. CS DO OEint. Fig.41 Input circuit (CS) Fig.40 Output circuit (DO) Input circuit Input circuit CS int. CS int. DI SK Fig.42 Input circuit (DI) Fig.43 Input circuit (SK) 4) I/O peripheral circuit 4-1) Pull down CS. By making CS=“L” at power ON/OFF, mistake in operation and mistake write are prevented. ○Pull down resistance Rpd of CS pin To prevent mistake in operation and mistake write at power ON/OFF, CS pull down resistance is necessary. Select an appropriate value to this resistance value from microcontroller VOH, IOH, and VIL characteristics of this IC. Rpd ≧ Microcontroller EEPROM VOHM “H” output VOHM ≧ Rpd IOHM VIHE ・・・① ・・・② Example) When VCC =5V, VIHE=2V, VOHM=2.4V, IOHM=2mA, from the equation ①, VIHE IOHM VOHM “L” input Rpd ≧ ∴ Fig.44 CS pull down resistance Rpd ≧ 2.4 2×10 -3 1.2 [kΩ] With the value of Rpd to satisfy the above equation, VOHM becomes 2.4V or higher, and VIHE (=2.0V), the equation ② is also satisfied. : EEPROM VIH specifications ・VIHE ・VOHM : Microcontroller VOH specifications ・IOHM : Microcontroller IOH specifications 4-2) DO is available in both pull up and pull down. Do output become “High-Z” in other READY / BUSY output timing than after data output at read command and write command. When malfunction occurs at “High-Z” input of the microcontroller port connected to DO, it is necessary to pull down and pull up DO. When there is no influence upon the microcontroller actions, DO may be OPEN. If DO is OPEN, and at timing to output status READY, at timing of CS=“H”, SK=“H”, DI=“H”, EEPROM recognizes this as a start bit, resets READY output, and DO=”High-Z”, therefore, READY signal cannot be detected. To avoid such output, pull up DO pin for improvement. CS CS “H” SK SK Enlarged DI D0 DI High-Z READY DO DO BUSY BUSY High-Z CS=SK=DI=”H” When DO=OPEN Improvement by DO pull up DO BUSY READY CS=SK=DI=”H” When DO=pull up Fig.45 READY output timing at DO=OPEN www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/17 2010.07 - Rev.A Technical Note BU9891GUL-W ○Pull up resistance Rpu and pull down resistance Rpd of DO pin As for pull up and pull down resistance value, select an appropriate value to this resistance value from microcontroller VIH, VIL, and VOH, IOH, VOL, IOL characteristics of this IC. Microcontroller Rpu VILM Rpu ≧ EEPROM VOLE ≦ IOLE Vcc－VOLE IOLE VILM ・・・③ ・・・④ Example) When VCC =5V, VOLE=0.4V, IOLE=2.1mA, VILM=0.8V, from the equation ③, 5－0.4 Rpu ≧ -3 2.1×10 ∴ Rpu ≧ 2.2 [kΩ] VOLE “L” input “L” output With the value of Rpu to satisfy the above equation, VOLE becomes 0.4V or below, and with VILM(=0.8V), the equation ④ is also satisfied. Fig.46 DO pull up resistance : EEPROM VOL specifications : EEPROM IOL specifications : Microcontroller VIL specifications VOHE ・・・⑤ Rpd ≧ IOHE ・VOLE ・IOLE ・VILM EEPROM Microcontroller VOHE ≧ VIHM VOHE “H” input Rpd IOHE VIHM ・・・⑥ Example) When VCC =5V, VOHE=Vcc－0.2V, IOHE=0.1mA, “H” output ∴ VIHM=Vcc×0.7V from the equation ⑤, 5－0.2 Rpd ≧ -3 0.1×10 Rpd ≧ 48 [kΩ] With the value of Rpd to satisfy the above equation, VOHE becomes 2.4V or below, and with VIHM (=3.5V), the equation ⑥ is also satisfied. ・VOHE : EEPROM VOH specifications ・IOHE : EEPROM IOH specifications ・VIHM : Microcontroller VIH specifications Fig.47 DO pull down resistance 5) READY / BUSY status display (DO terminal) This display outputs the internal status signal. When CS is started after tCS (Min.200ns) from CS fall after write command input, “H” or “L” is output. R/B display＝“L” (BUSY) = write under execution (DO status) After the timer circuit in the IC works and creates the period of tE/W, this time circuit completes automatically. And write to the memory cell is made in the period of tE/W, and during this period, other command is not accepted. R/B display = “H” (READY) = command wait status (DO status) Even after tE/W (max.5ms) from write of the memory cell, the following command is accepted. Therefore, CS=“H” in the period of tE/W, and when input is in SK, DI, malfunction may occur, therefore, DI=“L” in the area CS=“H”. (Especially, in the case of shared input port, attention is required.) *Do not input any command while status signal is output. Command input in BUSY area is cancelled, but command input in READY area is accepted. Therefore, status READY output is cancelled, and malfunction and mistake write may be made. STATUS CS SK CLOCK DI WRITE INSTRUCTION DO High-Z tSV READY BUSY Fig.48 R/B status output timing chart www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/17 2010.07 - Rev.A Technical Note BU9891GUL-W 6) When to directly connect DI and DO This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart, meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control line. Microcontroller EEPROM DI/O PORT DI R DO Fig.49 DI, DO control line common connection ○Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input. Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the same time in the following points. (1) 1 clock cycle to take in A0 address data at read command Dummy bit “0” is output to DO terminal. →When address data A0 = “1” input, through current route occurs. EEPROM CS input “H” EEPROM SK input A1 EEPROM DI input A0 Collision of DI input and DO output EEPROM DO output Microcontroller DI/O port D15 D14 D13 0 High-Z A1 A0 Microcontroller output High-Z Microcontroller input Fig.50 Collision timing at read data output at DI, DO direct connection (2) Timing of CS = “H” after write command. DO terminal in READY / BUSY function output. When the next start bit input is recognized, “HIGH-Z” gets in. →Especially, at command input after write, when CS input is started with microcontroller DI/O output “L”, READY output “H” is output from DO terminal, and through current route occurs. Feedback input at timing of these (1) and (2) does not cause disorder in basic operations, if resistance R is inserted. ～ ～ EEPROM SK input Write command EEPROM DI input Write command EEPROM DO output Write command ～ ～ Write command ～ ～ EEPROM CS input ～ ～ ～ ～ ～ ～ READY ～ ～ ～ ～ BUSY READY High-Z Collision of DI input and DO output BUSY Microcontroller output Microcontroller input ～ ～ READY Write command ～ ～ Microcontroller DI/O port Microcontroller output Fig.51 Collision timing at DI, DO direct connection Note) As for the case (2), attention must be paid to the following. When status READY is output, DO and DI are shared, DI=”H” and the microcontroller DI/O=”High-Z” or the microcontroller DI/O=”H”,if SK clock is input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at status READY output, set SK=“L”, or start CS within 4 clocks after “H” of READY signal is output. Start bit CS Because DI=”H”, set SK=”L” at CS rise. SK DI READY DO High-Z Fig.52 Start bit input timing at DI, DO direct connection www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/17 2010.07 - Rev.A Technical Note BU9891GUL-W ○Selection of resistance value R The resistance R becomes through current limit resistance at data collision. When through current flows, noises of power source line and instantaneous stop of power source may occur. When allowable through current is defined as I, the following relation should be satisfied. Determine allowable current amount in consideration of impedance and so forth of power source line in set. And insert resistance R, and set the value R to satisfy EEPROM input level VIH/VIL even under influence of voltage decline owing to leak current and so forth. Insertion of R will not cause any influence upon basic operations. (1) Address data A0 = “1” input, dummy bit “0” output timing (When microcontroller DI/O output is “H”, EEPROM DO outputs “L”, and “H” is input to DI) ・Make the through current to EEPROM 10mA or below. ・See to it that the level VIH of EEPROM should satisfy the following. Conditions Microcontroller VOHM ≦ VIHE EEPROM VOHM ≦ IOHM×R + VOLE DI/O PORT DI At this moment, if VOLE=0V, VOHM “H” output VOHM ≦ IOHM×R R IOHM DO R ≧ ∴ VOHM IOHM VOLE Fig.53 : EEPROM VIH specifications : EEPROM VOL specifications : Microcontroller VOH specifications : Microcontroller IOH specifications ・VIHE ・VOLE ・VOHM ・IOHM “L” output ・・・⑦ Circuit at DI, DO direct connection (Microcontroller DI/O “H” output, EEPROM “L” output) (2) DO status READY output timing (When the microcontroller DI/O is “L”, EEPROM DO output “H”, and “L” is input to DI) ・Set the EEPROM input level VIL so as to satisfy the following. Conditions Microcontroller “L” output VOLM ≧ VILE EEPROM DI/O PORT DI VOLM ≧ VOHE – IOLM×R VOLM As this moment, VOHE=Vcc VOLM ≧ Vcc – IOLM×R R IOHM DO VOHE Vcc – VOLM ∴ IOLM “H” output ・・・⑧ : EEPROM VIL specifications : EEPROM VOH specifications : Microcontroller VOL specifications : Microcontroller IOL specifications ・VILE ・VOHE ・VOLM ・IOLM Example) When Vcc=5V, VOHM=5V, IOHM=0.4mA, VOLM=5V, IOLM=0.4mA, From the equation ⑦, R ≧ R ≧ ∴ R ≧ From the equation⑧, VOHM R ≧ IOHM 5 0.4×10 R ≧ -3 12.5 [kΩ] ・・・⑨ ∴ R ≧ Vcc – VOLM IOLM 5 – 0.4 2.1×10 -3 2.2 [kΩ] ・・・⑩ Therefore, from the equations ⑨ and ⑩, ∴ R ≧ 12.5 [kΩ] Fig.54 Circuit at DI, DO direct connection (Microcontroller DI/O “L” output, EEPROM “H” output) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/17 2010.07 - Rev.A Technical Note BU9891GUL-W 7) Notes on power ON/OFF ・At power ON/OFF, set CS “L”. When CS is “H”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may cause malfunction, mistake write or so. To prevent these, at power ON, set CS “L”. (When CS is in “L” status, all inputs are cancelled.) And at power decline, owing to power line capacity and so forth, low power status may continue long. At this case too, owing to the same reason, malfunction, mistake write may occur, therefore, at power OFF too, set CS “L”. VCC VCC GND VCC CS GND Bad example Good example Fig.55 Timing at power ON/OFF (Bad example)CS pin is pulled up to Vcc. (Good example)It is “L” at power ON/OFF. In this case, CS becomes “H” (active status), and EEPROM may have malfunction, mistake write owing to noise and the likes. Even when CS input is High-Z, the status becomes like this case, which please note. Set 10ms or higher to recharge at power OFF. When power is turned on without observing this condition, IC internal circuit may not be reset, which please note. ○POR citcuit This IC has a POR (Power On Reset) circuit as a mistake write countermeasure. After POR action, it gets in write disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF. However, if CS is “H” at power ON/OFF, it may become write enable status owing to noises and the likes. For secure actions, observe the follwing conditions. 1. Set CS=”L” 2. Turn on power so as to satisfy the recommended conditions of tR, tOFF, Vbot for POR circuit action. tR VCC Recommended conditions of tR, tOFF, Vbot tR tOFF 10m s or below Vbot t O FF V bot 10m s or higher 0.3V or below 100m s or below 10m s or higher 0.2V or below 0 Fig.56 Rise waveform diagram ○LVCC circuit LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write. At LVCC voltage (Typ.=1.2V) or below, it prevent data rewrite. 8) Noise countermeasures ○VCC noise (bypass capacitor) When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach a by pass capacitor (0.1μF) between IC VCC and GND, At that moment, attach it as close to IC as possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND. ○SK noise When the rise time (tR) of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SK input. The hysteresis width of this circuit is set about 0.2V, if noises exist at SK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time (tR) of SK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures. Make the clock rise, fall time as small as possible. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Notes for use (1) Described numeric values and data are design representative values, and the values are not guaranteed. (2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in consideration of static characteristics and transition characteristics and fluctuations of external parts and our LSI. (3) Absolute Maximum Ratings If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, LSI may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to LSI. (4) GND electric potential Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is not lower than that of GND terminal in consideration of transition status. (5) Heat design In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin. (6) Terminal to terminal shortcircuit and wrong packaging When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may destruct LSI. And in the case of shortcircuit between LSI terminals and terminals and power source, terminal and GND owing to foreign matter, LSI may be destructed. (7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/17 2010.07 - Rev.A Technical Note BU9891GUL-W ●Ordering part number B U Part No. 9 8 9 1 Part No. G U L Package GUL : VCSP50L1 - W W-CELL E 2 Packaging and forming specification E2: Embossed tape and reel VCSP50L1(BU9891GUL-W) 1.00±0.05 <Tape and Reel information> 1.60±0.05 Tape Embossed carrier tape Quantity 3000pcs Direction of feed 0.55MAX 0.1±0.05 1PIN MARK E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 6-φ0.25±0.05 0.05 A B A B B A 1 0.3±0.05 2 0.5 0.06 S (φ0.15)INDEX POST 0.25±0.05 S 3 1pin P=0.5×2 (Unit : mm) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Reel 17/17 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2010.07 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A