HVD191 Silicon Epitaxial Planar PIN Diode for High Frequency Attenuator REJ03G0015-0100Z Rev.1.00 Apr.28.2003 Features • Low capacitance. (C ≤ 0.37 pF) • Low forward resistance. (rf ≤ 2.5 Ω) • Super small Flat Package (SFP) is suitable for surface mount design. Ordering Information Type No. Laser Mark Package Code HVD191 H2 SFP Pin Arrangement Cathode mark Mark 1 H2 2 1. Cathode 2. Anode Rev.1.00, Apr.28.2003, page 1 of 5 HVD191 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Value Unit Reverse voltage VR 30 V Forward current IF 100 mA Power dissipation Pd 150 mW Junction temperature Tj 125 °C Storage temperature Tstg −55 to +125 °C Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test Condition Forward voltage VF 1.0 V IF = 10 mA Reverse current IR 0.1 µA VR = 30 V Capacitance C 0.37 pF VR = 1 V, f = 1 MHz Forward resistance rf 2.5 Ω IF = 10 mA, f = 100 MHz Notes: 1. Please do not use the soldering iron due to avoid high stress to the SFP package. 2. The material of lead is exposed for cutting plane. Therefore, soldering nature of lead tip part is considered as unquestioned. Please kindly consider soldering nature. Rev.1.00, Apr.28.2003, page 2 of 5 HVD191 Main Characteristic 10–7 10–2 10–8 –4 Reverse current IR (A) Forward current IF (A) 10 10–6 10–8 10–9 10–10 10–11 10–12 10–10 10–13 10–12 0 0.2 0.4 0.6 0.8 10–14 1.0 0 10 20 40 50 Reverse voltage VR (V) Fig.1 Forward current vs. Forward voltage Fig.2 Reverse current vs. Reverse voltage 103 10 f = 1MHz f = 100MHz Forward resistance rf (Ω) Capacitance C (pF) 30 Forward voltage VF (V) 1.0 0.1 0.01 0.1 1.0 10 100 102 101 100 10–1 –4 10 10–3 10–2 10–1 Reverse voltage VR (V) Forward current IF (A) Fig.3 Capacitance vs. Reverse voltage Fig.4 Forward resistance vs. Forward current Rev.1.00, Apr.28.2003, page 3 of 5 HVD191 Package Dimensions As of January, 2003 1.0 ± 0.10 0.13 ± 0.05 1.4 ± 0.10 0.5 – 0.55 0.3 ± 0.05 0.6 ± 0.05 Unit: mm Package Code JEDEC JEITA Mass (reference value) Rev.1.00, Apr.28.2003, page 4 of 5 SFP — — 0.0010 g HVD191 Sales Strategic Planning Div. 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Renesas Technology Corporation, All rights reserved. Printed in Japan. Colophon 0.0 Rev.1.00, Apr.28.2003, page 5 of 5