PT16557 1/3, 1/4 Duty LCD Display Drivers with Key Input Function DESCRIPTION The PT16557 is 1/3 duty and 1/4 duty LCD display drivers that can directly drive up to 164 segments and can control up to four general-purpose output ports. These products also incorporate a key scan circuit that accepts input from up to 30 keys to reduce printed circuit board wiring. FEATURES Key input function for up to 30 keys (A key scan is performed only when a key is pressed.) 1/3 duty and 1/4 duty drive schemes can be controlled from serial data. 1/2 bias and 1/3 bias drive schemes can be controlled from serial data. Capable of driving up to 126 segments using 1/3 duty and up to 164 segments using 1/4 duty. Sleep mode and all segments off functions that are controlled from serial data. Switching between key scan output and segment output can be controlled from the serial data. The key scan operation enabled/disabled state can be controlled from the serial data. Switching between segment output port and general-purpose output port can be controlled from serial data. The common and segment output waveform frame frequency can be controlled from the serial data. Switching between RC oscillator mode and external clock mode can be controlled from the serial data. Serial data I/O supports CCB format communication with the system controller. Direct display of display data without the use of a decoder provides high generality. Independent VLCD for the LCD driver block. (When the logic block supply voltage VDD is in the range 3.6 to 6.0V, VLCD can be set to a voltage in the range 0.75 x VDD to 6.0V, and when VDD is in the range 2.7 to 3.6V, VLCD can be set to a voltage in the range 2.7 to 6.0V.) Provision of an on-chip voltage-detection type reset circuit prevents incorrect displays. AEC-Q100 Grade1 Compliant for Automotive Applications APPLICATION Electronic Equipment with LCD Display BLOCK DIAGRAM Tel: 886-66296288‧Fax: 886-29174598‧ http://www.princeton.com.tw‧2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan PT16557 1. APPLICATION CIRCUITS 1.1 1/2 BIAS (FOR USE WITH NORMAL PANELS) Notes: 1 Add a capacitor to the logic block power supply line so that the logic block power supply voltage VDD rise time when power is applied and the logic block power supply voltage VDD fall time when power drops are both at least 1ms, as the PT16557 is reset by the VDET. 2 When RC oscillator mode is used, the external resistor Rosc and the external capacitor Cosc must be connected between the OSC pin and ground, and when external clock mode is selected the current protection resistor Rg (4.7 to 47KΩ) must be connected between the OSC pin and the external clock output pin (external oscillator). (See the section on the OSC pin peripheral circuit.) 3 The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 and 10KΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded. V1.2 3 May 2016 PT16557 1.2 1/2 BIAS (FOR USE WITH LARGE PANELS) Notes: 1 Add a capacitor to the logic block power supply line so that the logic block power supply voltage VDD rise time when power is applied and the logic block power supply voltage VDD fall time when power drops are both at least 1ms, as the PT16557 is reset by the VDET. 2 When RC oscillator mode is used, the external resistor Rosc and the external capacitor Cosc must be connected between the OSC pin and ground, and when external clock mode is selected the current protection resistor Rg (4.7 to 47KΩ) must be connected between the OSC pin and the external clock output pin (external oscillator). (See the section on the OSC pin peripheral circuit.) 3 The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 and 10KΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded. V1.2 4 May 2016 PT16557 1.3 1/3 BIAS (FOR USE WITH NORMAL PANELS) Notes: 1. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V DD rise time when power is applied and the logic block power supply voltage VDD fall time when power drops are both at least 1ms, as the PT16557 is reset by the VDET. 2. When RC oscillator mode is used, the external resistor Rosc and the external capacitor Cosc must be connected between the OSC pin and ground, and when external clock mode is selected the current protection resistor Rg (4.7 to 47KΩ) must be connected between the OSC pin and the external clock output pin (external oscillator). (See the section on the OSC pin peripheral circuit.) 3. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 and 10KΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded. V1.2 5 May 2016 PT16557 1.4 1/3 BIAS (FOR USE WITH LARGE PANELS) Notes: 1. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V DD rise time when power is applied and the logic block power supply voltage VDD fall time when power drops are both at least 1ms, as the PT16557 is reset by the VDET. 2. When RC oscillator mode is used, the external resistor Rosc and the external capacitor Cosc must be connected between the OSC pin and ground, and when external clock mode is selected the current protection resistor Rg (4.7 to 47KΩ) must be connected between the OSC pin and the external clock output pin (external oscillator). (See the section on the OSC pin peripheral circuit.) 3. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 and 10KΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded. V1.2 6 May 2016 PT16557 2. ORDER INFORMATION Valid Part Number PT16557-LQ Package Type 64 Pin, LQFP Top Code PT16557-LQ 3.PIN CONFIGURATION V1.2 7 May 2016 PT16557 4.PIN DESCRIPTION Pin Name I/O Active Handling when unused Description Pin No. S1/P1 to S4/P4 S5 to S38 O - OPEN COM4/S39 COM3 to COM1 O - OPEN KS1/S40 KS2/S41 KS3/S42 KS4 to KS6 O - OPEN KI1 to KI5 I H GND VDD - - - VLCD - - - VLCD1 - - OPEN VLCD2 - - OPEN VSS - - - Segment outputs for displaying the display data transferred by serial data input. The S1/P1 to S4/P4 1 to 4 pins can be used as general-purpose output ports 5 to 38 under serial data control. Common driver outputs The frame frequency is fo [Hz] 39 The COM4/S39 pin can be used as a segment output 40 to 42 in 1/3 duty. Key scan outputs Although normal key scan timing lines require diodes to be inserted in the timing lines to prevent shorts, 43 since these outputs are unbalanced CMOS transistor 44 outputs, these outputs will not be damaged by 45 shorting when these outputs are used to form a key 46 to 48 matrix. The KS1/S40 to KS3/S42 pins can be used as segment outputs when so specified by the control data. Key scan inputs 49 to 53 These pins have built-in pull-down resistors. Logic block power supply connection. Provide a 54 voltage of between 2.7 and 6.0V. LCD driver block power supply connection. A voltage in the range 0.75 VDD to 6.0V must be provided 55 when VDD is in the range 3.6 to 6.0V, and a voltage in the range 2.7V to 6.0V must be provided when VDD is in the range 2.7 to 3.6V. Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to VLCD2 when a 1/2 56 bias drive scheme is used. Used for applying the LCD drive 1/3 bias voltage externally. Must be connected toVLCD1 when a 1/2 bias 57 drive scheme is used. Power supply connection. Connect to ground. 58 TEST - - - This pin must be connected to ground. V1.2 OSC I/O - VDD DO O - OPEN CE I H CL I DI I GND - The OSC pin can be used to form an oscillator circuit with an external resistor and an external capacitor. If external clock mode is selected with the control data, this pin is used to input an external clock signal. Serial data interface connections to the controller. Note that DO, being an open-drain output, requires a pull-up resistor. DO: Output data CE: Chip enable CL: Synchronization clock DI : Transfer data 8 59 60 61 62 63 64 May 2016 PT16557 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.2 37 May 2016