88552

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
E
Drawing updated to reflect current requirements. Editorial changes
throughout. - gap
00-10-12
Raymond Monnin
F
Added device to cover 12 ns access time. Updated boilerplate,
editorial changes throughout. - ksr
Boilerplate update and part of five year review. - tcr
Update boilerplate for current MIL-PRF-38535 requirements. - llb
02-08-16
Raymond Monnin
07-11-01
16-03-17
Robert M. Heber
G
H
Charles F. Saffle
THE FRONT PAGE OF THIS DRAWING HAS BEEN REPLACED
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PMIC N/A
PREPARED BY
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
Kenneth Rice
STANDARD
MICROCIRCUIT
DRAWING
CHECKED BY
Ray Monnin
APPROVED BY
Michael A. Frye
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DRAWING APPROVAL DATE
88-06-03
REVISION LEVEL
H
MICROCIRCUIT, MEMORY, DIGITAL, CMOS,
32K X 8 STATIC RANDOM ACCESS MEMORY
(SRAM) LOW POWER, MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
5962-88552
1 OF 17
5962-E157-16
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-88552
01
X
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number 1/
01
02, 07
03, 08
04, 09
05
06
10
11
12
13
Circuit function
Access time
32K x 8 low power CMOS SRAM
100 ns
70 ns
55 ns
45 ns
35 ns
25 ns
20 ns
17 ns
15 ns
12 ns
1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Z
U
T
M
N
Descriptive designator
GDIP1-T28 or CDIP2-T28
CQCC1-N32
CDFP3-F28
CDIP3-T28 or GDIP4-T28
CDFP4-T28
CQCC3-N28
GDFP2-F28
Terminals
Package style
28
32
28
28
28
28
28
Dual-in-line
Rectangular leadless chip carrier
Flat pack
Dual-in-line
Flat pack
Rectangular leadless chip carrier
Flat pack
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Supply voltage range (VCC) ...................................................................
Input voltage range ...............................................................................
Storage temperature range ..................................................................
Thermal resistance, junction-to-case (JC) ............................................
Junction temperature (TJ) .....................................................................
Power dissipation (PD) ..........................................................................
Junction temperature (soldering, 10 seconds) ......................................
1/
2/
3/
-0.5 V dc to +7.0 V dc
-0.5 V dc to +6.0 V dc
-65C to +150C
See MIL-STD-1835
+150C
1.0 W
+260C
2/
3/
Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this
document and will also be listed in MIL-HDBK-103.
All voltages referenced to VCC.
Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening
conditions in accordance with method 5004 of MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
2
1.4 Recommended operating conditions.
Supply voltage range (VCC) ...................................................................
Ground voltage (VSS) ............................................................................
Input high voltage (VIH) .........................................................................
Input low voltage (VIL) ...........................................................................
Case operating temperature (TC)..........................................................
+4.5 V dc to +5.5 V dc 4/
0 V dc
+2.2 V dc to VCC +0.5 V dc
-0.5 V dc to 0.8 V dc
-55C to +125C
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094).
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
4/
All voltages referenced to VCC.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
3
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying
activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan
may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.
These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the
manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or other alternative
approved by the qualifying activity.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth tables. The truth tables shall be as specified on figure 2.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD
PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of
MIL-PRF-38535, or as modified in the manufacturer’s QM plan, the “QD” certification mark shall be used in place of the "Q" or
"QML" certification mark.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and
Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the
requirements of MIL-PRF-38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that
affects this drawing.
3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
4
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55C  TC +125C
VSS = 0 V, 4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
Group A
subgroups
Device
type
Limits
Min
Unit
Max
Input leakage current
ILI
VCC = max, VIN = GND to VCC
1, 2, 3
All
10
µA
Output leakage current
ILO
VCC = max, VOUT = GND to VCC
CE ≥ VIH; WE ≤ VIL
1, 2, 3
All
10
µA
Output low voltage
VOL
VCC = 4.5 V, IOL = 8 mA,
VIL = 0.8 V, VIH = 2.2 V
1, 2, 3
All
0.4
V
Output high voltage
VOH
VCC = 4.5 V, IOH = -4 mA,
VIL = 0.8 V, VIH = 2.2 V
1, 2, 3
All
2.4
V
Data retention voltage
VDR
1, 2, 3
All
2.0
V
Operating supply current
(active)
ICC1
Standby power supply
current (TTL)
Standby power supply
current (CMOS)
Data retention current
ICC2
ICC3
ICC4
2/
VCC = 5.5 V,
f = f max 1/,
CE = VIL, outputs open,
all other inputs at VIL
CE ≥ VIH, outputs open
VCC = 5.5 V, g = 0 MHz
CE ≥ (VCC-0.2 V), outputs open,
all other inputs ≤ 0.2 V or ≥
(VCC-0.2 V)
VCC = 3.0 V, CE ≥ (VCC-0.2 V),
f = 0 MHz, outputs open, all
other inputs ≤ 0.2 V,
or ≥ (VCC-0.2 V)
01, 02,
07,13
100
03, 08
125
04, 09
135
05
145
06, 11
155
10
150
12
160
01-04
3
05-09,
13
5
10-12
10
1, 2, 3
1, 2, 3
05,
07-09,
13
350
01-04,
06
800
10-12
750
05,
07-09,
13
350
01-04,
06
800
10-12
750
mA
mA
µA
µA
Input capacitance
CI
2/
VI = 5.0 V or GND,
f = 1 MHz, TC = +25°C,
See 4.3.1c
4
All
12
pF
Output capacitance
CO
2/
VO = 5.0 V or GND,
f = 1 MHz, TC = +25°C,
See 4.3.1c
4
All
12
pF
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
5
TABLE I. Electrical performance characteristics - Continued.
Test
Read cycle time
Address access time
Chip-enable access time
Output hold from
address change
Symbol
Conditions
-55C  TC +125C
VSS = 0 V, 4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
tAVAV
3/
Group A
subgroups
9, 10, 11
tELQV
9, 10, 11
tOLQV
Limits
Min
9, 10, 11
tAVQV
Device
type
9, 10, 11
01
100
02,07
70
03,08
55
04,09
45
05
35
06
25
10
20
11
17
12
15
13
12
Max
ns
01
100
02,07
70
03,08
55
04,09
45
05
35
06
25
10
20
11
17
12
15
13
12
01
100
02,07
70
03,08
55
04,09
45
05
35
06
25
10
20
11
17
12
15
13
12
01-12
3
13
2
Unit
ns
ns
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
6
TABLE I. Electrical performance characteristics - Continued.
Test
Output enable to
output valid
Symbol
tOLQV
Chip select to output
in low Z
tELQX
2/, 4/
Chip deselect to
output in high Z
tEHQZ
2/, 4/
Output disable to
output in high Z
Write enable to output
in high Z
Conditions
-55C  TC +125C
VSS = 0 V, 4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
3/
9, 10, 11
9, 10, 11
9, 10, 11
tWLQZ
2/, 4/
tOLQX
2/, 4/
Retention time
tCDR
Operation recovery time
tR
Device
type
Limits
Min
9, 10, 11
tOHQZ
2/, 4/
Output enable to output
in low Z
Group A
subgroups
9, 10, 11
Unit
Max
01
60
02-04,
07-09
35
05, 06
20
10, 11
10
12
8
13
6
01-12
3
13
2
ns
ns
01-04,
07, 09
35
05, 06
20
10-12
10
13
7
01
50
02-04,
07, 09
35
05, 06
20
10-12
10
13
7
01
50
02-04,
07-09
35
05, 06
20
10-12
10
13
7
ns
ns
ns
9, 10, 11
All
0
ns
CE ≥ VCC-0.2 V
9, 10, 11
All
0
ns
CE ≥ VCC-0.2 V
9, 10, 11
All
tAVAV
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
7
TABLE I. Electrical performance characteristics - Continued.
Test
Data valid to end of write
Symbol
Conditions
-55C  TC +125C
VSS = 0 V, 4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
tDVWH
tDVEH
Group A
subgroups
Device
type
Limits
Min
9, 10, 11
Unit
Max
01-04,
07-09
ns
05,06
10,12
13
tWHDX
tEHDX
9, 10, 11
Output active from end of
write
tWHQX
2/, 4/
9, 10, 11
Write cycle time
tAVAV
9, 10, 11
Data hold time
Chip select to end of write
tELWH
3/
9, 10, 11
01-09
3
10-13
0
01-09
3
10-13
0
01
100
02, 07
70
03, 08
55
04, 09
45
05
35
06
25
10, 11
20
12
15
13
12
01
90
02, 07
60
03, 08
50
04, 09
40
05
30
06
20
10, 11
15
12
12
13
10
ns
ns
ns
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
8
TABLE I. Electrical performance characteristics - Continued.
Test
Address valid to end of
write
Symbol
Conditions
-55C  TC +125C
VSS = 0 V, 4.5 V ≤ VCC ≤ 5.5 V
unless otherwise specified
tAVWH
Group A
subgroups
Device
type
Limits
Min
9, 10, 11
01
85
02, 07
60
03, 08
50
04, 09
40
05
30
06
20
10, 11
15
12
12
13
10
Unit
Max
ns
Address-setup time
tAVEL
tAVWL
9, 10, 11
All
0
ns
Write pulse width
tWLWH
9, 10, 11
01
55
ns
02, 07
45
03, 08
40
04, 09
35
05
30
06
25
10, 11
15
12
12
13
9
01-09
7
10-13
0
Write recovery time
tWHAX
tEHAX
9, 10, 11
ns
1/ f max = 1/tAVAV.
2/ This parameter tested initially and after any design or process change which could affect this parameter, and therefore
shall be guaranteed to the limits specified in table I.
3/ For output load circuits see figure 3 and for timing waveforms see figure 4.
4/ Transition is measured ±500 mV from steady state voltage.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
9
All device types
Case outlines
Terminal numbers
X, Z, U, T,
M, and N
Y
Terminal symbol
1
A14
NC
2
A12
A14
3
A7
A12
4
A6
A7
5
A5
A6
6
A4
A5
7
A3
A4
8
A2
A3
9
A1
A2
10
A0
A1
11
I/O1
A0
12
I/O2
NC
13
I/O3
I/O1
14
GND
I/O2
15
I/O4
I/O3
16
I/O5
GND
17
I/O6
NC
18
I/O7
I/O4
19
I/O8
I/O5
20
CE
I/O6
21
A10
I/O7
22
OE
I/O8
23
A11
CE
24
A9
A10
25
A8
OE
26
A13
NC
27
WE
A11
28
VCC
A9
29
---
A8
30
---
A13
31
---
WE
32
---
VCC
NC = No connection
FIGURE 1. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
H
SHEET
10
I/O
Function
CE
WE
OE
H
X
X
High Z
Standby (ICC2)
 VCC -0.2 V
X
X
High Z
Standby (ICC3)
L
H
H
High Z
Output disable
L
H
L
Data out
Read
L
L
X
Data in
Write
FIGURE 2. Truth table.
NOTE: Including scope and jig.
(minimum values)
AC test conditions
Input pulse levels
GND to 3.0 V
Input rise fall times
5 ns
Input timing reference levels
1.5 V
Output reference levels
1.5 V
FIGURE 3. Output load circuit.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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SHEET
11
Timing waveform of read cycle number 1 (see note 1)
Timing waveform of read cycle number 2 (see notes 1, 2, and 4)
Timing waveform of read cycle number 3 (see notes 1, 3, and 4)
NOTES:
1. WE is high for read cycle.
2. Device is continuously selected. CE = VIL.
3. Address valid prior to or coincident with CE transition low.
4. OE- VIL.
5. Transition is measured ±500 mV from steady state with 5 pF load (including scope and jig).
FIGURE 4. Timing waveforms.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
12
Timing waveform of write cycle number 1 (WE controlled timing) (see notes 1, 2, 3, 6, and 7)
Timing waveform of write cycle number 2 (CE controlled timing) (see notes 1, 2, 3, and 5)
FIGURE 4. Timing waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
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REVISION LEVEL
H
SHEET
13
NOTES:
1. WE must be high during all address transitions.
2. A write occurs during the overlap (tELWH or tWLWH) of a low CE and a low WE.
3. tWHAX is measured from the earlier of CE or WE going high to the end of the
write cycle.
4. During this period, the I/O pins are in the output state, and input signals
must not be applied.
5. If the CE low transition occurs simultaneously with or after the WE low
transition, the outputs remain in the high impedance state.
6. Transition is measured ±500 mV from steady state with a 5 pF load
(including scope and jig).
7. If OE is low during a WE controlled write cycle, the write pulse width must
be the larger of tWLWH or (tWLQZ + tDVWH) to allow the I/O drivers to turn off
and data to be placed on the bus for required tDVWH. If OE is high during a
WE controlled write cycle, this requirement does not apply and the write
pulse can be as short as the specified tWLWH.
FIGURE 4. Timing waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
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SHEET
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Low VCC retention waveform
FIGURE 4. Timing waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
H
SHEET
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4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015 of MIL-STD-883.
(2) TA = +125C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
TABLE II. Electrical test requirements.
MIL-STD-883 test requirements
Interim electrical parameters
(method 5004)
Final electrical test parameters
(method 5004)
Group A test requirements
(method 5005)
Groups C and D end-point
electrical parameters
(method 5005)
Subgroups
(in accordance with
MIL-STD-883, method 5005,
table I)
1*, 2, 3, 7*, 8A, 8B, 9, 10, 11
1, 2, 3, 4**, 7***, (8A, 8B)***,
9, 10, 11
2, 3, 7, 8A, 8B
* PDA applies to subgroup 1.
** See 4.3.1c.
*** See 4.3.1d.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
b.
Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c.
Subgroup 4 (CI and CO measurement) shall be measured only for the initial test and after process or design changes
which may affect input capacitance.
d.
Subgroups 7, 8A and 8B shall include verification of the truth table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
16
4.3.2 Groups C and D inspections.
a.
End-point electrical parameters shall be as specified in table II herein.
b.
Steady-state life test conditions, method 1005 of MIL-STD-883.
(1)
Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1005 of MIL-STD-883.
(2)
TA = +125C, minimum.
(3)
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.4 Record of users. Military and industrial users shall inform DLA Land and Maritime when a system application requires
configuration control and the applicable SMD to that system. DLA Land and Maritime will maintain a record of users and this
list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics
devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108.
6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,
or telephone (614) 692-0540.
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103 and QML-38535. The vendors
listed in MIL-HDBK-103 and QML-38535 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DLA Land and Maritime-VA.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88552
A
REVISION LEVEL
H
SHEET
17
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 16-03-17
Approved sources of supply for SMD 5962-88552 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime
maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8855201MA
3DTT2
P4C1256L-100L28MB
3/
IDT71256L100L28B
5962-8855201NA
3/
IDT71256L100XEB
5962-8855201UA
5962-8855201XA
5962-8855201YA
0C7V7
QP7C199L-100KMB
3DTT2
P4C1256L-100FMB
0SP21
IDT71256L100TDB
0C7V7
QP7C199L-100DMB
3DTT2
P4C1256L-100CMB
3/
EDI8833LP100CB
0SP21
IDT71256L100DB
0C7V7
QP7C198L-100DMB
3DTT2
P4C1256L-100CWMB
3/
0SP21
5962-8855201ZA
0C7V7
QP7C198L-100LMB
3DTT2
P4C1256L-100L32MB
3/
3DTT2
5962-8855202MA
3/
3DTT2
5962-8855202NA
EDI8833LP100LB
IDT71256L100L32B
IDT71256L100EB
P4C1256L-100FSMB
IDT71256L70L28B
P4C1256L-70L28MB
0C7V7
QP7C199L-70KMB
0SP21
IDT71256L70TDB
3DTT2
P4C1256L-70FMB
3/
IDT71256L70XEB
5962-8855202TA
3DTT2
P4C1256L-70FSSMB
5962-8855202UA
0C7V7
QP7C199L-70DMB
0SP21
IDT71256L70DB
3DTT2
5962-8855202XA
P4C1256L-70CMB
3/
EDI8833LP70CB
3/
MC51256L-70/B
0C7V7
QP7C198L-70DMB
3DTT2
P4C1256L-70CWMB
See footnotes at end of table.
1 of 9
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
5962-8855202YA
Vendor
CAGE
number
0C7V7
3DTT2
5962-8855202ZA
5962-8855203NA
QP7C198L-70LMB
P4C1256L-70L32MB
3/
EDI8833LP70LB
3/
IDT71256L70L32B
3/
MR51256L-70/B
3DTT2
3/
5962-8855203MA
Vendor
similar
PIN 2/
3DTT2
P4C1256L-70FSMB
IDT71256L70EB
P4C1256L-55L28MB
3/
IDT71256L55L28B
3/
L7C199KMB55L
0C7V7
QP7C199L-55KMB
3DTT2
P4C1256L-55FMB
3/
IDT71256L55XEB
3/
L7C199MMB55L
5962-8855203TA
3DTT2
P4C1256L-55FSSMB
5962-8855203UA
0C7V7
QP7C199L-55DMB
0SP21
IDT71256L55TDB
3DTT2
P4C1256L-55DMB
5962-8855203XA
0C7V7
QP7C198L-55DMB
0SP21
IDT71256L55DB
3DTT2
3/
5962-8855203YA
5962-8855203ZA
5962-8855204MA
5962-8855204NA
P4C1256L-55DWMB
L7C199HMB55L
0C7V7
QP7C198L-55LMB
3DTT2
P4C1256L-55L32MB
3/
IDT71256L55L32B
3/
L7C199TMB55L
3DTT2
P4C1256L-55FSMB
3/
IDT71256L55EB
3/
L7C199CMB55L
3DTT2
P4C1256L-45L28MB
3/
IDT71256L45L28B
3/
L7C199KMB45L
0C7V7
QP7C199L-45KMB
3DTT2
P4C1256L-45FMB
3/
IDT71256L45XEB
3/
L7C199CMB45L
5962-8855204TA
3DTT2
5962-8855204UA
0C7V7
QP7C199L-45DMB
0SP21
IDT71256L45TDB
3DTT2
3/
See footnotes at end of table.
2 of 9
P4C1256L-45FSSMB
P4C1256L-45DMB
L7C199CMB45L
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
5962-8855204XA
0C7V7
QP7C198L-45DMB
0SP21
IDT71256L45DB
3DTT2
3/
3/
5962-8855204YA
5962-8855204ZA
5962-8855205TA
0SP21
IDT71256L45L32B
3DTT2
P4C1256L-45L32MB
3/
L7C199TMB45L
3/
MR51256L-45/B
3DTT2
QP7C199L-35LMB
3DTT2
P4C1256L-35L28MB
57300
AS5C2568EC-35L/883C
0C7V7
QP7C199L-35KMB
P4C1256L-35FMB
3/
L7C199CMMB45L
0C7V7
QP7C199L-35FMB
3DTT2
P4C1256L-35FSSMB
AS5C2568F-35L/883C
EDI8833LP35FB
0C7V7
QP7C199L-35DMB
3DTT2
P4C1256L-35CMB
57300
AS5C2568C-35L/883C
3/
EDI8833LPA35QB
3/
IDT71256L35TCB
3/
L7C199CMB35L
0C7V7
QP7C198L-35DMB
3DTT2
P4C1256L-35DWMB
57300
5962-8855205YA
L7C199CMB35L
3DTT2
3/
5962-8855205XA
P4C1256L-45FSMB
IDT71256L45EB
0C7V7
57300
5962-8855205UA
MC51256L-45/B
QP7C198L-45LMB
3/
5962-8855205NA
P4C1256L-45DWMB
L7C199IMB45L
0C7V7
3/
5962-8855205MA
Vendor
similar
PIN 2/
AS5C2568CW-35L/883C
3/
EDI8833LP35CB
3/
IDT71256L35DB
3/
L7C199IMB35L
0C7V7
QP7C198L-35LMB
3DTT2
P4C1256L-35L32MB
57300
AS5C2568ECW-35L/883C
3/
EDI8833LP35LB
3/
IDT71256L35L32B
3/
L7C199TMB35L
See footnotes at end of table.
3 of 9
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
5962-8855205ZA
Vendor
CAGE
number
3DTT2
3/
5962-8855206MA
QP7C199L-25LMB
3DTT2
P4C1256L-25L28MB
5962-8855206UA
IDT71256L25L28B
3/
L7C199KMB25L
0C7V7
P4C1256L-25FMB
3/
IDT71256L25XEB
3/
L7C199MMB25L
P4C1256L-25FSSMB
57300
AS5C2568F-25L/883C
0C7V7
QP7C199L-25DMB
0SP21
IDT71256L25TDB
3DTT2
P4C1256L-25DMB
57300
AS5C2568C-25L/883C
QP7C198L-25DMB
0SP21
IDT71256L25DB
3DTT2
P4C1256L-25DWMB
57300
AS5C2568CW-25L/883C
5962-8855207NA
L7C199IMB25L
0C7V7
QP7C198L-25LMB
0SP21
IDT71256L25L32B
3DTT2
P4C1256L-25L32MB
57300
AS5C2568ECW-25L/883C
3DTT2
3/
5962-8855207MA
L7C199CMB25L
0C7V7
3/
5962-8855206ZA
QP7C199L-25FMB
3DTT2
3/
5962-8855206YA
QP7C199L-25KMB
3DTT2
3/
5962-8855206XA
AS5C2568EC-25L/883C
3/
0C7V7
5962-8855206TA
P4C1256L-35FSMB
IDT71256L35EB
0C7V7
57300
5962-8855206NA
Vendor
similar
PIN 2/
L7C199TMB25L
P4C1256L-25FSMB
IDT71256L25EB
0C7V7
QP7C199L-70LMB
3DTT2
P4C1256L-70L28MB
57300
AS5C2568EC-70L/883C
0C7V7
QP7C199L-70KMB
3DTT2
P4C1256L-70FMB
See footnotes at end of table.
4 of 9
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
5962-8855207TA
Vendor
CAGE
number
0C7V7
QP7C199L-70FMB
3DTT2
P4C1256L-70FSSMB
57300
AS5C2568F-70L/883C
3/
5962-8855207UA
5962-8855207XA
QP7C199L-70DMB
3DTT2
P4C1256L-70DMB
57300
AS5C2568C-70L/883C
3/
EDI8833LPA70QB
3/
IDT71256L70TCB
0C7V7
QP7C198L-70DMB
3DTT2
P4C1256L-70DWMB
3/
3/
5962-8855207ZA
3DTT2
P4C1256L-70L32MB
57300
AS5C2568ECW-70L/883C
3/
EDI8833LP70LB
3/
IDT71256L70L32B
3DTT2
QP7C199L-55LMB
3DTT2
P4C1256L-55L28MB
57300
AS5C2568EC-55L/883C
0C7V7
3/
L7C199KMB55L
QP7C199L-55KMB
P4C1256L-55FMB
L7C199MMB55L
0C7V7
QP7C199L-55FMB
3DTT2
P4C1256L-55FSSMB
57300
3/
5962-8855208UA
P4C1256L-70FSMB
IDT71256L70EB
0C7V7
3DTT2
5962-8855208TA
IDT71256L70DB
QP7C198L-70LMB
3/
5962-8855208NA
AS5C2568CW-70L/883C
EDI8833LP70CB
0C7V7
3/
5962-8855208MA
EDI8833LP70FB
0C7V7
57300
5962-8855207YA
Vendor
similar
PIN 2/
AS5C2568F-55L/883C
EDI8833LP55FB
0C7V7
QP7C199L-55DMB
3DTT2
P4C1256L-55DMB
57300
AS5C2568C-55L/883C
3/
EDI8833LPA55QB
3/
IDT71256L55TCB
3/
L7C199CMB55L
See footnotes at end of table.
5 of 9
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
5962-8855208XA
Vendor
CAGE
number
3DTT2
QP7C198L-55DMB
57300
AS5C2568CW-55L/883C
3/
EDI8833LP55CB
3/
IDT71256L55DB
QP7C198L-55LMB
3DTT2
P4C1256L-55L32MB
EDI8833LP55LB
3/
IDT71256L55L32B
3/
L7C199TMB55L
3DTT2
QP7C199L-45LMB
3DTT2
P4C1256L-45L28MB
3/
QP7C199L-45KMB
3DTT2
P4C1256L-45FMB
0C7V7
QP7C199L-45FMB
P4C1256L-45FSSMB
57300
AS5C2568F-45L/883C
EDI8833LP45FB
0C7V7
QP7C199L-45DMB
3DTT2
P4C1256L-45DMB
57300
5962-8855209XA
L7C199MMB45L
3DTT2
3/
5962-8855209UA
AS5C2568EC-45L/883C
L7C199KMB45L
0C7V7
3/
5962-8855209TA
P4C1256L-55FSMB
IDT71256L55EB
0C7V7
57300
5962-8855209NA
AS5C2568ECW-55L/883C
3/
3/
5962-8855209MA
L7C199IMB55L
0C7V7
57300
5962-8855208ZA
P4C1256L-55DWMB
0C7V7
3/
5962-8855208YA
Vendor
similar
PIN 2/
AS5C2568C-45L/883C
3/
EDI8833LPA45QB
3/
IDT71256L45TCB
3/
L7C199CMB45L
0C7V7
QP7C198L-45DMB
3DTT2
P4C1256L-45DWMB
57300
AS5C2568CW-45L/883C
3/
EDI8833LP45CB
3/
IDT71256L45DB
3/
L7C199IMB45L
See footnotes at end of table.
6 of 9
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
5962-8855209YA
5962-8855209ZA
Vendor
CAGE
number
Vendor
similar
PIN 2/
0C7V7
QP7C198L-45LMB
3DTT2
P4C1256L-45L32MB
57300
AS5C2568ECW-45L/883C
3/
EDI8833LP45LB
3/
IDT71256L45L32B
3/
L7C199TMB45L
3DTT2
3/
5962-8855210MA
QP7C199L-20LMB
3DTT2
P4C1256L-20L28MB
3/
5962-8855210UA
QP7C199L-20KMB
3DTT2
P4C1256L-20FMB
0C7V7
P4C1256L-20FSSMB
AS5C2568F-20L/883C
0C7V7
QP7C199L-20DMB
3DTT2
P4C1256L-20CMB
QP7C198L-20DMB
3DTT2
P4C1256L-20DWMB
3/
QP7C198L-20LMB
3DTT2
P4C1256L-20L32MB
57300
AS5C2568ECW-20L/883C
PDM41256LA20L32B
0C7V7
QP7C199L-17LMB
3DTT2
P4C1256L-17L28MB
57300
AS5C2568EC-17L/883C
3/
0C7V7
3DTT2
3/
5962-8855211TA
AS5C2568CW-20L/883C
L7C199IMB20L
0C7V7
3/
5962-8855211NA
AS5C2568C-20L/883C
PDM41256LA20DB
0C7V7
57300
5962-8855211MA
QP7C199L-20FMB
57300
3/
5962-8855210YA
L7C199MMB20L
3DTT2
57300
5962-8855210XA
AS5C2568EC-20L/883C
L7C199KMB20L
0C7V7
3/
5962-8855210TA
IDT71256L45EB
0C7V7
57300
5962-8855210NA
P4C1256L-45FSMB
L7C199KMB17L
QP7C199L-17KMB
P4C1256L-17FMB
L7C199MMB17L
0C7V7
QP7C199L-17FMB
3DTT2
P4C1256L-17FSSMB
57300
AS5C2568F-17L/883C
See footnotes at end of table.
7 of 9
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
5962-8855211UA
5962-8855211XA
Vendor
CAGE
number
0C7V7
QP7C199L-17DMB
3DTT2
P4C1256L-17DMB
57300
AS5C2568C-17L/883C
3/
PDM41256LA17DB
0C7V7
QP7C198L-17DMB
3DTT2
P4C1256L-17CWMB
57300
AS5C2568CW-17L/883C
3/
5962-8855211YA
Vendor
similar
PIN 2/
L7C199IMB17L
0C7V7
QP7C198L-17LMB
3DTT2
P4C1256L-17L32MB
57300
AS5C2568ECW-17L/883C
3/
PDM41256LA17L32B
5962-8855211ZA
3DTT2
5962-8855212MA
0C7V7
QP7C199L-15LMB
3DTT2
P4C1256L-15L28MB
57300
3/
5962-8855212NA
5962-8855212UA
5962-8855212XA
5962-8855212YA
AS5C2568EC-15L/883C
L7C199KMB15L
0C7V7
QP7C199L-15KMB
3DTT2
P4C1256L-15FMB
3/
5962-8855212TA
P4C1256L-17FSMB
0C7V7
L7C199MMB15L
QP7C199L-15FMB
3DTT2
P4C1256L-15FSSMB
57300
AS5C2568F-15L/883C
0C7V7
QP7C199L-15DMB
3DTT2
P4C1256L-15DMB
57300
AS5C2568C-15L/883C
3/
PDM41256LA15DB
0C7V7
QP7C199L-15DMB
3DTT2
P4C1256L-15DWMB
57300
AS5C2568CW-15L/883C
3/
PDM41256LA15DB
0C7V7
QP7C198L-15LMB
3DTT2
P4C1256L-15L32MB
57300
AS5C2568ECW-15L/883C
3/
PDM41256LA15L32B
5962-8855212ZA
3DTT2
5962-8855213MA
0C7V7
QP7C199L-12LMB
3DTT2
P4C1256L-12L28M8
5962-8855213NA
P4C1256L-15FSMB
57300
AS5C2568EC-12L/883C
0C7V7
QP7C199L-12KMB
3DTT2
P4C1256L-12FMB
See footnotes at end of table.
8 of 9
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
DATE: 16-03-17
Standard
microcircuit drawing
PIN 1/
5962-8855213TA
5962-8855213UA
5962-8855213XA
5962-8855213YA
5962-8855213ZA
Vendor
CAGE
number
0C7V7
Vendor
similar
PIN 2/
QP7C199L-12FMB
3DTT2
P4C1256L-12FSSMB
57300
AS5C2568F-12L/883C
0C7V7
QP7C199L-12DMB
3DTT2
P4C1256L-12DMB
57300
AS5C2568C-12L/883C
0C7V7
QP7C198L-12DMB
3DTT2
P4C1256L-12DWMB
57300
AS5C2568CW-12L/883C
0C7V7
QP7C198L-12LMB
3DTT2
P4C1256L-12L32MB
57300
AS5C2568ECW-12L/883C
3DTT2
P4C1256L-12FSMB
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
3/ Not available from an approved source of supply.
Vendor CAGE
number
Vendor name
and address
0C7V7
e2v, Inc.
dba QP Semiconductor, Inc.
765 Sycamore Drive
Milpitas, CA 95035
0SP21
Integrated Device Technology, Inc.
6 Jenner STE 100
Irvine, CA 92618-3855
57300
Micross Components
7725 N. Orange Blossom Trail
Orlando, FL 32810-2696
3DTT2
Pyramid Semiconductor Corporation
1249 Reamwood Avenue
Sunnyvale, CA 94089
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
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