dV/dt Ratings for Low Voltage and High Voltage Power MOSFET Fei Wang , Wei Wang, Anup Bhalla 1. Abstract To better understand and utilize AOS power MOSFETs, it is important to understand the design and ratings. Voltage ramp and diode recovery related dV/dt and avalanche breakdown (UIS) are explained and the inter-relationship of these three ratings are discussed in this article. 2. Introduction dV/dt rating is an important parameter for the ruggedness of power MOSFET. It is usually a parameter shown in high voltage Power MOSFET (BVdss ≥ 500V) datasheets, but doesn’t appear in most low voltage power MOSFET (BVdss ≤ 100V) datasheets including all low voltage datasheets made by AOS. Both dV/dt (including voltage ramp type and diode recovery type) and UIS (Unclamped Inductive Switching) can cause MOSFET failure. In each of these situations, the device failure is caused by turn-on of the parasitic bipolar inherent in the MOSFET structure. For high voltage MOSFETs, the epitaxial region is much thicker than for low voltage MOSFETs, to allow it to support a higher off-state voltage. This region is conductivity modulated with electrons and holes when the body diode conducts, and there is more stored charge that needs to be removed during diode recovery in the high voltage MOSFET. Therefore, in high voltage MOSFETs, diode recovery dV/dt may be accompanied by much higher current density. This creates the possibility of MOSFET failure, and is the reason for the dV/dt ratings in the datasheet. All AOS high voltage MOSFETs are 100% tested for UIS (avalanche current). This stresses the bipolar parasitic transistor in the same manner, and so a UIS test could also ensure that the device is able to withstand high dV/dt. However, the UIS current used in the high voltage MOSFET for 100% final testing is commonly lower than the current accompanying the dV/dt rating, because the UIS rating is linked to the forward current rating Id of the device. So, a separate dV/dt rating on the datasheet is a meaningful guarantee. On the other hand, for most low voltage MOSFETs, UIS is tested at a much higher current density so that it guarantees safe operation under all practical dV/dt conditions that can be reached in real applications. In other words, dV/dt ratings add no benefit to the datasheet. 2.1 Bipolar Turn-on: The Power MOSFET structure contains an inherent parasitic N-P-N bipolar transistor formed between the two internal junctions. The turn-on of the bipolar transistor is suppressed by short-circuiting the junction between the N+ source and P- base regions as shown in the cross section in Figure 1. In spite of this, The Emitter-base junction of the parasitic bipolar transistor can be turned on at location A because of the finite resistance RPB of the P-base region. –2– March 27, 2009 Figure 1: Cross section of power MOSFET and its Parasitic Transistor In the presence of a high dV/dt at the drain terminal, during diode reverse recovery or during UIS, the P-base/Ndrift (Epi) junction collects current which then flows into the contact via the P-base region. The voltage drop across the resistance RPB forward biases the junction between the N+ source region and the P-base region. If the voltage across this junction at point A exceeds the built-in potential, the parasitic bipolar transistor turns on. Under these conditions, the blocking voltage capability of the power MOSFET structure is degraded from BVCB0 the lower BVCE0. Current filaments into the weak cell where the bipolar first turns on, leading to device destruction. 2.2 Voltage ramp type dV/dt vs. diode reverse recovery type dV/dt: Voltage ramp type dV/dt: When the MOSFET is off (gate-source shorted) and no current flow through its body diode, a voltage step with certain dV/dt is applied across Drain and Source. The result is a displacement current flow through the drain-base capacitance (CDB), which can turn on the bipolar to result MOSFET failure. iD = CDB dV dt The Diode reverse recovery type of dV/dt: During diode reverse recovery, the MOSFET is off, the Vds voltage will ramp up at a certain dV/dt, but on top of displacement current iD , at the same time diode reverse recovery current iRR is flowing to remove the store the charge in the epi region. iRR is not generated by dV/dt but accompanies it. The Diode Recovery Test Circuit & Waveforms are shown in Figure 2. The displacement current path and Body diode reverse recovery current path within the power MOSFET structure is shown in Figure 3. itotal = iD + iRR The peak of itotal is called iRM . Because it is the current flow into the contact to the P-base region that causes bipolar turn-on, we can easily draw a conclusion that for given value of dV/dt measured, diode reverse recovery type dV/dt accompanied with higher current density is more likely to fail a MOSFET by turning on its parasitic bipolar. That is to say, if a datasheet specifies a number for diode reverse recovery dV/dt, the value of the voltage ramp type of dV/dt is guaranteed. AOS Copyrighted –3– March 27, 2009 Vds + DUT Vgs Vds - Isd Vgs Ig L Isd + VDC - t rr IF I RM Vdd Vdd Vds dV/dt Figure 2: Diode Recovery Test Circuit & Waveforms Figure 3: Displacement current path and Body diode reverse recovery current path within the power MOSFET structure 2.3 UIS vs. dV/dt: When a voltage is applied to the power MOSFET well above its Vds rating, a critical electric field is reached at the p-base/n-epi junction. At this point, a large number of charge carriers are generated by a process of impact ionization. This current flows through the p-base region – the base of the parasitic bipolar. The current flow path is the same as that seen in diode recovery dV/dt tests, as depicted in Figure 4 below. When the voltage drop is sufficient to forward bias the parasitic bipolar junction transistor, it will turn on with potentially catastrophic results, as control of the switch is lost. Clearly, this failure mode is similar to dV/dt type of failure, and the root cause is high current flow through RPB causing “Bipolar turn-on”. AOS Copyrighted –4– March 27, 2009 Figure 4: UIS avalanche current path within the power MOSFET structure L BVDSS Vds Vds Id Vgs Vgs Avalanche + Vdd I AR VDC - Rg Id DUT Vgs Vgs Figure 5: Unclamped Inductive Switching (UIS) Test Circuit & Waveforms 3. Real case study of diode recovery dV/dt: From the background introduction above, we understand the inter-relationship between ramped dV/dt, diode recovery dV/dt and UIS avalanche. They all fail the MOSFET by “Bipolar turn-on” and root cause is the current flowing though RPB. Now we return to the question raised at the beginning: Why is a dV/dt rating is not needed in low voltage Power MOSFET datasheets. The reasons will be demonstrated by comparing a 30V trench MOSFET and a high voltage 600V N-channel planar MOSFET as examples. 3.1 600V planar MOSFET: 600V planar MOSFET is popular for applications such as flyback converter, bridges and so on. Let’s use AOT1N60 as an example. In the datasheet, the UIS current rating i AR is 1.3A, Diode recovery dV/dt rating is 5V/ns. AOS Copyrighted –5– Avalanche Current C Repetitive avalanche energy C Single pulsed avalanche energy Peak diode recovery dv/dt G March 27, 2009 IAR 1.0 A EAR 15 mJ EAS dv/dt 30 5 mJ V/ns Table 1: AOT1N60 datasheet ratings for UIS and dV/Dt We can perform a simulation where the peak diode recovery current is made equal to UIS peak current IRM=IAR=1.3A. In this test, the dI/dt is adjusted during the diode recovery test such that IRM=1.3A, as shown in Figure 6. A dI/dt of just 10A/us will produce this IRM. The VSD waveform shows the dV/dt associated with this stress is only 1V/ns. Clearly, and much higher diode dI/dt is needed to produce the 5V/ns dV/dt shown in the datasheet. Such a waveform is shown in Figure 7. It is clear from this waveform, that the dV/dt is 7.7V/ns and the IRM=4A, which is much greater the UIS current rating. Therefore, the UIS test cannot guarantee the 5V/ns rating – and a separate rating must be provided. 20 2 Isd Vsd 1.5 10 0 1 -10 0.5 -30 0 -40 -0.5 -50 -1 Irm=1.3A dV/dt=1V/ns dI/dt=10A/μs -60 -1.5 -70 -2 7.00E-07 8.00E-07 9.00E-07 1.00E-06 1.10E-06 time(s) Figure 6: AOT1N60 diode reverse recovery waveforms with IRM=1.3A AOS Copyrighted 1.20E-06 -80 1.30E-06 Vsd(V) Isd(A) -20 –6– March 27, 2009 50 3 Isd Vsd 2 0 1 -50 -100 -1 Vsd(V) Isd(A) 0 ` -2 -150 -3 -4 Irm=4A dV/dt=7.7V/ns dI/dt=100A/μs -200 -5 6.00E-07 -250 6.20E-07 6.40E-07 6.60E-07 6.80E-07 7.00E-07 7.20E-07 7.40E-07 7.60E-07 7.80E-07 8.00E-07 time(s) Figure 7: AOT1N60 diode reverse recovery waveforms with IRM=4A 3.2 30V trench MOSFET: 30V trench MOSFETs are popular in applications such as DC to DC converters, load switches and so on. Let’s use AO4468 as an example. In the datasheet, the UIS current rating i AR is 16A, and there is no diode recovery dV/dt rating. Avalanche Current B Repetitive avalanche energy L=0.3mH B IAR 16 A EAR 38 mJ Table 2: AO4468 datasheet ratings for UIS We use a diode recovery test condition for low voltage MOSFET with di/dt=500A/us. Waveforms are shown in Figure 8 for operation under these conditions. We get an IRM=2.3A associated with a dV/dt=6V/ns. Due to thinner epi and much less stored charge compared to the 600V FET, the IRM values seen by LV MOSFETs are clearly much less than UIS test current IAR which is 16A. AOS Copyrighted –7– March 27, 2009 20 10 Isd Vsd 5 15 0 10 Isd(A) Vsd(V) -5 -10 5 -15 0 Irm=2.3A dV/dt=6V/ns dI/dt=500A/μs -20 -5 1.100E-06 -25 1.110E-06 1.120E-06 1.130E-06 1.140E-06 1.150E-06 1.160E-06 1.170E-06 1.180E-06 time(s) Figure 8: AO4468 diode reverse recovery waveforms with datasheet conditions IRM=2.3A If the diode recovery test was performed at an extreme di/dt=8000A/us, we could produce an IRM=15A and a dV/dt =40V/ns as shown in Figure 9. This dI/dt is impossible in practice, and so this dV/dt cannot be occur on low voltage FETs in practice. The UIS test commonly done on these FETs in fact guarantees this level of dV/dt immunity. Clearly, once the UIS rating is provided in the low voltage FET, the dV/dt rating is unnecessary. AOS Copyrighted –8– March 27, 2009 15 5 Isd Vsd 10 0 -5 5 -10 Isd(A) -20 Vsd(V) -15 0 -5 -25 -30 -10 -15 Irm=15A dV/dt=40V/ns dI/dt=8kA/μs -35 -40 -20 6.10E-07 6.15E-07 6.20E-07 6.25E-07 -45 6.30E-07 time(A) Figure 9: AO4468 diode reverse recovery waveforms with IRM=15A 4. Conclusion For low voltage MOSFET devices, our UIS rating can meaningfully guarantee >40V/ns (40kV/us) diode recovery dV/dt immunity. Any lower dV/dt rating shown in the datasheet is redundant and unnecessary. For high voltage MOSFET devices, the lower current UIS rating can not guarantee sufficient diode recovery dV/dt immunity, so an additional dV/dt rating is usually needed to characterize MOSFET ruggedness. AOS Copyrighted –9– 5. March 27, 2009 References • • Stoltenburg, R.R. “Boundary of Power MOS UIS Avalanche Current Capability” IEEE Applied Power Electronics Conference Proceedings 359-64: (Mar 1989). Baliga, B. Jayant “Fundamentals of Power Semiconductor Devices” Springer, 2008 AOS Copyrighted – 10 – March 27, 2009 6. Revision History Date Revision Changes 1 Initial release 3/26/2009 AOS Copyrighted – 11 – March 27, 2009 Please Read Carefully: Information in this document is provided solely in connection with AOS products. Alpha & Omega Semiconductor (“AOS”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All AOS products are sold pursuant to AOS’s terms and conditions of sale. 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