CPC1466 Broadband ADSL/VDSL DC Termination IC INTEGRATED CIRCUITS DIVISION Features Description • Meets wetting (sealing) current requirements per ITU G.992.3 Annex 14.1 Region A • Integrated bridge rectifier for polarity correction • Uses inexpensive optocoupler for DC sealing current monitoring • Electronic inductor, breakover, and latch circuits • Current limiting and excess power protection circuits • ADSL/VDSL compatible with low-pass filter network • MLT and SARTS compatible • Compatible with portable test sets • Small SOIC or DFN Package • DFN package 60 percent smaller than SOIC The CPC1466 is a DC Termination IC for broadband ADSL/VDSL applications. The high-voltage, monolithic device provides a termination for DC wetting (sealing) current in customer premises equipment (CPE) to eliminate phone line corrosion on DSL twisted-pair copper lines without telephone voice services (i.e. only broadband services). Applications • • • • • ADSL/VDSL broadband modems Router and bridge customer premises equipment Leased line equipment Mechanized Loop Test (MLT) networks Switched Access Remote Test System (SARTS) networks Internally, a bridge rectifier provides a polarity-insensitive DC termination for DSL loop sealing current. The IC includes an electronic inductor, break-over and latch circuits, current limit and excess power protection. A sealing current detect output provides the means to monitor the loop for the presence of sealing current. The CPC1466 is manufactured in IXYS Integrated Circuits Division’s high voltage BCDMOS process that is used extensively in telephony applications worldwide. Ordering Information Figure 1. CPC1466 Block Diagram Part Number Description 1 PR+ 2 NC 3 TIP 4 NC 5 NC 6 RING 7 NC 8 PR- Electronic Inductor, Breakover, Latch, and Opto Driver Bridge Rectifier Current Limit and Excess Power Protection DS-CPC1466-R02 TC 16 NC 15 NC 14 RS 13 NC 12 PD 11 NC 10 COM DC Termination IC, 16-pin SOIC in tubes, 47/tube DC Termination IC, 16-pin SOIC tape and reel, CPC1466DTR 1000/reel DC Termination IC, 16-pin DFN in tubes, CPC1466M 52/tube DC Termination IC, 16-pin DFN tape and reel, CPC1466MTR 1000/reel CPC1466D 9 www.ixysic.com 1 INTEGRATED CIRCUITS DIVISION CPC1466 1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.1 DC Characteristics, Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.2 AC Characteristics, Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.3 Transition Characteristics, Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Sealing Current Monitor Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.1 LED Trigger Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3 3 4 4 4 4 8 8 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Surge Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Bridge Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 State Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.1 Activation - On-State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.2 Deactivation - Off-State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Photo-Diode (PD) Output Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 On-State Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.1 Typical Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.2 Over-Voltage Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 10 10 10 10 10 11 11 11 11 3. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1 CPC1466M 16-Pin DFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.2 CPC1466MTR 16-Pin DFN Tape & Reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.3 CPC1466D 16-Pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.4 CPC1466DTR 16-Pin SOIC Tape & Reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 13 13 14 14 2 www.ixysic.com R02 INTEGRATED CIRCUITS DIVISION CPC1466 1. Specifications 1.1 Package Pinout 1.2 Pin Description Pin Name Description 1 PR+ Protection resistor positive side PR+ 1 16 TC 2 NC No connection NC 2 15 NC 3 TIP Tip Lead TIP 3 14 NC 4 NC No connection NC 4 13 RS 5 NC No connection NC 5 12 NC RING 6 11 PD NC 7 10 NC PR- 8 9 COM 6 RING Ring lead 7 NC No connection 8 PR- Protection resistor negative side Common 9 COM 10 NC No connection 11 PD Photo-diode (LED input current) 12 NC No connection 13 RS Current limiting resistor 14 NC No connection 15 NC No connection 16 TC Timing capacitor 1.3 Absolute Maximum Ratings Parameter Maximum Voltage (T to R, R to T)* Power dissipation Operating temperature Operating relative humidity Storage temperature Minimum Maximum Unit - 300 V - 1 W -40 +85 °C 5 95 % -40 +125 °C Electrical absolute maximum ratings are at 25C. Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. R02 www.ixysic.com 3 INTEGRATED CIRCUITS DIVISION CPC1466 1.4 Electrical Characteristics Unless otherwise specified, minimum and maximum values are guaranteed by production testing requirements. Typical values are characteristic of the device and are the result of engineering evaluations. In addition, typical values are provided for informational purposes only and are not part of the testing requirements. All electrical specifications are provided for TA=25C 1.4.1 DC Characteristics, Normal Operation For operational templates: (see Figure 2 on page 5) and (see Figure 3 on page 5). Parameter Activate/Non-activate Voltage Conditions Off State Breakover current - Symbol Minimum Typical Maximum Unit VAN 30.0 35.0 39.0 V IBO - 0.5 1 mA DC Voltage drop Active State, 1 mA ISL 20 mA VON - 12.5 15 V DC leakage current VOFF = 20 V ILKG - 1.5 5 A Hold/Release current Active State IH/R 0.1 0.5 1.0 mA Minimum on current VON < 54 V IMIN1 20 38 - mA 54 V VON 100 V for 2 seconds, source resistance 200 to 4 k IMIN2 9.0 45 - mA VON > 100 V IMIN3 0 0.1 - mA VON 70 V IMAX1 - 38.4 70 mA VON > 70 V IMAX2 - - V ON ---------1k mA Active State IPD 0.2 0.3 10 mA Maximum on current Photodiode drive current 1.4.2 AC Characteristics, Normal Operation For test conditions: (see Figure 4 on page 6). Parameter Conditions AC impedance 200 Hz to 50 kHz Linearity distortion f= 200 Hz to 40 kHz, ISL = 1 mA to 20 mA, VAPP 12 VPP Symbol Minimum Typical Maximum Unit ZMT 10 38 - k D 40 70 - dB Maximum Unit 1.4.3 Transition Characteristics, Normal Operation For activation/deactivation test conditions: (see Figure 5 on page 7). Parameter Conditions Symbol Minimum Typical Activate time (see Figure 6 on page 7) t1 3.0 13 50 ms Deactivate time (see Figure 7 on page 7) t2 3.0 - 100 ms 4 www.ixysic.com R02 INTEGRATED CIRCUITS DIVISION CPC1466 Figure 2. I-V Requirements Template, 0 V to 50 V 1A IMAX1 100 mA VON Current 10 mA IMIN1 On State VAN 1 mA Transition Region 100 µA IHR IBO 10 µA 1 µA ILKG Off State Transition Region 0 0 10 20 30 40 50 Absolute Voltage (V) Figure 3. I-V Requirements Template, 0 V to 250 V 1A 70 V, 70 mA IMAX1 100 mA IMAX2 54 V, 9 mA Current 10 mA IMIN1 IMIN2 1 mA 100 µA 10 µA 1 µA 100 V, 0 mA 0 0 50 100 150 200 250 Absolute Voltage (V) R02 www.ixysic.com 5 INTEGRATED CIRCUITS DIVISION CPC1466 Figure 4. Test Circuit for ac Impedance and Linearity 68 μF Vmt VAPP ac generator DUT ISL 1 - 20 mA dc current source Vsig 1k Ω 1000 V mt Z mt = --------------------------V sig V mt 1000 Linearity = 20 log ---------------------------------------- + 20 log -----------V sig2ndHarmonic 67.5 6 www.ixysic.com R02 INTEGRATED CIRCUITS DIVISION CPC1466 Figure 5. Test Circuit for Activate and Deactivate Times 1 μF Pulse generator DUT 85 mH 85 Ω Figure 6. Applied Waveform for Activation Test 43.5 V 40 V Source Impedance 200 Ω to 4k Ω t1 30 V 20 V 500 ms 10 V Measure 0 Figure 7. Applied Waveform for Deactivation Test 2.0 mA Current source limited to 30 V Measure 1.5 mA 500 ms 1.0 mA 0.5 mA t2 0 R02 www.ixysic.com 7 INTEGRATED CIRCUITS DIVISION CPC1466 1.5 Sealing Current Monitor Characteristics 1.5.1 LED Trigger Characteristics For test conditions: (see Figure 8 on page 8). Parameter Conditions Symbol Min Typ Max Unit Applied DC battery Voltage - - -43.5 - -56 VDC Frequency (pulses per second) - - 4 - 8 - Percent break - - 40 - 60 % Number of pulses - - 6 - 10 - Total Loop Resistance - - 200 - 4000 - - - 1 - - Pulse width (opto on) (see Figure 8 on page 8) TON 10 - - ms Pulse width (opto off) (see Figure 8 on page 8) TOFF 10 - - ms Required opto-coupler response Number of applied pulses per make/break Figure 8. Test Circuit for LED Operation RLOOP 200Ω - 4kΩ 900Ω - 4.5kΩ (MLT) Series rotary dial 25Ω 1μF + VBAT -43.5V to -56V 85Ω 85mH 25Ω RING Shunt rotary dial TIP CPC1466 1 PR+ TC 16 2 NC NC 15 TIP NC 14 NC RS NC NC RING PD 3 4 13 1μF VCC 5V 68.1Ω 1% 1/4 W 75kΩ 5 6 7 2.2kΩ 5% 4W 8 8 NC PR- 12 1 4 11 2 3 VOUT 10 NC COM 9 www.ixysic.com R02 INTEGRATED CIRCUITS DIVISION CPC1466 Figure 9. Typical ADSL/VDSL Application Diagram DC Blocking Capacitor Transceiver CPC1466 1μF 30 - 35mH with Loop Current L1 TIP C1 SP1 L2 SSR RING CPC1225N Solid State Relay 2.2kΩ 5% 4W 1 PR+ 2 NC 3 TIP 4 NC 5 NC 6 RING 7 NC 8 PR- Electronic Inductor, Breakover, Latch, and Opto Driver Bridge Rectifier Current Limit and Excess Power Protection TC 16 NC 15 NC 14 RS 13 NC 12 PD 11 NC 10 68Ω 1% 1/4W 9 COM VCC 5V 75kΩ R02 1 4 2 3 www.ixysic.com Digital Control Circuitry 9 INTEGRATED CIRCUITS DIVISION CPC1466 2. Functional Description 2.1 Introduction 2.4 State Transitions The CPC1466 can be used for a number of DSL designs requiring a DC-hold circuit such as ADSL modem applications. Typical ADSL applications will use a filter circuit design similar to the one shown in Figure 9‚ “Typical ADSL/VDSL Application Diagram” on page 9. The DC TIP/RING voltage-current characteristics of the CPC1466 are shown in Figure 2‚ “I-V Requirements Template, 0 V to 50 V”, and in Figure 3‚ “I-V Requirements Template, 0 V to 250 V” on page 5. The DC Termination IC performs two fundamental functions in an ADSL modem application; as an electronic inductor providing a low impedance DC termination with a high impedance ac termination and second as part of the sealing current detection system for automated line sensing. This function provides an excellent method to monitor for the presence of sealing current. Generally, loss of sealing current indicates loop loss. Transition timings are illustrated in Figure 6‚ “Applied Waveform for Activation Test”, and in Figure 7‚ “Applied Waveform for Deactivation Test”. The test configuration for these timings is given in Figure 5‚ “Test Circuit for Activate and Deactivate Times”. All timing figures are located on page 7. State transition timings are set by the 1 F capacitor connected between the TC and COM pins. 2.4.1 Activation - On-State As can be seen in the application circuit in Figure 9 on page 9, CPC1466 designs require few external components. For the CPC1466, all that is needed is a circuit protector, two resistors and a capacitor. To ensure DSL signal integrity over a wide variety of conditions a POTS splitter type filter is recommended to isolate the DSL traffic from the termination. 2.2 Surge Protection Although the CPC1466 self-protects via current limiting, it requires over-voltage surge protection to protect against destructive over-voltage transients. IXYS Integrated Circuits Division recommends the use of a crowbar-type surge protector to limit the surge voltage seen by the CPC1466 to less than 250 V. The protection device must be able to withstand the surge requirements specified by the appropriate governing agency in regions where the product will be deployed. Teccor, Inc. and Bourns, Inc. make suitable surge protectors for most applications. Devices such as Teccor’s P1800SD or P2000SD Sidactors and Bourns’ TISP4220H3BJ or TISP4240H3BJ thyristors should provide suitable protection. 2.3 Bridge Rectifier The bridge rectifier in the CPC1466 ensures that the device is polarity-insensitive and provides consistent operational characteristics if the TIP/RING circuit polarity is reversed. 10 Application of battery voltage to the loop causes the CPC1466 to conduct whenever the voltage exceeds approximately 35 V. With application of sufficient voltage applied across the TIP/RING terminals, the CPC1466 will initially conduct a nominal 150 A of sealing current for approximately 20 ms prior to activation. Once activated, the CPC1466 will remain in the on state for as long as the loop current exceeds a nominal 0.5 mA. The CPC1466 turn-on timing circuit assures device activation will occur within 50 ms of an applied voltage greater than 43.5 V but not within the first 3 ms. 2.4.2 Deactivation - Off-State While the CPC1466 activation protocol is based on an initial minimum voltage level, deactivation is based on a diminished sealing current level. Deactivation occurs when the nominal sealing current level drops below 0.5 mA with guaranteed deactivation occurring for sealing current levels less than 0.1 mA The turn-off timing circuit deactivates the sealing current hold circuit when 1 mA of sealing current has been removed for 100 ms but ignores periods of loss up to 3 ms. www.ixysic.com R02 INTEGRATED CIRCUITS DIVISION CPC1466 2.5 Photo-Diode (PD) Output Behavior Output from the PD pin provides a minimum of 0.2 mA of photodiode drive current for an optocoupler’s LED anytime sealing current exceeds 1 mA. Because LED current is interrupted whenever loop current is interrupted, the optocoupler provides an excellent means of indicating loop availability for designs with a full time sealing current requirement. In addition, for pulsed sealing current loops, the status from this detector when used in conjuntion with the timing of modem retraining events can be used as an indicator to determine if the sealing current event is clearing line impairments. 2.6 On-State Behavior 2.6.1 Typical Conditions On-state sealing current levels are determined by the network’s power feed circuit and the loop’s DC impedance. To compensate for low loop resistance or very high loop voltage, the CPC1466 limits the maximum sealing current to 70 mA. The CPC1466 manages package power dissipation by shunting excess sealing current through the 2.2 k 4W power resistor located between the PR+ and PRpins. 2.6.2 Over-Voltage Conditions Potentials in excess of 100 V applied to the TIP/RING interface will cause the CPC1466 to disable the sealing current hold circuit and enter a standby state with very little current draw. Once the over-voltage condition is removed, the CPC1466 automatically resumes normal operation. R02 www.ixysic.com 11 INTEGRATED CIRCUITS DIVISION CPC1466 3. Manufacturing Information 3.1 Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033. Device Moisture Sensitivity Level (MSL) Rating CPC1466M CPC1466D MSL 3 MSL 1 3.2 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. 3.3 Reflow Profile This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD-020 must be observed. Device Maximum Temperature x Time CPC1466M / CPC1466D 260°C for 30 seconds 3.4 Board Wash IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to remove flux residue is acceptable, and the use of a short drying bake may be necessary. Chlorine-based or Fluorine-based solvents or fluxes should not be used. Cleaning methods that employ ultrasonic energy should not be used. 12 www.ixysic.com R02 INTEGRATED CIRCUITS DIVISION CPC1466 3.5 Mechanical Dimensions 3.5.1 CPC1466M 16-Pin DFN Package 7.00 ± 0.25 (0.276 ± 0.01) Recommended PCB Land Pattern 0.35 (0.014) 6.00 ± 0.25 (0.236 ± 0.01) 1.05 (0.041) 5.80 (0.228) INDEX AREA TOP VIEW 0.90 ± 0.10 (0.035 ± 0.004) 0.02, + 0.03, - 0.02 (0.0008, + 0.0012, - 0.0008) Pin 1 SIDE VIEW 0.30 ± 0.05 (0.012 ± 0.002) SEATING PLANE 0.20 (0.008) EXPOSED METALLIC PAD 4.25 ± 0.05 (0.167 ± 0.002) Terminal Tip 0.80 (0.032) Pin 16 6.00 ± 0.05 (0.236 ± 0.002) 0.80 (0.031) DIMENSIONS mm (inches) NOTE: Because the metallic pad on the bottom of the DFN package is connected to the substrate of the die, it is recommended that no printed circuit board traces or vias be placed under this area. 0.55 ± 0.10 (0.022 ± 0.004) BOTTOM VIEW Dimensions mm (inch) 3.5.2 CPC1466MTR 16-Pin DFN Tape & Reel 330.2 DIA. (13.00 DIA.) Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) B0=7.24 ± 0.10 (0.285 ± 0.004) A0=6.24 ± 0.10 (0.246 ± 0.004) W=16.00 ± 0.30 (0.630 ± 0.012) P=12.00 ± 0.10 (0.472 ± 0.004) K0=1.61 ± 0.10 (0.063 ± 0.004) Embossed Carrier DIMENSIONS mm (inches) Embossment R02 www.ixysic.com 13 INTEGRATED CIRCUITS DIVISION CPC1466 3.5.3 CPC1466D 16-Pin SOIC Package 10.160±0.381 (0.400±0.015) PCB Land Pattern 0.254 ±0.0127 (0.010±0.0005) PIN 16 10.363±0.127 (0.408±0.005) 7.493±0.127 (0.295±0.005) 0.635 X 45° (0.025 X 45°) 1.016 TYP (0.040 TYP) 9.30 (0.366) 1.90 (0.075) PIN 1 1.27 (0.050) 1.270 TYP (0.050 TYP) 2.057±0.051 (0.081±0.002) 0.406 TYP (0.016 TYP) 8.890 TYP (0.350 TYP) 0.508±0.1016 (0.020±0.004) 0.60 (0.024) Lead to Package Standoff: MIN: 0.0254 (0.001) MAX: 0.102 (0.004) DIMENSIONS mm (inches) NOTES: 1. Coplanarity = 0.1016 (0.004) max. 2. Leadframe thickness does not include solder plating (1000 microinch maximum). 3.5.4 CPC1466DTR 16-Pin SOIC Tape & Reel 330.2 DIA. (13.00 DIA.) W=16 (0.630) Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) B0=10.70 (0.421) K0=3.20 (0.126) A0=10.90 (0.429) P=12.00 (0.472) K1=2.70 (0.106) Embossed Carrier Embossment NOTES: 1. All dimensions carry tolerances of EIA Standard 481-2 2. The tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2 Dimensions mm (inches) For additional information please visit www.ixysic.com IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice. Specifications: DS-CPC1466-R02 © Copyright 2013, IXYS Integrated Circuits Division All rights reserved. Printed in USA. 10/2/2013 14 www.ixysic.com R02