APX7387 High Side and Low Side Driver Features General Description • The APX7387 is a high voltage, high speed, power MOSFET and IGBT gate drivers with independent high and low side referenced output channels. The high voltage process and common mode noise canceling technique provide stable operation of high-side driver under high dv/dt noise circumstances. The IC built-in UVLO circuits to prevent malfunction when VCC and VBS are lower than the specified threshold voltage. The APX7387 is available in SOP-8 and DIP-8 packages (see Pin Configuration). • • • • • Floating Channel designed for Bootstrap Operation to +600V Built-in Bootstrap Diode and Resistor Typically 200mA/350mA Sourcing/Sinking Current Driving Capability Matched Propagation Delay Time: 200ns(max.) 3.3V and 5V Input Logic Compatible Built-in Short-Through Prevention Circuit with 1µs (min.) Dead Time • Undervoltage Lockout(UVLO) for Vcc and VBS • Built-in Common Mode dv/dt Noise Canceling Cir- Pin Configuration cuit VCC 1 HIN 2 • Motor Drive • Ballast • Power Audio Amplifier SOP-8 LIN 3 GND 4 Applications VCC HIN LIN GND 8 7 6 5 1 2 3 4 8 7 6 5 DIP-8 VB HO VS LO VB HO VS LO Ordering and Marking Information P ackage Code J: D IP -8 K : S O P -8 O perating A m bient Tem perature R ange I : -40 to 125 o C Handling C ode T U : Tube T R : T ape & R eel A ssem bly M aterial G : H alogen and Lead Free Device A P X 7387 A ssem bly M aterial Handling C ode Tem perature R ange P ackage Code A P X 7387 J : A P X 7387 K : X X X X X - Date Code A P X 7387 XXXXX A P X 7387 XXXXX X X X X X - D ate C ode Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight inhomogeneous material and total of Br and Cl does not exceed 1500ppm by weight). S ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 1 www.anpec.com.tw APX7387 Absolute Maximum Ratings (Note 2) Symbol Parameter Ratings Unit VB High-side Floating Supply Voltage -0.3 to 625 V VS Hugh-side Floating Supply Offset Voltage VB-20 to VB +0.3 V VHO High-side Floating Output Voltage VS-0.3 to VB+0.3 V VCC Low-side and Logic-fixed Supply Voltage -0.3 to 20 V VLO Low-side Output Voltage VI N Logic Input Voltage (all of HIN and LIN Pin) dVS/dt TJ TSTG TSDR -0.3 to V CC+0.3 V -0.3 to 20 V Offset Voltage Slew Rate 50 V/ns Maximum Junction Temperature 150 o C -65 to 150 o C 260 o C Storage Temperature Maximum Lead Soldering Temperature, 10 Seconds Note 2: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol R TH,JA Parameter Thermal Resistance-Junction to Ambient SOP-8 DIP-8 Typical Value Unit (Note 3) 156.25 125 o C/W Power Dissipation, TA=25℃ PD SOP-8 DIP-8 W 0.8 1 Note 3: Mounted on a board (76x115x1.6t mm, Glass epoxy). Recommended Operating Conditions Symbol Parameter (Note 4) Range Unit VS+10 to VS+15 V 11-VCC to 600 V Supply Voltage 10 to 15 V High-side Output Voltage VS to VB V VLO Low-side Output Voltage 0 to VCC V VIN Logic Input Voltage (HIN and LIN Pin) TA Ambient Temperature VB High-side Floating Supply Voltage VS Hugh-side Floating Supply Offset Voltage VCC VHO 0 to VCC V -40 to 125 o C Note 4: Refer to the typical application circuit Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 2 www.anpec.com.tw APX7387 Electrical Characteristics VCC, VBS = 15V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to GND and VS and are applicable to the respective outputs LO and HO. Symbol Parameter APX7387 Test Conditions Unit Min Typ Max LOW SIDE POWER SUPPLY VCC Quiescent Supply Current VLIN= 0V or 5V - 150 300 μA VCCUV+ VCC Supply Under-Voltage Positive-going Threshold VBS=15V, VDD Rising 8 8.9 9.8 V VCCUV- VCC Supply Under-Voltage Negative-going Threshold VBS=15V, VDD Falling 7.4 8.2 9 V VDDHYS VCC Supply Under-Voltage Lockout Hysteresis VBS=15V - 0.7 - V IQCC BOOTSTRAPPED POWER SUPPLY IQBS VBS Quiescent Supply Current VHIN= 0V or 5V I BS Bootstrap Current VB=0V VBSUV+ VBS Supply Under-Voltage Positive-going Threshold VBSUVVBSHYS I LK - 150 300 μA -30 -20 -10 mA VDD=15V, VBS Rising 8 8.9 9.8 V VBS Supply Under-Voltage Negative-going Threshold VDD=15V, VBS Falling 7.4 8.2 9 V VBS Supply Under-Voltage Lockout Hysteresis VDD=15V - 0.7 - V Offset Supply Leakage Current VB=VS=600V - - 50 μA GATE DRIVER OUTPUT VOH Output High-level Voltage, VBIAS-VO I O=20mA - - 1 V VOL Output Low-level Voltage, VO I O=20mA - - 0.6 V VO=0V, VIN=5V with PW<10μs 120 200 - mA VO=15V, VIN=0V with PW<10μs 250 350 - mA 2.5 - - V (note5) IO+ Output High Short-circuit Pulsed Current IO- Output Low Short-circuit Pulsed Current (note5) INPUT LOGIC VIH Logic “1” Input Voltage VIL Logic “0” Input Voltage - - 1 V I IN+ Logic “1” Input Current VIN=5V - 25 50 μA I IN- Logic “0” Input Current VIN=0V - - 2 μA 100 200 300 KΩ RIN Input Pull-down Resistance Note 5: The parameters are guaranteed by design. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 3 www.anpec.com.tw APX7387 Dynamic Electrical Characteristics TA = 25°C, VBIAS(VCC, VBS)=15V, VS=GND, Cload=1000pF unless otherwise specified. Sym bol t ON tOFF Pa ra mete r AP X73 87 Te st Condit ions Unit Min Typ Max Turn-o n Propa gation Delay Time V S= 0V - 30 0 600 ns Turn-o ff Propag ation De lay Tim e V S= 0V - 30 0 600 ns tR Turn-o n Rise Time - 10 0 170 ns tF Turn-o ff Fal l Time - 80 150 ns MT1 Turn-o n De lay Matching |t ON(H)-t ON (L)| - - 200 ns MT2 Turn-o ff Del ay Matching |t OFF(H)-tOFF(L )| - - 100 ns Dead Time 1 - - μs DT Pin Descriptions PIN FUNCTION NO. NAME 1 VCC Logic and all low-side gate drivers power supply voltage. 2 HIN Logic input for high-side gate driver. 3 LIN Logic input for low-side gate driver. 4 GND 5 LO Low-side gate driver output. 6 VS High-side driver floating supply offset voltage. 7 HO High-side gate driver output. 8 VB High-side driver floating supply voltage. Ground of the IC. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 4 www.anpec.com.tw APX7387 Typical Operating Characteristics IQBS vs. Ambient Temperature 500 400 400 300 IQBS(μA) IQDD(μA) IQDD vs. Ambient Temperature 500 200 100 300 200 100 0 0 -40 -20 0 20 40 60 80 100 120 -40 -20 Ambient Temperature(°C) 20 40 60 80 100 120 VDDU- vs. Ambient Temperature 10 10 9.5 9.5 9 9 VDDU-(V) VDDU+(V) VDDU+ vs. Ambient Temperature 8.5 8.5 8 8 7.5 7.5 7 7 -40 -20 0 20 40 60 80 100 120 140 Ambient Temperature(°C) -40 -20 VBSU+ vs. Ambient Temperature 0 20 40 60 80 100 120 140 Ambient Temperature(°C) VBSU- vs. Ambient Temperature 15 15 13 13 11 11 VBSU-(V) VBSU+(V) 0 Ambient Temperature(°C) 9 7 9 7 5 5 -40 -20 -40 0 20 40 60 80 100 120 140 Ambient Temperature(°C) Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 -20 0 20 40 60 80 100 120 140 Ambient Temperature(°C) 5 www.anpec.com.tw APX7387 Typical Operating Characteristics VOL vs. IO 0.3 0.5 0.25 0.4 0.2 VOL(V) VOH(V) VOH vs. IO 0.6 0.3 0.15 0.2 0.1 0.1 0.05 0 0 0 1 2 3 4 5 6 7 8 9 1011121314151617181920 0 1 2 3 4 5 6 7 8 9 1011121314151617181920 IO(mA) IO(mA) VIL vs. Ambient Temperature 4 4 3 3 VIL(V) VIH(V) VIH vs. Ambient Temperature 2 1 2 1 0 0 -40 -20 0 20 40 60 80 100 120 140 -40 -20 Ambient Temperature(°C) RIN vs. Ambient Temperature IIN+ vs. Ambient Temperature 400 50 40 300 RIN (kΩ) IIN+(μA) 0 20 40 60 80 100 120 140 Ambient Temperature(°C) 30 200 20 100 10 0 0 -40 -20 0 20 40 60 80 -40 100 120 140 Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 -20 0 20 40 60 80 100 120 140 Ambient Temperature(°C) Ambient Temperature(°C) 6 www.anpec.com.tw APX7387 Typical Operating Characteristics tOFF vs. Ambient Temperature 500 400 400 300 300 tOFF(ns) tON(ns) tON vs. Ambient Temperature 500 200 200 100 100 0 0 -40 -20 0 20 40 60 80 100 120 140 -40 -20 20 40 60 80 100 120 140 tF vs. Ambient Temperature tR vs. Ambient Temperature 200 200 150 150 tF (ns) tR(ns) 0 Ambient Temperature(°C) Ambient Temperature(°C) 100 100 50 50 0 0 -40 -20 0 20 40 60 80 100 120 140 -40 -20 Ambient Temperature(°C) 0 20 40 60 80 100 120 140 Ambient Temperature(°C) MT2 vs. Ambient Temperature MT1 vs. Ambient Temperature 250 200 200 MT1(ns) MT2(ns) 250 150 150 100 100 50 50 0 0 -40 -20 0 20 40 60 80 100 120 140 -40 Ambient Temperature(°C) Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 7 -20 0 20 40 60 80 100 120 140 Ambient Temperature(°C) www.anpec.com.tw APX7387 Typical Operating Characteristics DT vs. Ambient Temperature 1900 1700 DT(ns) 1500 1300 1100 900 700 500 -40 -20 0 20 40 60 80 100 120 140 Ambient Temperature(°C) Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 8 www.anpec.com.tw APX7387 Block Diagram VB UVLO Noise Canceller Driver Pulse Generator HIN Schmitt Trigger Input R R S HO Q VS LIN Short Through Prevention VCC UVLO Delay Driver Control Logic LO GND Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 9 www.anpec.com.tw APX7387 Typical Application Circuit APX7387 Up to 600V VCC VCC VB HIN HIN HO LIN LIN VS GND LO Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 10 To Load www.anpec.com.tw APX7387 Function Description Switching Time Definition Under Voltage Lockout(UVLO) The APX7387 has under-voltage lockout protection circuitry that monitors the supply voltage (VCC) and bootstrap capacitor voltage (VBS) independently. When HIN/LIN 50% VCC and VBS are lower than the specified threshold voltage the IC will enable the UVLO function. The UVLO 50% tON(H) tOFF(H) tR 90% hysteresis prevents chattering during power supply tF 90% HO transitions. 10% Short-Through Prevention 10% MT1 The APX7387 has short-through prevention circuitry moni- MT2 90% toring the high-side and low-side control inputs. It can be designed to prevent output when the high and low side LO tON(L) tOFF(L) 10% control inputs turning on at same time (see Figure1,2) 90% 10% Figure 3. Switching Time Definition HIN/LIN Short-Through Prevent LIN/HIN HO/LO DT LO/HO DT Figure 1. Short-Through Prevention Waveform 1 HIN/LIN LIN/HIN Short-Through Prevent HO/LO DT LO/HO DT Figure 2. Short-Through Prevention Waveform 2 Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 11 www.anpec.com.tw APX7387 Package Information SOP-8 -T- SEATING PLANE < 4 mils D E E1 SEE VIEW A h X 45 ° c A 0.25 b GAUGE PLANE SEATING PLANE A1 A2 e L VIEW A S Y M B O L SOP-8 INCHES MILLIMETERS MIN. MAX. A MIN. MAX. 1.75 A1 0.10 A2 1.25 b 0.31 0.069 0.010 0.004 0.25 0.049 0.51 0.012 0.020 0.010 c 0.17 0.25 0.007 D 4.80 5.00 0.189 0.197 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.157 e 1.27 BSC 0.050 BSC h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 0 0° 8° 0° 8° Note: 1. Follow JEDEC MS-012 AA. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 12 www.anpec.com.tw APX7387 Package Information DIP-8 E1 D A L 0.38 A2 A1 E D1 c e b eA eB b2 S Y M B O L DIP-8 MILLIMETERS MIN. INCHES MIN. MAX. A MAX. 5.33 0.210 0.015 A1 0.38 A2 2.92 4.95 0.115 0.195 b 0.36 0.56 0.014 0.022 b2 1.14 1.78 0.045 0.070 0.014 0.400 c 0.20 0.35 0.008 D 9.01 10.16 0.355 D1 0.13 E 7.62 8.26 0.300 0.325 E1 6.10 7.11 0.240 0.280 0.005 e 2.54 BSC 0.100 BSC eA 7.62 BSC 0.300 BSC eB L 0.430 10.92 2.92 0.115 3.81 0.150 Note : 1. Followed from JEDEC MS-001 BA 2. Dimension D, D1 and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 10 mil. Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 13 www.anpec.com.tw APX7387 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H T1 C d D 330.0±2.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. P0 P1 P2 D0 D1 T A0 B0 K0 4.0±0.10 8.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 6.40±0.20 5.20±0.20 2.10±0.20 SOP-8 W E1 12.0±0.30 1.75±0.10 F 5.5±0.05 (mm) Devices Per Unit Package Type Unit Quantity SOP-8 Tape & Reel 2500 Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 14 www.anpec.com.tw APX7387 Taping Direction Information SOP-8 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 15 www.anpec.com.tw APX7387 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 16 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APX7387 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.1 - Sep., 2015 17 www.anpec.com.tw