3 kV RMS Dual Channel Digital Isolators ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet FEATURES GENERAL DESCRIPTION Up to 100 Mbps data rate (NRZ) Low propagation delay: 20 ns typical Low dynamic power consumption Bidirectional communication 3 V to 5 V level translation High temperature operation: 125°C High common-mode transient immunity: >25 kV/μs Default high output: ADuM1280/ADuM1281 Default low output: ADuM1285/ADuM1286 Narrow body, RoHS-compliant, 8-lead SOIC Safety and regulatory approvals (pending) UL recognition: 3000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice #5A VDE Certificate Of Conformity DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 VIORM = 560 V peak The ADuM1280/ADuM1281/ADuM1285/ADuM1286 1 (also referred to as ADuM128x in this data sheet) are dual-channel digital isolators based on the Analog Devices, Inc., iCoupler® technology. Combining high speed CMOS and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives, such as optocoupler devices and other integrated couplers. APPLICATIONS General-purpose multichannel isolation Data converter isolation Industrial field bus isolation With propagation delay at 20 ns, pulse width distortion is less than 2 ns for C grade. Channel-to-channel matching is tight at 5 ns for C grade. The two channels of the ADuM128x are independent isolation channels and are available in two channel configurations with three different data rates up to 100 Mbps (see the Ordering Guide). All models operate with the supply voltage on either side ranging from 2.7 V to 5.5 V, providing compatibility with lower voltage systems as well as enabling a voltage translation functionality across the isolation barrier. Unlike other optocoupler alternatives, the ADuM128x isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions. When power is first applied or is not yet applied to the input side, the ADuM1280 and ADuM1281 have a default high output, and the ADuM1285 and ADuM1286 have a default low output. For more information on safety and regulatory approvals, go to http://www.analog.com/icouplersafety. VDD1 1 ADuM1280/ ADuM1285 8 VDD2 VDD1 1 8 VDD2 ENCODE DECODE 7 VOA VOA 2 DECODE ENCODE 7 VIA VIB 3 ENCODE DECODE 6 VOB VIB 3 ENCODE DECODE 6 VOB 5 GND2 5 GND2 10444-001 VIA 2 GND1 4 GND1 4 Figure 1. ADuM1280/ADuM1285 1 ADuM1281/ ADuM1286 10444-002 FUNCTIONAL BLOCK DIAGRAMS Figure 2. ADuM1281/ADuM1286 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved. ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Recommended Operating Conditions .......................................8 Applications ....................................................................................... 1 Absolute Maximum Ratings ............................................................9 General Description ......................................................................... 1 ESD Caution...................................................................................9 Functional Block Diagrams ............................................................. 1 Pin Configurations and Function Descriptions ......................... 10 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 12 Specifications..................................................................................... 3 Applications Information .............................................................. 13 Electrical Characteristics—5 V Operation................................ 3 PC Board Layout ........................................................................ 13 Electrical Characteristics—3 V Operation................................ 4 Propagation Delay-Related Parameters................................... 13 Electrical Characteristics—Mixed 5 V/3 V Operation............ 5 DC Correctness and Magnetic Field Immunity ..................... 13 Electrical Characteristics—Mixed 3 V/5 V Operation............ 6 Power Consumption .................................................................. 14 Package Characteristics ............................................................... 7 Insulation Lifetime ..................................................................... 15 Regulatory Information ............................................................... 7 Outline Dimensions ....................................................................... 16 Insulation and Safety-Related Specifications ............................ 7 Ordering Guide .......................................................................... 16 DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 Insulation Characteristics ............................................................ 8 REVISION HISTORY 5/12—Revision 0: Initial Version Rev. 0 | Page 2 of 16 Data Sheet ADuM1280/ADuM1281/ADuM1285/ADuM1286 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, −40°C ≤ TA ≤ 125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 1. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter Symbol Min PW 1000 A Grade Typ Min Min B Grade Typ Max Min 40 25 35 3 7 Unit Test Conditions 2 ns Mbps ns ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH − tPHL| 10 1 50 10 tPHL, tPLH PWD C Grade Typ Max 13 18 100 24 1.5 3 ps/°C tPSK 38 12 9 ns tPSKCD tPSKOD 5 10 3 6 2 5 ns ns ns 2 1 2 Between any two units at same operating conditions Table 2. Parameter SUPPLY CURRENT ADuM1280/ADuM1285 ADuM1281/ADuM1286 Symbol 1 Mbps–A, B, C Grade Min Typ Min IDD1 IDD2 IDD1 IDD2 1.1 2.7 2.1 2.3 25 Mbps–B Grade Min Typ Max 1.6 4.5 2.6 2.9 6.2 4.8 4.9 4.7 7.0 7.0 6.0 6.4 100 Mbps–B Grade Min Typ Max Unit 20 9.5 15 15.6 mA mA mA mA 25 15 19 19 Test Conditions No load Table 3. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages Symbol Min VIH VIL VOH 0.7 VDDx Logic Low Output Voltages VOL Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis II AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 Refresh Period Typ Max 0.3 VDDx VDDx − 0.1 VDDx − 0.4 −10 5.0 4.8 0.0 0.2 +0.01 0.1 0.4 +10 Test Conditions V V V V V V µA IOx = −20 µA, VIx = VIxH IOx = −4 mA, VIx = VIxH IOx = 20 µA, VIx = VIxL IOx = 4 mA, VIx = VIxL 0 V ≤ VIx ≤ VDDx IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) 0.54 1.6 0.09 0.04 VDDXUV+ VDDXUVVDDXUVH 2.6 2.4 0.2 V V V 2.5 35 ns kV/µs 1.6 µs tR/tF |CM| tr 25 1 0.8 2.0 Unit mA mA mA/Mbps mA/Mbps 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining Vo > 0.8 VDDx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 3 of 16 ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet ELECTRICAL CHARACTERISTICS—3 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire recommended operation range: 2.7 V ≤ VDD1 ≤ 3.6 V, 2.7 V ≤ VDD2 ≤ 3.6 V, −40°C ≤ TA ≤ 125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 4. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing-Direction Jitter Symbol Min PW 1000 A Grade Typ Min Min B Grade Typ Max Min 40 10 1 50 10 tPHL, tPLH PWD C Grade Typ Max 25 35 3 7 20 25 100 33 2.5 1.5 3 Unit Test Conditions ns Mbps ns ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH − tPHL| ps/°C tPSK 38 16 12 ns tPSKCD tPSKOD 5 10 3 6 2.5 5 ns ns ns 2 1 2 Between any two units at same operating conditions 7 Codirectional channel matchi ng is the absol ute value of the difference in propa gation delays betwee n any two c hannels with i nputs on the same side of the isolati on barrier. Opposing-directional channel matching is the abs olute val ue of the differe nce in propagati on delays betwee n any two c hannels wit h inputs on opposi ng sides of the is olation barrier. Table 5. Parameter SUPPLY CURRENT ADuM1280/ADuM1285 ADuM1281/ADuM1286 Symbol 1 Mbps–A, B, C Grade Min Typ Min 0.75 2.0 1.6 1.7 IDD1 IDD2 IDD1 IDD2 25 Mbps–B, C Grade Min Typ Max 5.1 2.7 3.8 3.9 1.4 3.5 2.1 2.3 9.0 4.6 5.0 6.2 100 Mbps–C Grade Min Typ Max 17 4.8 11 11 23 9 15 15 Unit Test Conditions No load mA mA mA mA Table 6. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages Min VIH VIL VOH 0.7 VDDx Logic Low Output Voltages VOL Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDX Hysteresis II AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 Refresh Period 1 Symbol Typ Max 0.3 VDDx VDDx − 0.1 VDDx − 0.4 −10 3.0 2.8 0.0 0.2 +0.01 0.1 0.4 +10 Test Conditions V V V V V V µA IOx = −20 µA, VIx = VIxH IOx = −4 mA, VIx = VIxH IOx = 20 µA, VIx = VIxL IOx = 4 mA, VIx = VIxL 0 V ≤ VIx ≤ VDDx IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) 0.4 1.2 0.08 0.015 VDDxUV+ VDDxUV− VDDxUVH 2.6 2.4 0.2 V V V 3 35 ns kV/µs 1.6 µs tR/tF |CM| tr 25 0.6 1.7 Unit mA mA mA/Mbps mA/Mbps 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining Vo > 0.8 VDDX. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 4 of 16 Data Sheet ADuM1280/ADuM1281/ADuM1285/ADuM1286 ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OPERATION All typical specifications are at TA = 25°C, VDD1 = 5 V, VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire recommended operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 2.7 V ≤ VDD2 ≤ 3.6 V; and −40°C ≤ TA ≤ 125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels unless otherwise noted. Table 7. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing-Direction Jitter Symbol Min PW 1000 A Grade Typ Min Min B Grade Typ Max Min 40 10 1 50 10 tPHL, tPLH PWD 7 C Grade Typ Max 25 35 3 13 20 100 26 2 1.5 3 Unit Test Conditions ns Mbps ns ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH − tPHL| ps/C tPSK 38 16 12 ns tPSKCD tPSKOD 5 10 3 6 2 5 ns ns ns 2 1 2 Between any two units at same operating conditions 7 Codirectional channel matchi ng is the absol ute value of the difference in propa gation delays betwee n any two c hannels with i nputs on the same side of the isolati on barrier. Opposing-directional channel matching is the abs olute val ue of the differe nce in propagati on delays betwee n any two c hannels wit h inputs on opposi ng sides of the is olation barrier. Table 8. Parameter SUPPLY CURRENT ADuM1280/ADuM1285 ADuM1281/ADuM1286 Symbol 1 Mbps–A, B, C Grade Min Typ Min 1.1 2.0 2.1 1.7 IDD1 IDD2 IDD1 IDD2 25 Mbps–B, C Grade Min Typ Max 6.2 2.7 4.9 3.9 1.6 3.5 2.6 2.3 7.0 4.6 6.0 6.2 100 Mbps–C Grade Min Typ Max 20 4.8 15 11 25 9.0 19 15 Unit Test Conditions No load mA mA mA mA Table 9. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages Min VIH VIL VOH 0.7 VDDx Logic Low Output Voltages VOL Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current Undervoltage Lockout Positive VDDX Threshold Negative VDDX Threshold VDDX Hysteresis II AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 Refresh Period 1 Symbol Typ Max 0.3 VDDx VDDx − 0.1 VDDx − 0.4 −10 VDDx VDDx − 0.2 0.0 0.2 +0.01 0.1 0.4 +10 Unit Test Conditions V V V V V V µA IOx = −20 µA, VIx = VIxH IOx = −4 mA, VIx = VIxH IOx = 20 µA, VIx = VIxL IOx = 4 mA, VIx = VIxL 0 V ≤ VIx ≤ VDDx IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) 0.54 1.2 0.09 0.02 VDDxUV+ VDDxUV− VDDxUVH 2.6 2.4 0.2 V V V 2.5 35 ns kV/µs 1.6 µs tR/tF |CM| tr 25 0.75 2.0 mA mA mA/Mbps mA/Mbps 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining Vo > 0.8 VDDX. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 5 of 16 ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = 3.0 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range: 2.7 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; and −40°C ≤ TA ≤ 125°C; unless otherwise noted. Switching specifications are tested with CL=15 pF and CMOS signal levels, unless otherwise noted. Table 10. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing-Direction Jitter Symbol Min PW 1000 A Grade Typ Min Min B Grade Typ Max Min 40 7 Unit Test Conditions 2.5 ns Mbps ns ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH − tPHL| 10 1 50 10 tPHL, tPLH PWD C Grade Typ Max 25 35 3 16 24 100 30 1.5 3 ps/C tPSK 38 16 12 ns tPSKCD tPSKOD 5 10 3 6 2.5 5 ns ns ns 2 1 2 Between any two units at same operating conditions 7 Codirectional channel matchi ng is the absol ute value of the difference in propa gation delays betwee n any two c hannels with i nputs on the same side of the isolati on barrier. Opposing-directional channel matching is the abs olute val ue of the differe nce in propagati on delays betwee n any two c hannels wit h inputs on opposi ng sides of the is olation barrier. Table 11. Parameter SUPPLY CURRENT ADuM1280/ADuM1285 ADuM1281/ADuM1286 Symbol 1 Mbps–A, B, C Grade Min Typ Min 0.75 2.7 1.6 1.7 IDD1 IDD2 IDD1 IDD2 25 Mbps–B, C Grade Min Typ Max 1.4 4.5 2.1 2.3 5.1 4.8 3.8 3.9 9.0 7.0 5.0 6.2 100 Mbps–C Grade Min Typ Max 17 9.5 11 11 23 15 15 15 Unit Test Conditions No load mA mA mA mA Table 12. For All Models Parameter DC SPECIFICATIONS Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages Symbol Min VIH VIL VOH 0.7 VDDx Typ Max 0.3 VDDx VDDx − 0.1 VDDx − 0.4 VDDx VDDx − 0.2 0.0 0.2 Test Conditions V V V V V V µA IOx = −20 µA, VIx = VIxH IOx = −4 mA, VIx = VIxH IOx = 20 µA, VIx = VIxL IOx = 4 mA, VIx = VIxL 0 V ≤ VIx ≤ VDDx Logic Low Output Voltages VOL Input Current per Channel Supply Current per Channel Quiescent Input Supply Current Quiescent Output Supply Current Dynamic Input Supply Current Dynamic Output Supply Current II IDDI(Q) IDDO(Q) IDDI(D) IDDO(D) 0.4 1.6 0.08 0.03 mA mA mA/Mbps mA/Mbps Undervoltage-Lockout Positive VDDX Threshold Negative VDDX Threshold VDDX Hysteresis VDDxUV+ VDDxUV− VDDxUVH 2.6 2.4 0.2 V V V 2.5 35 ns kV/µs 1.6 µs AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity1 Refresh Period tR/tF |CM| tr −10 25 +0.01 1 0.1 0.4 +10 Unit 0.75 2.0 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining Vo > 0.8 VDDX. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 6 of 16 Data Sheet ADuM1280/ADuM1281/ADuM1285/ADuM1286 PACKAGE CHARACTERISTICS Table 13. Parameter Resistance (Input-to-Output) 1 Capacitance (Input-to-Output)1 Input Capacitance 2 IC Junction-to-Ambient Thermal Resistance 1 2 Symbol RI-O CI-O CI θJA Min Typ 1013 2 4.0 85 Max Unit Ω pF pF °C/W Test Conditions f = 1 MHz Thermocouple located at center of package underside The device is considered a 2-terminal device; Pin 1 through Pin 4 are shorted together and Pin 5 through Pin 8 are shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADuM128x is pending approval by the organizations listed in Table 14. See Table 18 and Table 19 for recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 14. UL (Pending) Recognized under UL 1577 Component Recognition Program 1 Single Protection, 3000 V RMS Isolation Voltage File E214100 1 2 CSA (Pending) Approved under CSA Component Acceptance Notice #5A Basic insulation per CSA 60950-1-03 and IEC 60950-1, 400 V rms (565 V peak) maximum working voltage File 205078 VDE (Pending) Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 2 Reinforced insulation, 560 V peak File 2471900-4880-0001 In accordance with UL 1577, each ADuM128x is proof tested by applying an insulation test voltage ≥ 3600 V rms for 1 second (current leakage detection limit = 6 µA). In accordance with DIN V VDE V 0884-10, each ADuM128x is proof tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-10 approval. INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 15. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 3000 4.0 Unit V rms mm min Minimum External Tracking (Creepage) L(I02) 4.0 mm min Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 >400 II mm min V Rev. 0 | Page 7 of 16 Conditions 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Insulation distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 INSULATION CHARACTERISTICS These isolators are suitable for reinforced electrical isolation within the safety limit data only. Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marked on packages denotes DIN V VDE V 0884-10 approval. Table 16. Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms For Rated Mains Voltage ≤ 300 V rms For Rated Mains Voltage ≤ 400 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method B1 Conditions VIORM × 1.875 = Vpd(m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC Input-to-Output Test Voltage, Method A After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd(m), tini=60 sec, tm = 10 sec, partial discharge < 5 pC VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Withstand Isolation Voltage Surge Isolation Voltage Safety Limiting Values 1 minute withstand rating VPEAK = 10 kV, 1.2 µs rise time, 50 µs, 50% fall time Maximum value allowed in the event of a failure (see Figure 3) Case Temperature Side 1 IDD1 Current Insulation Resistance at TS VIO = 500 V Characteristic Unit VIORM Vpd(m) I to IV I to III I to II 40/105/21 2 560 1050 VPEAK VPEAK Vpd(m) 840 VPEAK Vpd(m) 672 VPEAK VIOTM VISO VIOSM 4000 3000 6000 VPEAK VRMS VPEAK TS IS1 RS 150 290 >109 °C mA Ω RECOMMENDED OPERATING CONDITIONS 300 Table 17. 250 Parameter Operating Temperature Supply Voltages 1 Input Signal Rise and Fall Times 200 150 1 50 0 0 50 100 150 AMBIENT TEMPERATURE (°C) 200 Symbol TA VDD1, VDD2 Min −40 2.7 See the DC Correctness and Magnetic Field Immunity section. 100 10444-003 SAFETY-LIMITING CURRENT (mA) Symbol Figure 3. Thermal Derating Curve at VDDx = 5 V, Dependence of SafetyLimiting Values with Case Temperature per DIN V VDE V 0884-10 Rev. 0 | Page 8 of 16 Max +125 5.5 1.0 Unit °C V ms Data Sheet ADuM1280/ADuM1281/ADuM1285/ADuM1286 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 18. Parameter Storage Temperature (TST) Range Ambient Operating Temperature (TA) Range Supply Voltages (VDD1, VDD2) Input Voltages (VIA, VIB) Output Voltages (VOA, VOB) Average Output Current per Pin1 Side 1 (IO1) Side 2 (IO2) Common-Mode Transients2 1 2 Rating −65°C to +150°C −40°C to +125°C −0.5 V to +7.0 V −0.5 V to VDDI + 0.5 V −0.5 V to VDD2 + 0.5 V ESD CAUTION −10 mA to +10 mA −10 mA to +10 mA −100 kV/μs to +100 kV/μs See Figure 3 for maximum rated current values for various temperatures. Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up or permanent damage. Table 19. Maximum Continuous Working Voltage 1 Parameter AC Voltage, Bipolar Waveform AC Voltage, Unipolar Waveform Basic Insulation Reinforced Insulation DC Voltage Basic Insulation Reinforced Insulation 1 Max 565 Unit V peak Constraint 50-year minimum lifetime 1131 560 V peak V peak Maximum approved working voltage per IEC 60950-1 Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 1131 560 V peak V peak Maximum approved working voltage per IEC 60950-1 Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Rev. 0 | Page 9 of 16 ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet VDD1 1 VIA 2 VIB 3 GND1 4 ADuM1280/ ADuM1285 TOP VIEW (Not to Scale) 8 VDD2 7 VOA 6 VOB 5 GND2 10444-004 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 4. ADuM1280/ADuM1285 Pin Configuration Table 20. ADuM1280/ADuM1285 Pin Function Descriptions Mnemonic VDD1 VIA VIB GND1 GND2 VOB VOA VDD2 Description 2.7 V to 5.5 V Supply Voltage for Isolator Side 1. Logic Input A. Logic Input B. Ground 1. Ground reference for Isolator Side 1. Ground 2. Ground reference for Isolator Side 2. Logic Output B. Logic Output A. 2.7 V to 5.5 V Supply Voltage for Isolator Side 2. VDD1 1 VOA 2 VIB 3 GND1 4 VDD2 ADuM1281/ ADuM1286 8 7 VIA TOP VIEW (Not to Scale) 6 VOB 5 GND2 10444-005 Pin No. 1 2 3 4 5 6 7 8 Figure 5. ADuM1281/ADuM1286 Pin Configuration Table 21. ADuM1281/ADuM1286 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic VDD1 VOA VIB GND1 GND2 VOB VIA VDD2 Description 2.7 V to 5.5 V Supply Voltage for Isolator Side 1. Logic Output A. Logic Input B. Ground 1. Ground reference for Isolator Side 1. Ground 2. Ground reference for Isolator Side 2. Logic Output B. Logic Input A. 2.7 V to 5.5 V Supply Voltage for Isolator Side 2. For specific layout guidelines, refer to the AN-1109 Application Note, Recommendations for Control of Radiated Emissions with iCoupler Devices. Rev. 0 | Page 10 of 16 Data Sheet ADuM1280/ADuM1281/ADuM1285/ADuM1286 Table 22. ADuM1280 Truth Table (Positive Logic) VIA Input H L H L L VIB Input H L L H L VDD1 State Powered Powered Powered Powered Unpowered VDD2 State Powered Powered Powered Powered Powered VOA Output H L H L H VOB Output H L L H H X X Powered Unpowered Indeterminate Indeterminate Notes Outputs return to the input state within 1.6 µs of VDDI power restoration. Outputs return to the input state within 1.6 µs of VDDO power restoration. Table 23. ADuM1281 Truth Table (Positive Logic) VIA Input H L H L X VIB Input H L L H L VDD1 State Powered Powered Powered Powered Unpowered VDD2 State Powered Powered Powered Powered Powered VOA Output H L H L Indeterminate VOB Output H L L H H L X Powered Unpowered H Indeterminate Notes Outputs return to the input state within 1.6 µs of VDD1 power restoration. Outputs return to the input state within 1.6 µs of VDDO power restoration. Table 24. ADuM1285 Truth Table (Positive Logic) VIA Input H L H L L VIB Input H L L H L VDD1 State Powered Powered Powered Powered Unpowered VDD2 State Powered Powered Powered Powered Powered VOA Output H L H L L VOB Output H L L H L X X Powered Unpowered Indeterminate Indeterminate Notes Outputs return to the input state within 1.6 µs of VDDI power restoration. Outputs return to the input state within 1.6 µs of VDDO power restoration. Table 25. ADuM1286 Truth Table (Positive Logic) VIA Input H L H L X VIB Input H L L H L VDD1 State Powered Powered Powered Powered Unpowered VDD2 State Powered Powered Powered Powered Powered VOA Output H L H L Indeterminate VOB Output H L L H L L X Powered Unpowered L Indeterminate Rev. 0 | Page 11 of 16 Notes Outputs return to the input state within 1.6 µs of VDD1 power restoration. Outputs return to the input state within 1.6 µs of VDDO power restoration. ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 10 20 8 CURRENT (mA) CURRENT (mA) 15 6 5V 3V 4 5V 10 3V 5 0 10 20 30 40 50 60 70 80 90 100 DATA RATE (Mbps) 0 10444-006 0 0 10 20 30 40 50 60 70 80 90 100 DATA RATE (Mbps) Figure 6. Typical Supply Current per Input Channel vs. Data Rate for 5 V and 3 V Operation 10444-009 2 Figure 9. Typical ADuM1280 or ADuM1285 VDD1 Supply Current vs. Data Rate for 5 V and 3 V Operation 10 20 8 CURRENT (mA) CURRENT (mA) 15 6 4 5V 10 5V 5 2 0 10 20 30 40 50 60 70 80 90 100 DATA RATE (Mbps) 0 10444-007 0 0 10 20 30 40 50 60 70 80 90 100 DATA RATE (Mbps) Figure 7. Typical Supply Current per Output Channel vs. Data Rate for 5 V and 3 V Operation (No Output Load) 10444-010 3V 3V Figure 10. Typical ADuM1280 or ADuM1285 VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation 10 20 8 CURRENT (mA) 6 5V 4 10 5V 3V 5 2 0 0 10 20 30 40 50 60 70 80 90 100 DATA RATE (Mbps) Figure 8. Typical Supply Current per Output Channel vs. Data Rate for 5 V and 3 V Operation (15 pF Output Load) 0 0 10 20 30 40 50 60 DATA RATE (Mbps) 70 80 90 100 10444-011 3V 10444-008 CURRENT (mA) 15 Figure 11. Typical ADuM1281 or ADuM1286 VDD1 or VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation Rev. 0 | Page 12 of 16 Data Sheet ADuM1280/ADuM1281/ADuM1285/ADuM1286 APPLICATIONS INFORMATION PC BOARD LAYOUT The ADuM128x digital isolator requires no external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at both input and output supply pins VDD1 and VDD2 (see Figure 12). The capacitor value should be between 0.01 µF and 0.1 µF. The total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. The ADuM128x can readily meet CISPR 22 Class A (and FCC Class A) emissions standards, as well as the more stringent CISPR 22 Class B (and FCC Class B) standards in an unshielded environment, with proper PCB design choices. Refer to the AN-1109 Applicaton Note, Recommendations for Control of Radiated Emissions with iCoupler Devices for PCBrelated EMI mitigation techniques, including board layout and stack-up issues. PROPAGATION DELAY-RELATED PARAMETERS Propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. The input-tooutput propagation delay time for a high-to-low transition may differ from the propagation delay time of a low-to-high transition. 50% If the decoder receives no pulses for more than about 6.4 µs, the input side is assumed to be unpowered or nonfunctional, in which case, the isolator output is forced to a default low state by the watchdog timer circuit. The limitation on the device’s magnetic field immunity is set by the condition in which induced voltage in the transformer receiving coil is sufficiently large to either falsely set or reset the decoder. The following analysis defines such conditions. The ADuM1280 is examined in a 3 V operating condition because it represents the most susceptible mode of operation of this product. The pulses at the transformer output have an amplitude greater than 1.5 V. The decoder has a sensing threshold of about 1.0 V, therefore establishing a 0.5 V margin in which induced voltages can be tolerated. The voltage induced across the receiving coil is given by V = (−dβ/dt)∑πrn2; n = 1, 2, …, N tPHL OUTPUT (VOx) 10444-012 tPLH Positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. The decoder is bistable and is, therefore, either set or reset by the pulses indicating input logic transitions. In the absence of logic transitions at the input for more than ~1.6 µs, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. 50% Figure 12. Propagation Delay Parameters Pulse width distortion is the maximum difference between these two propagation delay values and an indication of how accurately the timing of the input signal is preserved. Propagation delay skew refers to the maximum amount the propagation delay differs between multiple ADuM128x components operating under the same conditions. Given the geometry of the receiving coil in the ADuM1280 and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated, as shown in Figure 13. 100 MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kgauss) Channel-to-channel matching refers to the maximum amount the propagation delay differs between channels within a single ADuM128x component. where: β is the magnetic flux density. rn is the radius of the nth turn in the receiving coil. N is the number of turns in the receiving coil. 10 1 0.1 0.01 0.001 1k 100k 1M 10k 10M MAGNETIC FIELD FREQUENCY (Hz) 100M Figure 13. Maximum Allowable External Magnetic Flux Density Rev. 0 | Page 13 of 16 10444-013 INPUT (VIx) DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY ADuM1280/ADuM1281/ADuM1285/ADuM1286 For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.08 kgauss induces a voltage of 0.25 V at the receiving coil. This is about 50% of the sensing threshold and does not cause a faulty output transition. If such an event occurs, with the worst-case polarity, during a transmitted pulse, it would reduce the received pulse from >1.0 V to 0.75 V. This is still well above the 0.5 V sensing threshold of the decoder. The preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the ADuM1280 transformers. Figure 14 expresses these allowable current magnitudes as a function of frequency for selected distances. The ADuM1280 is very insensitive to external fields. Only extremely large, high frequency currents, very close to the component could potentially be a concern. For the 1 MHz example noted, one would have to place a 0.2 kA current 5 mm away from the ADuM1280 to affect component operation. Data Sheet Note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces could induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. Take care to avoid PCB structures that form loops. POWER CONSUMPTION The supply current at a given channel of the ADuM128x isolator is a function of the supply voltage, the data rate of the channel, and the output load of the channel. For each input channel, the supply current is given by DISTANCE = 100mm 1 DISTANCE = 5mm 0.1 0.01 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) Figure 14. Maximum Allowable Current for Various Current to ADuM1280 Spacings 100M 10444-014 MAXIMUM ALLOWABLE CURRENT (kA) 10 10k IDDI = IDDI (D) × (2f − fr) + IDDI (Q) f > 0.5 fr IDDO = IDDO (Q) f ≤ 0.5 fr −3 IDDO = (IDDO (D) + (0.5 × 10 ) × CL × VDDO) × (2f − fr) + IDDO (Q) f > 0.5 fr where: IDDI (D), IDDO (D) are the input and output dynamic supply currents per channel (mA/Mbps). CL is the output load capacitance (pF). VDDO is the output supply voltage (V). f is the input logic signal frequency (MHz); it is half the input data rate, expressed in units of Mbps. fr is the input stage refresh rate (Mbps) = 1/tr (µs). IDDI (Q), IDDO (Q) are the specified input and output quiescent supply currents (mA). 100 1k f ≤ 0.5 fr For each output channel, the supply current is given by 1000 DISTANCE = 1m IDDI = IDDI (Q) To calculate the total VDD1 and VDD2 supply current, the supply currents for each input and output channel corresponding to VDD1 and VDD2 are calculated and totaled. Figure 6 and Figure 7 show per-channel supply currents as a function of data rate for an unloaded output condition. Figure 8 shows the per-channel supply current as a function of data rate for a 15 pF output condition. Figure 9 through Figure 11 show the total VDD1 and VDD2 supply current as a function of data rate for ADuM1280/ ADuM1281 channel configurations. Rev. 0 | Page 14 of 16 ADuM1280/ADuM1281/ADuM1285/ADuM1286 INSULATION LIFETIME All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. In addition to the testing performed by the regulatory agencies, Analog Devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the ADuM128x. Analog Devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. The values shown in Table 19 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum CSA/VDE approved working voltages. In many cases, the approved working voltage is higher than the 50-year service life voltage. Operation at these high working voltages can lead to shortened insulation life in some cases. In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. This allows operation at higher working voltages while still achieving a 50-year service life. The working voltages listed in Table 19 can be applied while maintaining the 50-year minimum lifetime provided the voltage conforms to either the unipolar ac or dc voltage case. Any crossinsulation voltage waveform that does not conform to Figure 16 or Figure 17 should be treated as a bipolar ac waveform, and its peak voltage should be limited to the 50-year lifetime voltage value listed in Table 19. Note that the voltage presented in Figure 17 is shown as sinusoidal for illustration purposes only. It is meant to represent any voltage waveform varying between 0 V and some limiting value. The limiting value can be positive or negative, but the voltage cannot cross 0 V. The insulation lifetime of the ADuM128x depends on the voltage waveform type imposed across the isolation barrier. The iCoupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. Figure 15, Figure 16, and Figure 17 illustrate these different isolation voltage waveforms. RATED PEAK VOLTAGE 10444-015 Data Sheet 0V Figure 15. Bipolar AC Waveform 10444-016 RATED PEAK VOLTAGE 0V Figure 16. Unipolar AC Waveform RATED PEAK VOLTAGE 10444-017 Bipolar ac voltage is the most stringent environment. The goal of a 50-year operating lifetime under the ac bipolar condition determines the Analog Devices recommended maximum working voltage. 0V Figure 17. DC Waveform Rev. 0 | Page 15 of 16 ADuM1280/ADuM1281/ADuM1285/ADuM1286 Data Sheet OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Figure 19-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters (inches) ORDERING GUIDE Model 1 ADuM1280ARZ ADuM1280ARZ-RL7 ADuM1280BRZ ADuM1280BRZ-RL7 ADuM1280CRZ ADuM1280CRZ-RL7 ADuM1281ARZ ADuM1281ARZ-RL7 ADuM1281BRZ ADuM1281BRZ-RL7 ADuM1281CRZ ADuM1281CRZ-RL7 ADuM1285ARZ ADuM1285ARZ-RL7 ADuM1285BRZ ADuM1285BRZ-RL7 ADuM1285CRZ ADuM1285CRZ-RL7 ADuM1286ARZ ADuM1286ARZ-RL7 ADuM1286BRZ ADuM1286BRZ-RL7 ADuM1286CRZ ADuM1286CRZ-RL7 1 No. of Inputs, No. of Inputs, VDD1 Side VDD2 Side 2 0 2 0 2 0 2 0 2 0 2 0 1 1 1 1 1 1 1 1 1 1 1 1 2 0 2 0 2 0 2 0 2 0 2 0 1 1 1 1 1 1 1 1 1 1 1 1 Max Data Rate 1 Mbps 1 Mbps 25 Mbps 25 Mbps 100 Mbps 100 Mbps 1 Mbps 1 Mbps 25 Mbps 25 Mbps 100 Mbps 100 Mbps 1 Mbps 1 Mbps 25 Mbps 25 Mbps 100 Mbps 100 Mbps 1 Mbps 1 Mbps 25 Mbps 25 Mbps 100 Mbps 100 Mbps Max Prop Output Temperature Delay, 5 V Default State Range 50 High −40°C to +125°C 50 High −40°C to +125°C 35 High −40°C to +125°C 35 High −40°C to +125°C 24 High −40°C to +125°C 24 High −40°C to +125°C 50 High −40°C to +125°C 50 High −40°C to +125°C 35 High −40°C to +125°C 35 High −40°C to +125°C 24 High −40°C to +125°C 24 High −40°C to +125°C 50 Low −40°C to +125°C 50 Low −40°C to +125°C 35 Low −40°C to +125°C 35 Low −40°C to +125°C 24 Low −40°C to +125°C 24 Low −40°C to +125°C 50 Low −40°C to +125°C 50 Low −40°C to +125°C 35 Low −40°C to +125°C 35 Low −40°C to +125°C 24 Low −40°C to +125°C 24 Low −40°C to +125°C Z = RoHS Compliant Part. ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10444-0-5/12(0) Rev. 0 | Page 16 of 16 Package Description 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N 7” Tape and Reel Package Option R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8