Data Sheet

IBC Module
IB0xxQ096T70xx-xx
5:1 Intermediate Bus Converter Module: Up to 750 W Output
Features
• Input: 36 – 60 Vdc
• 98.2% peak efficiency
(38 – 55 Vdc for IB048x)
• Low profile: 0.42” height above board
• Output: 9.6 Vdc at 48 Vin
• Industry standard 1/4 Brick pinout
• Output current: up to 70 A
Size:
2.30 x 1.45 x 0.42 in
58,4 x 36,8 x 10,6 mm
• Sine Amplitude Converter
• Output power: up to 750 W
[A]
• Low noise 1 MHz ZVS/ZCS
• 2,250 Vdc isolation
(1,500 Vdc isolation for IB048x)
[A]
Lower power model available.
Product Overview
The Intermediate Bus Converter (IBC) Module is a very efficient, low profile, isolated, fixed
ratio converter for power system applications in enterprise and optical access networks.
Rated at up to 530 W from 38 Vin and up to 750 W from 55 Vin, the IBC conforms to
an industry standard quarter-brick footprint while supplying power greatly exceeding
competitive quarter-bricks. Its leading efficiency enables full load operation at 50°C
with only 400 LFM airflow. Its small cross section facilitates unimpeded airflow — above
and below its thin body — to minimize the temperature rise of downstream
components. A baseplate option is available for alternative cooling schemes.
Applications
• Enterprise networks
• Optical access networks
• Storage networks
• Automated test equipment
PART NUMBER DESIGNATION
Input
Voltage
Function
I
B
0
x
IB = Intermediate
Bus Converter
048 = 38 - 55 Vdc
050 = 36 - 60 Vdc
054 = 36 - 60 Vdc*
Package
x
Q
Output Voltage
(Nom.) x 10
0
Q = Quarter Brick
Format
9
Temperature Grade
6
T
Output
Current
7
T = -40°C ≤ TOPERATING ≤ +100°C
-40°C ≤ TSTORAGE ≤ +125°C
096 = (VOUT nominal @ VIN = 48 Vdc) X 10
(5:1 transfer ratio)
Enable
Logic
Pin
Length
x
x
0
N = Negative
P = Positive
70 = Max Rated Output Current
*w/operating transient to 75 Vdc
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1 = 0.145 in
2 = 0.210 in
3 = 0.180 in
Options
-
x
x
00 = Open frame
BP = Baseplate
IB0xxQ096T70xx-xx
SPECIFICATIONS
All specifications valid at 48 VIN , 100% rated load and 25°C ambient, unless otherwise indicated.
Absolute Maximum Ratings
Input voltage (+In to –In)
Min
Max
Unit
Notes
-0.5
75
Vdc
See Input Range
Specific Characteristics for details
5
V/µs
Input voltage slew rate
EN to –IN
-0.5
20
Vdc
Output voltage (+Out to –Out)
-0.5
(See note)
Vdc
See OVP setpoint max
70
A
Pout ≤ 750 W
Vdc
1 min.
Hottest Semiconductor
Output current
Dielectric withstand
(input to output)
2,250
(1,500 for IB048x)
Temperature
Operating junction
-40
125
°C
Storage
-55
125
°C
Electrical Characteristics
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
38
48
55
75
Vdc
Vdc
0.003
5
V/µs
33
31
2
38
36
7
200
Vdc
Vdc
Vdc
µs
µs
64
64
4
11
12.8
Vdc
Vdc
µs
Vdc
Vdc
INPUT RANGE SPECIFIC CHARACTERISTICS
IB048Q096T70xx-xx
Operating input voltage
Non-operating input surge withstand
<100 ms
Operating input dv/dt
Undervoltage protection
Turn-on
Turn-off
Turn-on/ Turn-off hysteresis
Time constant
Undervoltage blanking time
UV blanking time is enabled after start up
Overvoltage protection
Turn-off
Turn-on
Time constant
DC Output voltage band
Output OVP set point
50
100
60
55
No load, over Vin range
Module will shut down
Input to output and input to baseplate,
1 min
Output to baseplate
Dielectric withstand
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7.6
12
9.6
1,500
Vdc
707
Vdc
IB0xxQ096T70xx-xx
SPECIFICATIONS (CONT.)
All specifications valid at 48 VIN , 100% rated load and 25°C ambient, unless otherwise indicated.
Electrical Characteristics (Continued)
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
36
48
60
75
Vdc
Vdc
0.003
5
V/µs
31
29
2
36
34
7
200
Vdc
Vdc
Vdc
µs
µs
69
69
4
12.0
13.8
Vdc
Vdc
µs
Vdc
Vdc
INPUT RANGE SPECIFIC CHARACTERISTICS CONT.
IB050Q096T70xx-xx
Operating input voltage
Non-operating input surge withstand
<100 ms
Operating input dv/dt
Undervoltage protection
Turn-on
Turn-off
Turn-on/ Turn-off hysteresis
Time constant
Undervoltage blanking time
UV blanking time is enabled after start up
Overvoltage protection
Turn-off
Turn-on
Time constant
DC Output voltage band
Output OVP set point
50
100
65
60
No load, over Vin range
Module will shut down
Input to output and input to baseplate,
1 min
Output to baseplate
Dielectric withstand
IB054Q096T70xx-xx
Operating input voltage
Operating input surge withstand
7.2
13
9.6
2,250
Vdc
707
Vdc
36
48
60
75
Vdc
Vdc
0.003
5
V/µs
31
29
2
36
34
7
200
Vdc
Vdc
Vdc
µs
µs
79.5
78
4
12.0
15.9
Vdc
Vdc
µs
Vdc
Vdc
<100 ms
Operating input dv/dt
Undervoltage protection
Turn-on
Turn-off
Turn-on/ Turn-off hysteresis
Time constant
Undervoltage blanking time
UV blanking time is enabled after start up
Overvoltage protection
Turn-off
Turn-on
Time constant
DC Output voltage band
Output OVP set point
50
100
76
75
No load, over Vin range
Module will shut down
Input to output and input to baseplate,
1 min
Output to baseplate
Dielectric withstand
7.2
15.2
9.6
2,250
Vdc
707
Vdc
COMMON INPUT SPECIFICATIONS
Turn ON delay
VIN reaching turn-on voltage
to enable function operational, see Figure 7
Enable to 10% VOUT; pre-applied VIN,
see Figure 8, 0 load capacitance
Start up inhibit
Turn-on delay
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20
25
30
ms
75
µs
IB0xxQ096T70xx-xx
SPECIFICATIONS (CONT.)
All specifications valid at 48 VIN , 100% rated load and 25°C ambient, unless otherwise indicated.
Electrical Characteristics (Continued)
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
50
µs
250
ms
3.5
0.15
14.1
10.5
W
W
A
A
750
mArms
40
25
A
A
µF
nH
47
470
µF
0
750
70
W
A
15
%
mΩ
COMMON INPUT SPECIFICATIONS CONT.
From 10% to 90% VOUT, 10% load,
0 load capacitance
See page 12 for restart after EN pin disable
Output voltage rise time
Restart turn-on delay
No Load power dissipation
Enabled
Disabled
Input current
Inrush current overshoot
2.5
0.12
Low line, full load
Using test circuit in Figure 22, 15% load, high line
At max power;
Using test circuit in Figure 23; see Fig 6
Input reflected ripple current
Peak short circuit input current
Repetitive short circuit peak current
Internal input capacitance
Internal input inductance
Recommended external
input capacitance
17.6
5
200 nH maximum source inductance
OUTPUT
Output power [a]
Output current
P ≤ 750 W
of Iout max, maximum output capacitance
Output start up load
Effective output resistance
Line regulation (K factor)
Current share accuracy
Efficiency
50% load
Full load
Internal output inductance
Internal output capacitance
Load capacitance
0.198
See Figures 1-3
See Figures 1-3
97.8
96.9
Output Overload protection threshold
Over current protection time constant
Short circuit current response time
Switching frequency
Dyanmic response - Load
Vo overshoot/undershoot
Vo response time
Dyanmic response - Line
0.2020
10
%
4500
%
%
nH
µF
µF
150
mVp-p
150
%
1.2
1.5
ms
µs
MHz
100
mV
µs
1.25
V
98.1
97.3
1.6
92.4
0
20 MHz bandwidth (Figure 16),
using test circuit in Figure 24
Of Iout max., will not shutdown when started
into max Cout; and 15% load
Auto restart with duty cycle <10%
Output voltage ripple
60
105
1.0
Load change: +/- 25% of IOUT Max,
Slew rate (di/dt) = 1 A/µs.
See Figures: 11-14
Line step of 5 V in 1 µs, within VIN operating
range. (CIN = 500 uF, CO = 350 uF)
(Figure 15 illustrates similar converter response
when subjected to a more severe line transient.)
Vo overshoot
[a]
VOUT = K • VIN @ no load
Full power operation; See Parallel Operation
on page 13; up to 3 units
3.1
0.200
1
Does not exceed IPC-9592 derating guidelines. At 70°C ambient, full power operation may exceed IPC-9592 guidelines, but does not exceed
component ratings, does not activate OTP and does not compromise reliability.
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SPECIFICATIONS (CONT.)
Electrical Characteristics (Continued)
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
12
Vdc
Typ
Max
Unit
130
200
2.4
10
OUTPUT CONT.
Unit will start up into a pre-bias
voltage on the output.
Pre-bias voltage
0
Control & Interface Specifications
Attribute
Symbol
Enable (negative logic)
Module enable threshold
Module enable current
Module disable threshold
Module disable current
Disable hysteresis
Enable pin open circuit voltage
Attribute
0.8
VEN = 0.8 V
VEN = 2.4 V
500
2.5
Open circuit
Referenced to –IN
3.0
35
2.0
2.5
4.7
5
VEN = 5 V
Vdc
µA
Vdc
µA
mV
Vdc
kΩ
3.0
1.45
2
5.3
Vdc
Vdc
mA
Vdc
Conditions: 25°C case, 75% rated load and specified input voltage range unless otherwise specified.
Symbol
MTBF
Service life
Conditions / Notes
Calculated per Telcordia SR-332, 40°C
Calculated at 30°C
TJ ; Converter will reset when over
temperature condition is removed
Over temperature shut down
Mechanical
Weight
Length
Width
Height above customer board
Pin Solderability
Moisture Sensitivity Level
Clearance to customer board
Min
Referenced to –IN
EN to –IN resistance
Enable (positive logic)
Module enable threshold
Module disable threshold
EN source current (operating)
EN voltage (operating)
General Characteristics
Conditions / Notes
Min
Typ
Max
1.0
7
125
Mhrs
Years
130
135
°C
1
oz/g
in/mm
in/mm
in/mm
Years
1.38 /39.1
2.30 /58.4
1.45 /36.8
0.42/10.6
MSL
Agency approvals
Altitude, operating
Relative humidity, Operating
RoHS compliance
Storage life for normal solderability
Not applicable, for wave soldering only
From lowest component on IBC
UL/CSA 60950-1
UL/CSA 60950-1, EN60950-1
Low voltage directive (2006/95/EC)
Derate operating temp 1°C
per 1,000 feet above sea level
Non condensing
Compatible with RoHS directive 2002/95/EC
IBC MODULE
Rev 1.1
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Unit
0.12/0.30
in/mm
cURus
cTUVus
CE
-500
10,000
Feet
10
90
%
IB0xxQ096T70xx-xx
SPECIFICATIONS (CONT.)
IPC-9592A, Based on Class II Category 2 the following detail is applicable.
Environmental Qualification
Test Description
5.2.3 HALT (Highly Accelerated Life testing)
Test Detail
Low Temp
High Temp
Rapid Thermal Cycling
6 DOF Random Vibration Test
Input Voltage Test
Output Load Test
Combined Stresses Test
Min. Quantity Tested
3
3
3
3
3
3
3
5.2.4 THB (Temp. Humidity Bias)
(72 hr presoak required) 1000 hrs – Continuous Bias
5.2.5 HTOB (High Temp. Operating Bias)
Power cycle - On 42 minutes
Off 1 minute, On 1 minute, Off 1 minute, On 1 minute, Off 1 minute,
On 1 minute, Off 1 minute, On 1 minute, Off 10 minutes. Alternating
between maximum and minimum operating Voltage every hour.
5.2.6 TC (Temp. Cycling)
700 cycles , 30 minute dwell at each extreme – 20C minimum ramp rate.
30
5.2.7 PTC (Power & Temp. Cycling)
Reference IPC-9592A
3
5.2.8 – 5.2.13 Shock and Vibration
Random Vibration – Operating IEC 60068-2-64 (normal operation vibration)
Random Vibration Non-operating (transportation) IEC 60068-2-64
Shock Operating - normal operation shock IEC 60068-2-27
Free fall - IEC 60068-2-32
Drop Test 1 full shipping container (box)
5.2.14 Other Environmental Tests
5.2.14.1 Corrosion Resistance – Not required
5.2.14.2 Dust Resistance – Unpotted class II GR-1274-CORE
5.2.14.3 SMT Attachment Reliability IPC-9701 - J-STD-002
5.2.14.4 Through Hole solderability – J-STD-002
ESD Classification Testing
HBM testing - JESD22-A114
Total Quantity (est.)
30
30
3
3
3
3
One full carton
N/A
3
N/A
5
3
161
IBC MODULE
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SPECIFICATIONS (CONT.)
99%
99%
98%
98%
97%
97%
Efficiency (%)
Efficiency (%)
WAVEFORMS
96%
95%
94%
96%
95%
94%
93%
93%
92%
92%
0
14
28
42
56
0
70
14
38 Vin
VIN :
48 Vin
38 Vin
VIN :
55 Vin
42
56
70
48 Vin
55 Vin
Figure 2 — Efficiency vs. output current @ VIN, 55°C ambient
Figure 1 — Efficiency vs. output current @ VIN, 25°C ambient
20
99%
98%
16
97%
Power (W)
Efficiency (%)
28
Output Current (A)
Output Current (A)
96%
95%
12
8
94%
4
93%
92%
0
0
14
28
42
56
70
0
14
Output Current (A)
VIN :
38 Vin
48 Vin
28
42
56
70
Output Current (A)
55 Vin
VIN :
38 Vin
48 Vin
55 Vin
Figure 3 — Efficiency vs. output current @ VIN, 70°C ambient
Figure 4 — Power dissapation vs. ouput current @ VIN, 25°C ambient
Figure 5 — Inrush current at high line 15% load; 5 A/div,
Max load capacitance
Figure 6 — Input reflected ripple current at nominal line, full load.
See Fig 23 for setup.
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SPECIFICATIONS (CONT.)
WAVEFORMS (CONT.)
Figure 7 — Turn on delay time;
VIN turn on delay at nominal line, 15% load
Figure 8 — Turn-on delay time via Enable at nominal line, 15% load
0 load capacitance. Also illustrates VO Overshoot at turn-on
Figure 9 — Output voltage rise time at nominal line, 10% load
0 load capacitance
Figure 10 — Undershoot at turn off at nominal line, 15% load
0 load capacitance
Figure 11 — Load transient response; nominal line
Load step 75– 100%
Figure 12 — Load transient response; Full load to 75%; nominal line
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SPECIFICATIONS (CONT.)
WAVEFORMS (CONT.)
Figure 13 — Load transient response; nominal line
Load step 0 – 25%
Figure 14 — Load transient response; 25–0%; nominal line
Figure 15 — Input transient response;
Vin step low line to high line at full load
Figure 16 — Output ripple; Nominal line, full load
Figure 17 — Two modules parallel array test. VOUT and IIN change when
one module is disabled. Nominal VIN, IOUT = 70 A
Figure 18 — Two modules parallel array test. VOUT and IIN change when
one module is enabled. Nominal VIN, IOUT = 70 A
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SPECIFICATIONS (CONT.)
80
80
70
70
Output Current (A)
Output Current (A)
WAVEFORMS (CONT.)
60
50
40
30
20
10
60
50
40
30
20
10
0
0
25
35
45
55
65
75
85
95
25
35
Ambient Air Temperature (°C)
200 LFM
400 LFM
45
55
65
75
85
95
Ambient Air Temperature (°C)
600 LFM
200 LFM
Figure 19 — Output current derating vs. ambient air temperature
@ VIN nominal. Transverse airflow. Board and junction
temperatures within IPC-9592 derating guidelines
400 LFM
600 LFM
Figure 20 — Output current derating vs. ambient air temperature
@ VIN nominal. Longitudinal airflow. Board and junction
temperatures within IPC-9592 derating guidelines
900
800
600
Current Probe
500
+IN
+
400
Vsource
300
EN
_
47 µF
+OUT
IBC
–IN
200
Load
Power (W)
700
–OUT
100
*Maximum load capacitance
0
36
40
44
48
52
56
60
Input Voltge (Vdc)
Figure 21 — Maximum output power vs. input voltage
Figure 22 — Test circuit; inrush current overshoot
10 µF
+IN
0.1 µF
+OUT
IBC
–IN
Current Probe
+
Vsource
_
470 µF
+IN
EN
–OUT
+OUT
Load
10 µH
E – Load
IBC
–IN
–OUT
Cya
Cyc
Cyb
Cyd
20 MHz BW
Cy a-d = 4700 pF
Figure 23 — Test circuit; input reflected ripple current
Figure 24 — Test circuit; output voltage ripple
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C*
IB0xxQ096T70xx-xx
SPECIFICATIONS (CONT.)
THERMAL DATA
Figure 25 — Thermal plot, 200 LFM, 25°C, 48 Vin, 670 W output power
Figure 26 — Thermal plot, 200 LFM, 25°C, 48 Vin, 670 W output power
Figure 27 — Thermal plot, 400 LFM, 25°C, 48 Vin, 670 W output power
Figure 28 — Thermal plot, 400 LFM, 25°C, 48 Vin, 670 W output power
Figure 29 — Thermal plot, 600 LFM, 25°C, 48 Vin, 670 W output power
Figure 30 — Thermal plot, 600 LFM, 25°C, 48 Vin, 670 W output power
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PIN / CONTROL FUNCTIONS
+In / -In – DC Voltage Input Pins
The IBC input voltage range should not be exceeded. An internal
undervoltage/overvoltage lockout function prevents operation outside of
the normal operating input range. The IBC turns on within an input voltage
window bounded by the “Input under-voltage turn-on” and “Input
over-voltage turn-off” levels, as specified. The IBC may be protected against
accidental application of a reverse input voltage by the addition of a
rectifier in series with the positive input, or a reverse rectifier in shunt with
the positive input located on the load side of the input fuse.
The connection of the IBC to its power source should be implemented with
minimal distribution inductance. If the interconnect inductance exceeds
100 nH, the input should be bypassed with a RC damper to retain low
source impedance and stable operation. With an interconnect inductance
of 200 nH, the RC damper may be 47 µF in series with 0.3 Ω. A single
electrolytic or equivalent low-Q capacitor may be used in place of the series
RC bypass.
2
Top View
3
4
Pin
1
2
3
4
5
EN - Enable/Disable
Negative Logic Option
If the EN port is left floating, the IBC output is disabled. Once this port ispulled lower than 0.8 Vdc with respect to –In, the output is enabled. The
EN port can be driven by a relay, opto-coupler, or open collector transistor.
Refer to Figures 7 and 8 for the typical enable / disable characteristics. This
port should not be toggled at a rate higher than 1 Hz. The EN port should
also not be driven by or pulled up to an external voltage source.
5
1
Figure 31 — IBC Pin Designations
Positive Logic Option
If the EN port is left floating, the IBC output is enabled. Once this port is
pulled lower than 1.4 Vdc with respect to –In, the output is disabled. This
action can be realized by employing a relay, opto-coupler, or open collector
transistor. This port should not be toggled at a rate higher than 1 Hz.
The EN port should also not be driven by or pulled up to an external voltage source. The EN port can source up to 2 mA at 5 Vdc. The EN port
should never be used to sink current.
If the IBC is disabled using the EN pin, the module will attempt to restart
approximately every 250ms. Once the module has been disabled for at least
250ms, the turn on delay after the EN pin is enabled will be as shown in
Figure 8.
+Out / -Out – DC Voltage Output Pins
Total load capacitance at the output of the IBC should not exceed the
specified maximum. Owing to the wide bandwidth and low output
impedance of the IBC, low frequency bypass capacitance and significant
energy storage may be more densely and efficiently provided by adding
capacitance at the input of the IBC.
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Rev 1.1
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Function
Vin+
Enable
VinVoutVout+
IB0xxQ096T70xx-xx
APPLICATIONS NOTE
Parallel Operation
Input Impedance Recommendations
The IBC will inherently current share when operated in an array. Arrays may
be used for higher power or redundancy in an application. Current sharing
accuracy is maximized when the source and load impedance presented to
each IBC within an array are equal. The recommended method to achieve
matched impedances is to dedicate common copper planes within the PCB
to deliver and return the current to the array, rather than rely upon traces
of varying lengths. In typical applications the current being delivered to the
load is larger than that sourced from the input, allowing narrower traces to
be utilized on the input side if necessary. The use of dedicated power
planes is, however, preferable.
To take full advantage of the IBC capabilities, the impedance presented to
its input terminals must be low from DC to approximately 5 MHz.
The source should exhibit low inductance and should have a critically
damped response. If the interconnect inductance is excessive, the IBC input
pins should be bypassed with an RC damper (e.g., 47 µF in series with
0.3 Ω) to retain low source impedance and proper operation. Given the
wide bandwidth of the IBC, the source response is generally the limiting
factor in the overall system response.
One or more IBCs in an array may be disabled without adversely affecting
operation or reliability as long as the load does not exceed the rated power
of the enabled IBCs.
The IBC power train and control architecture allow bi-directional power
transfer, including reverse power processing from the IBC output to its
input. The IBC’s ability to process power in reverse improves the IBC transient response to an output load dump.
Thermal Considerations
The temperature distribution of the VI Brick can vary significantly
with its input /output operating conditions, thermal management and
environmental conditions. Although the PCB is UL rated to 130°C, it is
recommended that PCB temperatures be maintained at or below 125°C.
For maximum long term reliability, lower PCB temperatures are
recommended for continuous operation, however, short periods of
operation at 125°C will not negatively impact performance or reliability.
Anomalies in the response of the source will appear at the output of the
IBC multiplied by its K factor. The DC resistance of the source should be
kept as low as possible to minimize voltage deviations. This is especially
important if the IBC is operated near low or high line as the
overvoltage/undervoltage detection circuitry could be activated.
Input Fuse Recommendations
The IBC is not internally fused in order to provide flexibility in configuring
power systems. However, input line fusing of VI Bricks must always be
incorporated within the power system. A fast acting fuse should be placed
in series with the +In port. See safety agency approvals.
Application Notes
For IBC and VI Brick application notes on soldering, thermal management,
board layout, and system design visit vicorpower.com.
WARNING: Thermal and voltage hazards. The IBC can operate with surface
temperatures and operating voltages that may be hazardous to personnel.
Ensure that adequate protection is in place to avoid inadvertent contact.
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IBC BLOCK DIAGRAM
Reverse
Current
Protection
Current
Transformer
FET Drive
Transformer
Secondary
Main
Transformer
Current
Sense
FET Drive
Transformer
Primary
Lr
Cr
⎯
Q
Controller
Q
Current
Sense
Voltage
Sense
EN
-IN
+IN
UVLO
OVLO
Sensing
CIN
V2 (VCC)
VB
Switching
Regulator
FET Drive
Transformer
Primary
FET Drive
Transformer
Secondary
Resonant
Tank
IBC Block Diagram
FET Drive
Transformer
Secondary
Primary
Isolation
Barrier
Secondary
COUT
-OUT
+OUT
The Sine Amplitude Converter TM (SAC TM) uses a high frequency resonant tank to transfer energy from input to output. The resonant tank is formed by Cr and
leakage inductance from the main transformer, Lr, as shown in the block diagram. The controller regulates switching frequency of the FET drivers, monitors
current sensing, and provides undervoltage and overvoltage protection.
Figure 32 — IBC Block diagram
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MECHANICAL DRAWINGS
.417 ± .025
[10.58 ± .64]
.180
[4.57]
.11
[2.9]
Figure 33 — IBC Outline drawing
2.300
58.42
.150
3.81
.210
5.33
h
.725
18.42
1.030
26.16
<>
1.450
36.83
.063 THRU
1.59
M3 x .50
TAP THRU
(4) PL.
h
1.860
47.24
<>
.220
5.59
.450±.025
11.43±.64
.180
4.57
.040
1.02
(3) PL.
.02
.6
.093
2.36
(3) PL.
.125
3.18
(2) PL.
.060
1.52
(2) PL.
Figure 34 — IBC outline drawing - baseplate option
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View of underneath panel
IB0xxQ096T70xx-xx
MECHANICAL DRAWINGS
Top View
Figure 35 — IBC PCB recommended hole pattern
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Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power
systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are
used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Vicor’s Standard Terms and Conditions
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Product Warranty
In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the “Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment and is
not transferable.
UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS
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Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform
when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the
user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
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and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages.
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Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is
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The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,786;
7,166,898; 7,187,263; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965.
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Andover, MA, USA 01810
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email
Customer Service: [email protected]
Technical Support: [email protected]
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