S-19611A www.sii-ic.com MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER © SII Semiconductor Corporation, 2014 Rev.1.0_01 The mini-analog series is a group of ICs that incorporate a general purpose analog circuit in a small package. The S-19611A is an auto-zero operation, zero-drift operational amplifier that has input and output of low input offset voltage and Rail-to-Rail*1. The S-19611A is suitable for applications requiring less offset voltage. The S-19611A is a dual operational amplifier (with 2 circuits). *1. Rail-to-Rail is a trademark of Motorola, Inc. Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product in the purpose, contact to SII Semiconductor Corporation is indispensable. Features • Low input offset voltage: • • • • • • • VIO = 17 μV max. (Ta = +25°C) VIO = 100 μV max. (Ta = −40°C to +105°C) Operation power supply voltage range: VDD = 2.65 V to 5.50 V Low current consumption (Per circuit): IDD = 200 μA typ. No external parts required for internal phase compensation Rail-to-Rail input and output Operation temperature range: Ta = −40°C to +105°C Lead-free (Sn 100%), halogen-free AEC-Q100 qualified*1 *1. Contact our sales office for details. Applications • Various sensor interfaces • High-accuracy current detection • Strain gauge amplifier Package • TMSOP-8 1 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Block Diagram VDD IN1(+) + IN1(−) − OUT1 IN2(+) + IN2(−) − OUT2 VSS Figure 1 2 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A AEC-Q100 Qualified This IC supports AEC-Q100 for the operation temperature grade 2. Contact our sales office for details of AEC-Q100 reliability specification. Product Name Structure Refer to "1. Product name" regarding the contents of product name, "2. drawings and "3. 1. Package" regarding the package Product name list" regarding the product type. Product name S-19611A B 0 H - K8T2 U Environmental code U: Lead-free (Sn 100%), halogen-free Product name abbreviation and IC packing specifications*1 K8T2: TMSOP-8, Tape Operation temperature H: Ta = −40°C to +105°C Number of circuits B: 2 *1. 2. Refer to the tape drawing. Package Table 1 Package Name TMSOP-8 3. Package Drawing Codes Dimension FM008-A-P-SD Tape FM008-A-C-SD Reel FM008-A-R-SD Product name list Table 2 Product Name S-19611AB0H-K8T2U Package TMSOP-8 3 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Pin Configuration 1. TMSOP-8 Table 3 Top view 1 2 3 4 Figure 2 4 Pin No. 8 7 6 5 1 2 3 4 5 6 7 8 Symbol OUT1 IN1(−) IN1(+) VSS IN2(+) IN2(−) OUT2 VDD Description Output pin 1 Inverted input pin 1 Non-inverted input pin 1 GND pin Non-inverted input pin 2 Inverted input pin 2 Output pin 2 Positive power supply pin MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Absolute Maximum Ratings Table 4 Item Power supply voltage Input voltage Output voltage Differential input voltage Output pin current Operation ambient temperature Storage temperature Caution Symbol VDD VIN(+), VIN(−) VOUT VIND ISOURCE ISINK Topr Tstg (Ta = +25°C unless otherwise specified) Absolute Maximum Rating Unit VSS − 0.3 to VSS + 6.0 V VSS − 0.3 to VDD + 0.3 V VSS − 0.3 to VDD + 0.3 V ±5.5 V 10.0 mA 10.0 mA −40 to +105 °C −55 to +125 °C The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Thermal Resistance Value Table 5 Item Symbol Condition Board 1 TMSOP-8 θja Junction-to-ambient thermal resistance*1 Board 2 *1. Test environment: compliance with JEDEC STANDARD JESD51-2A Remark Min. − − Typ. 160 133 Max. − − Unit °C/W °C/W Refer to " Thermal Characteristics" for details of power dissipation and test board. 5 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Electrical Characteristics Table 6 (VDD = 5.0 V, Ta = +25°C unless otherwise specified) DC Electrical Characteristics Item Operation power supply voltage range Current consumption (2 circuits) Condition Min. Typ. Max. Unit Test Circuit VDD Ta = −40°C to +105°C 2.65 5.00 5.50 V − IDD VCMR = VOUT = VDD / 2, Ta = −40°C to +105°C − 400 600 μA 5 −17 ±1 +17 μV 1 −100 ±1 +100 μV 1 − ±0.1 − μV/°C 1 − − − − ±140 ±300 ±70 ±3000 − − − − pA pA pA pA − − − − VSS − 0.1 − VDD + 0.1 V 2 106 130 − dB 8 4.9 − − V 3 − − 0.1 V 4 100 130 − dB 2 95 120 − dB 1 0.8 2.5 − mA 6 1.0 2.9 − mA 7 Symbol VCMR = VDD / 2 Input offset voltage Input offset voltage drift VIO ΔVIO ΔTa Input offset current IIO Input bias current IBIAS Common-mode input voltage range VCMR Voltage gain (open loop) AVOL VOH Maximum output swing voltage VOL Common-mode input signal rejection ratio Power supply voltage rejection ratio CMRR PSRR Source current ISOURCE Sink current ISINK VCMR = VDD / 2, Ta = −40°C to +105°C VCMR = VDD / 2, Ta = −40°C to +105°C − Ta = −40°C to +105°C − Ta = −40°C to +105°C Ta = −40°C to +105°C VSS + 0.1 V ≤ VOUT ≤ VDD − 0.1 V, VCMR = VDD / 2, RL = 10 kΩ, Ta = −40°C to +105°C RL = 10 kΩ, Ta = −40°C to +105°C RL = 10 kΩ, Ta = −40°C to +105°C VSS − 0.1 V ≤ VCMR ≤ VDD + 0.1 V, Ta = −40°C to +105°C VDD = 2.65 V to 5.50 V, Ta = −40°C to +105°C VOUT = VDD − 0.1 V, Ta = −40°C to +105°C VOUT = 0.1 V, Ta = −40°C to +105°C Table 7 (VDD = 5.0 V, Ta = +25°C unless otherwise specified) AC Electrical Characteristics Item Symbol Slew rate SR Gain-bandwidth product GBP 6 Condition RL = 1.0 MΩ, CL = 15 pF (Refer to Figure 11) CL = 0 pF Min. Typ. Max. Unit − 0.22 − V/μs − 320 − kHz MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Test Circuits (Per circuit) 1. Power supply voltage rejection ratio, input offset voltage CF • Power supply voltage rejection ratio (PSRR) The power supply voltage rejection ratio (PSRR) can be calculated by the following expression, with VOUT measured at each VDD. RF VDDN VDD RS − D.U.T + RS RF + NULL − VOUT CF Test conditions: VDD = 2.65 V: VDD = VDD1, VOUT = VOUT1 VDD = 5.50 V: VDD = VDD2, VOUT = VOUT2 VSSN PSRR = 20 log VCMR = VDD / 2 Figure 3 × RF + RS RS • Input offset voltage (VIO) Test Circuit 1 VIO = 2. VDD1 − VDD2 VDD1 VDD2 VOUT1 − 2 − VOUT2 − 2 VOUT − VDD 2 × RS RF + RS Common-mode input signal rejection ratio, common-mode input voltage range CF • Common-mode input signal rejection ratio (CMRR) The common-mode input signal rejection ratio (CMRR) can be calculated by the following expression, with VOUT measured at each VIN. RF VDDN VDD RS − D.U.T + RS RF + NULL − CF VOUT Test conditions: VIN = VCMR Max.: VIN = VIN1, VOUT = VOUT1 VIN = VCMR Min.: VIN = VIN2, VOUT = VOUT2 VSSN VM = VDD / 2 VIN CMRR = 20 log VIN1 − VIN2 RF + RS × R S (VOUT1 − VIN1) − (VOUT2 − VIN2) • Common-mode input voltage range (VCMR) Figure 4 Test Circuit 2 The common-mode input voltage range is the range of VIN in which VOUT satisfies the common-mode input signal rejection ratio specifications. 7 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A 3. Maximum output swing voltage • Maximum output swing voltage (VOH) VDD − VOH + Test conditions: VDD VIN1 = 2 − 0.1 V VDD VIN2 = 2 + 0.1 V RL = 10 kΩ RL VIN1 Figure 5 4. VDD / 2 VIN2 Test Circuit 3 Maximum output swing voltage VDD VDD / 2 • Maximum output swing voltage (VOL) RL − + VIN1 VIN2 Figure 6 8 Test Circuit 4 VOL Test conditions: VDD VIN1 = 2 + 0.1 V VDD VIN2 = 2 − 0.1 V RL = 10 kΩ MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A 5. Current consumption • Current consumption (IDD) VDD A − + VCMR = VDD / 2 Figure 7 6. Test Circuit 5 Source current • Source current (ISOURCE) VDD − + VIN1 VOUT VIN2 Figure 8 7. A Test conditions: VOUT = VDD − 0.1 V VDD VIN1 = 2 − 0.1 V VDD VIN2 = 2 + 0.1 V Test Circuit 6 Sink current VDD VOUT A − + VIN1 • Sink current (ISINK) Test conditions: VOUT = 0.1 V VDD VIN1 = 2 + 0.1 V VDD VIN2 = 2 − 0.1 V VIN2 Figure 9 Test Circuit 7 9 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A 8. Voltage gain • Voltage gain (open loop) (AVOL) CF VDD RS VDDN − D.U.T + RS RF CF VCMR = VDD / 2 + NULL − RL VOUT VSSN Test conditions: VM = VDD − 0.1 V: VM = VM1, VOUT = VOUT1 VM = 0.1 V: VM = VM2, VOUT = VOUT2 AVOL = 20 log VM VDD / 2 Figure 10 9. RF The voltage gain (AVOL) can be calculated by the following expression, with VOUT measured at each VM. VM1 − VM2 RF + RS × R S VOUT1 − VOUT2 RL = 10 kΩ Test Circuit 8 Slew rate Measured by the voltage follower circuit. tR = tF = 20 ns (VSS to VDD) VDD • Slew rate (SR) VIN(+) VSS (= 0 V) When falling V × 0.8 SR = DD t THL tTHL VDD × 0.9 VOUT (= VIN(-)) tTLH Figure 11 10 VDD × 0.1 When rising V × 0 .8 SR = DD t TLH MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Usage Examples VDD CF RF [Example of Gain = 1000 times] RS = 1 kΩ RF = 1 MΩ CF = 1000 pF RS − VIN VOUT + [Example of Gain = 100 times] RS = 1 kΩ RF = 100 kΩ CF = 1000 pF RS RF CF VCMR = VDD / 2 Figure 12 Differential Amplifier Circuit VDD VDD + RF VOUT − RS − VIN + RF VIN VOUT RS VCMR = VDD / 2 VCMR = VDD / 2 Figure 13 Inverting Amplifier Circuit ILOAD VSUPPLY RS + − VOUT Caution + RSENSE − RS RF CF Figure 15 CF RF RS RSENSE RS VDD VDC CF RF Non-inverting Amplifier Circuit VDD VDC RLOAD Figure 14 Low-side Current Detection Circuit RLOAD ILOAD Figure 16 VOUT RF CF High-side Current Detection Circuit The above connection diagram and constant will not guarantee successful operation. Perform through evaluation using the actual application to set the constant. 11 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Precautions • Generally an operational amplifier may cause oscillation depending on the selection of external parts. Perform thorough evaluation using the actual application to set the constant. • Do not apply an electrostatic discharge to this IC that exceeds performance ratings of the built-in electrostatic protection circuit. • SII Semiconductor Corporation claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. • Use this IC with the output current of 10 mA or less. • When the output voltage is used in the range of VDD − 100 mV or more, or VSS + 100 mV or less, the operation may become unstable depending on the circuit configuration. Contact our sales office for details. • When using the voltage follower circuit (Gain = 1 time), insert a resistor of 470 Ω or more for the stable operation, as shown in Figure 17. The operation may be unstable depending on the value of the load capacitance connected to the output pin, even when the voltage follower circuit is not used. Use the product under thorough evaluation. VDD VIN+ + VIN− − VOUT 470 Ω or more VSS Load capacitance Figure 17 Caution 12 The above connection diagram and constant will not guarantee successful operation. Perform through evaluation using the actual application to set the constant. MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Characteristics (Typical Data) 1. Current consumption (IDD) (2 circuits) vs. Power supply voltage (VDD) VSS = 0 V 500 Ta = 40C IDD [A] 400 300 Ta = 25C 200 Ta = 105C 100 0 2 4 VDD [V] 5 6 VDD = 2.65 V, VSS = 0 V 140 120 Ta = 25C 100 80 Ta = 40C 60 Ta = 105C 40 20 0 1 10 100 1000 0.001 0.01 0.1 f [kHz] AVOL [dB] AVOL [dB] Voltage gain (AVOL) vs. Frequency (f) AVOL [dB] 2. 3 VDD = 3.00 V, VSS = 0 V 140 120 Ta = 25C 100 80 Ta = 40C 60 Ta = 105C 40 20 0 0.001 0.01 0.1 1 10 100 1000 f [kHz] VDD = 5.50 V, VSS = 0 V 140 120 Ta = 25C 100 80 Ta = 40C 60 Ta = 105C 40 20 0 0.001 0.01 0.1 1 10 100 1000 f [kHz] 13 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A 3. Output current ISOURCE [mA] 3. 1 Source current (ISOURCE) vs. Power supply voltage (VDD) VOH = VDD − 0.1 V, VSS = 0 V 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Ta = 40C Ta = 25C Ta = 105C 2 3. 2 3 5 6 Sink current (ISINK) vs. Power supply voltage (VDD) VOL = VSS + 0.1 V, VSS = 0 V 5.0 4.0 ISINK [mA] 4 VDD [V] Ta = 40C 3.0 2.0 Ta = 25C 1.0 Ta = 105C 0.0 2 3. 3 3 4 VDD [V] 5 6 Output voltage (VOUT) vs. Source current (ISOURCE) VDD = 2.65 V, VSS = 0 V VDD = 3.00 V, VSS = 0 V 2.5 Ta = 40C 2.0 Ta = 25C VOUT [V] VOUT [V] 3.0 1.5 Ta = 105C 1.0 0.5 0.0 0 5 10 ISOURCE [mA] 15 20 VDD = 5.50 V, VSS = 0 V VOUT [V] 6.0 5.0 Ta = 40C 4.0 Ta = 25C 3.0 Ta = 105C 2.0 1.0 0.0 0 14 20 40 ISOURCE [mA] 60 80 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Ta = 40C Ta = 25C Ta = 105C 0 5 10 15 ISOURCE [mA] 20 25 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A 3. 4 Output voltage (VOUT) vs. Sink current (ISINK) VDD = 2.65 V, VSS = 0 V 3.0 2.0 VOUT [V] VOUT [V] 2.5 Ta = 25C 1.5 Ta = 105C 1.0 0.5 Ta = 40C 0.0 0 5 10 ISINK [mA] 15 VDD = 3.0 V, VSS = 0 V 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Ta = 25C Ta = 105C Ta = 40C 0 20 5 10 15 ISINK [mA] 20 25 VDD = 5.5 V, VSS = 0 V 6.0 VOUT [V] 5.0 4.0 Ta = 25C 3.0 Ta = 105C 2.0 1.0 Ta = 40C 0.0 0 20 40 ISINK [mA] 60 80 4. Input-referred noise voltage vs. Frequency (f) Ta = 105C Ta = 25C Ta = 40C 10 10 100 1000 10000 Voltage Noise [nVHz] f [Hz] VDD = 3.00 V, VSS = 0 V Voltage Noise [nVHz] Voltage Noise [nVHz] VDD = 2.65 V, VSS = 0 V 100 100 Ta = 105C Ta = 25C Ta = 40C 10 10 100 1000 10000 f [Hz] VDD = 5.50 V, VSS = 0 V 100 Ta = 105C Ta = 25C Ta = 40C 10 10 100 1000 10000 f [Hz] 15 MINI ANALOG SERIES FOR AUTOMOTIVE 105°C OPERATION LOW INPUT OFFSET VOLTAGE CMOS OPERATIONAL AMPLIFIER Rev.1.0_01 S-19611A Thermal Characteristics 1. TMSOP-8 Tj = 125C max. Power dissipation (PD) [W] 1.0 0.6 Board 1 0.63 W 0.4 0.2 0 Figure 18 1. 1 Board 2 0.75 W 0.8 0 50 100 150 Ambient temperature (Ta) [C] Power Dissipation of Package (When Mounted on Board) Board 1 76.2 mm 114.3 mm Table 8 Figure 19 1. 2 Item Thermal resistance value (θja) Size Material Number of copper foil layer 1 2 Copper foil layer 3 4 Thermal via 160°C/W 114.3 mm × 76.2 mm × t1.6 mm FR-4 2 Land pattern and wiring for testing: t0.070 mm − − 74.2 mm × 74.2 mm × t0.070 mm − Board 2 76.2 mm Table 9 114.3 mm Figure 20 16 Specification Item Thermal resistance value (θja) Size Material Number of copper foil layer 1 2 Copper foil layer 3 4 Thermal via Specification 133°C/W 114.3 mm × 76.2 mm × t1.6 mm FR-4 4 Land pattern and wiring for testing: t0.070 mm 74.2 mm × 74.2 mm × t0.035 mm 74.2 mm × 74.2 mm × t0.035 mm 74.2 mm × 74.2 mm × t0.070 mm − 2.90±0.2 8 5 1 4 0.13±0.1 0.2±0.1 0.65±0.1 No. FM008-A-P-SD-1.1 TITLE TMSOP8-A-PKG Dimensions No. FM008-A-P-SD-1.1 SCALE UNIT mm SII Semiconductor Corporation 2.00±0.05 4.00±0.1 4.00±0.1 1.00±0.1 +0.1 1.5 -0 1.05±0.05 0.30±0.05 3.25±0.05 4 1 5 8 Feed direction No. FM008-A-C-SD-2.0 TITLE TMSOP8-A-Carrier Tape FM008-A-C-SD-2.0 No. SCALE UNIT mm SII Semiconductor Corporation 16.5max. 13.0±0.3 Enlarged drawing in the central part 13±0.2 (60°) (60°) No. FM008-A-R-SD-1.0 TITLE TMSOP8-A-Reel No. FM008-A-R-SD-1.0 SCALE QTY. UNIT 4,000 mm SII Semiconductor Corporation Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. SII Semiconductor Corporation is not responsible for damages caused by the reasons other than the products or infringement of third-party intellectual property rights and any other rights due to the use of the information described herein. 3. SII Semiconductor Corporation is not responsible for damages caused by the incorrect information described herein. 4. Take care to use the products described herein within their specified ranges. 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