DS9173A 20

®
RT9173/A
Peak 3A Bus Termination Regulator
General Description
Features
The RT9173/A regulator is designed to convert voltage
supplies ranging from 1.6V to 6V into a desired output
voltage which adjusted by two external voltage divider
resistors. The regulator is capable of sourcing or sinking
up to 3A of peak current while regulating an output voltage
z
to within 2% (DDR 1) and 3% (DDR 2) or less.
z
The RT9173/A, used in conjunction with series termination
resistors, provides an excellent voltage source for active
termination schemes of high speed transmission lines as
those seen in high speed memory buses and distributed
backplane designs. The voltage output of the regulator
can be used as a termination voltage for DDR SDRAM.
Current limits in both sourcing and sinking mode, plus
on-chip thermal shutdown make the circuit tolerant of the
output fault conditions.
Ordering Information
RT9173/A
z
z
z
z
z
z
z
z
z
z
SOP-8, TO-252-5 and TO-263-5 Packages
Capable of Sourcing and Sinking 3A Peak Current
Current-limiting Protection
Thermal Protection
Integrated Power MOSFETs
Generates Termination Voltages for SSTL-2
High Accuracy Output Voltage at Full-Load
Adjustable VOUT by External Resistors
Minimum External Components
Shutdown for Standby or Suspend Mode
Operation with High-impedance Output
RoHS Compliant and 100% Lead (Pb)-Free
Applications
z
z
z
Package Type
M5 : TO-263-5
L5 : TO-252-5
S : SOP-8
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Support Both DDR 1 (1.25VTT) and DDR 2
(0.9VTT) Requirements
DDR Memory Termination
Active Termination Buses
Supply Splitter
Pin Configurations
(TOP VIEW)
3A Sink & Source
1.5A Sink & Source
Note :
`
VOUT
4
REFEN
3
VCNTL (TAB)
2
GND
1
VIN
TO-263-5 (RT9173A)
Richtek products are :
`
5
5
VOUT
RoHS compliant and compatible with the current require-
4
REFEN
ments of IPC/JEDEC J-STD-020.
3
VCNTL (TAB)
Suitable for use in SnPb or Pb-free soldering processes.
2
GND
1
VIN
TO-252-5 (RT9173A)
8
VCNTL
GND
2
7
VCNTL
REFEN
3
6
VCNTL
VOUT
4
5
VCNTL
VIN
SOP-8 (RT9173)
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9173/A-20 November 2011
is a registered trademark of Richtek Technology Corporation.
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1
RT9173/A
Typical Application Circuit
VCNTL = 3.3V
VIN = 2.5V
RTT
R1
VIN
2N7002
EN
VCNTL
CIN
RT9173/A
REFEN
VOUT
CSS
R2
CCNTL
COUT
GND
RDUMMY
R1 = R2 = 100kΩ, RTT = 50Ω / 33Ω / 25Ω
COUT(MIN) = 10μF (Ceramic) + 1000μF under the worst case testing condition
RDUMMY = 1kΩ as for VOUT discharge when VIN is not present but VCNTL is present
CSS = 1μF, CIN = 470μF (Low ESR), CCNTL = 47μF
Test Circuit
2.5V
3.3V
VIN
VCNTL
RT9173/A
VOUT
REFEN
1.25V
VOUT
GND
COUT
V
IL
Figure 1. Output Voltage Tolerance, ΔVLOAD
3.3V
2.5V
A
VIN
1.25V
VCNTL
RT9173/A
REFEN
VOUT
V OUT
1.25V
0V
0.2V
GND
RL
C OUT
V
R L and C OUT
Time deleay
Figure 2. Current in Shutdown Mode, ISHDN
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is a registered trademark of Richtek Technology Corporation.
DS9173/A-20 November 2011
RT9173/A
2.5V
3.3V
VIN
VCNTL
RT9173/A
REFEN
VOUT
1.25V
VOUT
A
GND
COUT
V
IL
Figure 3. Current Limit for High Side, ILIMIT
Power Supply
with Current Limit
3.3V
2.5V
VIN
A
VCNTL
IL
RT9173/A
REFEN
VOUT
1.25V
GND
V OUT
COUT
V
Figure 4. Current Limit for Low Side, ILIMIT
3.3V
2.5V
VIN
1.25V
V REFEN
VCNTL
RT9173/A
REFEN
VOUT
GND
0.2V
V OUT
RL
C OUT
V
1.25V
V OUT
0V
V OUT would be low if VREFEN < 0.2V
V OUT would be high if VREFEN > 0.8V
R L and COUT
Time deleay
Figure 5. REFEN Pin Shutdown Threshold, VTRIGGER
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9173/A-20 November 2011
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RT9173/A
Functional Pin Description
Pin Name
Pin Function
VIN
Power Input Voltage
GND
Ground
VCNTL
Gate Drive Voltage
REFEN
Reference Voltage Input and Chip Enable
VOUT
Output Voltage
Function Block Diagram
VCNTL
VIN
Current
Limiting Sensor
REFEN
CNTL
VOUT
Thermal
GND
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is a registered trademark of Richtek Technology Corporation.
DS9173/A-20 November 2011
RT9173/A
Absolute Maximum Ratings
z
z
z
z
z
z
z
Input Voltage --------------------------------------------------------------------------------------------------------------- 7V
Power Dissipation -------------------------------------------------------------------------------------------------------- Internally Limited
ESD Rating ---------------------------------------------------------------------------------------------------------------- 2kV
Storage Temperature Range ------------------------------------------------------------------------------------------- −65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------ 260°C
Power Dissipation, PD @ TA = 25°C
TO-263-5 -------------------------------------------------------------------------------------------------------------------- 1.923W
TO-252-5 -------------------------------------------------------------------------------------------------------------------- 1.471W
SOP-8 ----------------------------------------------------------------------------------------------------------------------- 0.625W
Package Thermal Resistance (Note 1)
TO-263-5, θJC ------------------------------------------------------------------------------------------------------------- 7.7°C/W
TO-252-5, θJC ------------------------------------------------------------------------------------------------------------- 8°C/W
SOP-8, θJC ----------------------------------------------------------------------------------------------------------------- 23.2°C /W
TO-263-5,θJA --------------------------------------------------------------------------------------------------------------- 52°C/W
TO-252-5, θJA -------------------------------------------------------------------------------------------------------------- 68°C/W
SOP-8, θJA ----------------------------------------------------------------------------------------------------------------- 160°C/W
Recommended Operating Conditions
z
z
z
z
(Note 4)
Input Voltage, VIN -------------------------------------------------------------------------------------------------------- 2.5V to 1.5V ± 3%
Control Voltage, VCNTL ------------------------------------------------------------------------------------------------ 5V or 3.3V ± 5%
Junction Temperature Range ------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 2.5V, VCNTL = 3.3V, VREFEN = 1.25V, COUT = 10μF (Ceramic), TA = 25°C, unless otherwise specified.)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
IOUT = 0A, Figure 1 (Note 2)
-20
0
20
mV
IL : 0A → 1.5A, Figure 1
--
0.8/1.2
2/3
IL : 0A → -1.5A
--
0.8/1.2
2/3
1.6
2.5/1.8
--
Output Offset Voltage
V OS
Load Regulation (DDR 1/2)
ΔVLOAD
Input Voltage Range (DDR 1/2)
V IN
Keep VCNTL ≥ V IN on operation power
(Note 3)
V CNTL
on and power off sequences
--
3.3
6
Operating Current of VCNTL
ICNTL
No Load
--
6.5
10
mA
Current In Shutdown Mode
ISHDN
V REFEN < 0.2V, RL = 180Ω, Figure 2
--
50
90
μA
ILIMIT
Figure 3,4
3.0
--
--
A
Thermal Shutdown Temperature T SD
3.3V ≤ VCNTL ≤ 5V
125
150
--
°C
Thermal Shutdown Hysteresis
Guaranteed by design
--
50
--
°C
V TRIGGER Output = High, Figure 5
0.8
--
--
V TRIGGER Output = Low, Figure 5
--
--
0.2
%
V
Short Circuit Protection
Current limit
Over Temperature Protection
Shutdown Function
Shutdown Threshold Trigger
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9173/A-20 November 2011
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RT9173/A
Note 1. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board (single Layers,
1S) of JEDEC 51-3 thermal measurement standard. The case point of θJC is on the on the center of VCTRL pins (Lead
6 & 7) for SOP-8 packages, the center of heat sink (tab) for TO-252-5 and TO-263-5 packages.
Note 2. VOS offset is the voltage measurement defined as VOUT subtracted from VREFEN.
Note 3. For safely operate your system, the 3.3V rail MUST be tied to VCNTL rather than 5V rail, especially for the new part of
RT9173ACL5.
Note 4. The device is not guaranteed to function outside its operating conditions.
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DS9173/A-20 November 2011
RT9173/A
Typical Operating Characteristics
Sinking Current (Peak) vs. Temperature
8.0
7.0
7.0
Sinking Current (A) A
Sourcing Current (A)
Sourcing Current (Peak) vs. Temperature
8.0
6.0
5.0
4.0
3.0
2.0
VCNTL = 3.3V
VIN = 2.5V
VOUT = 1.25V
1.0
6.0
5.0
4.0
3.0
2.0
VCNTL = 3.3V
VIN = 2.5V
VOUT = 1.25V
1.0
0.0
0.0
-40
-20
0
20
40
60
80
100
-40
120
-20
0
Temperature (°C)
650
650
600
550
500
VCNTL = 3.3V
VIN = 2.5V
-40
120
550
500
450
VCNTL = 5.0V
VIN = 2.5V
-20
0
20
40
60
80
100
-40
120
-20
VIN = 2.5V
VREFEN =
50
VCNTL = 3.3V
Swing Frequency = 1KHz
0
≈
Output Current (A)
≈
1
0
-1
-2
Time (250μs/Div)
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9173/A-20 November 2011
20
40
60
80
100
120
1.25VTT @ 3A Transient Response
Output Transient
Voltage (mV)
100
0
Temperature (°C)
1.25VTT @ 1.5A Transient Response
Output Transient
Voltage (mV)
100
600
Temperature (°C)
Output Current (A)
80
400
400
2
60
Turn-On Threshold vs. Temperature
700
Threshold Voltage (mV)
Threshold Voltage (mV)
Turn-On Threshold vs. Temperature
-50
40
Temperature (°C)
700
450
20
100
VIN = 2.5V
VREFEN =
50
VCNTL = 3.3V
Swing Frequency = 1KHz
0
-50
4
≈
≈
2
0
-2
-4
Time (250μs/Div)
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RT9173/A
VCNTL = 3.3V
Swing Frequency = 1KHz
0
-50
2
≈
≈
Output Transient
Voltage (mV)
VIN = 1.8V
VREFEN = 0.9V
50
0.9VTT @ 3A Transient Response
Output Current (A)
Output Current (A)
Output Transient
Voltage (mV)
0.9VTT @ 1.5A Transient Response
100
1
0
-1
-2
100
VIN = 1.8V
VREFEN = 0.9V
50
0
-50
4
≈
≈
2
0
-2
-4
Time (250Aμs/Div)
Time (250μs/Div)
RDS(ON) vs. Temperature
RDS(ON) vs. Temperature
0.32
0.31
VIN = 0.9V
0.30
VIN = 0.8V
0.26
R DS(ON) (Ω)
R DS(ON) (Ω)
0.30
0.28
0.27
0.28
0.24
0.25
0.22
VIN = 0.8V
0.27
0.26
VCNTL = 3.3V
VREFEN = 1.0V
VIN = 0.85V
0.29
0.25
0.23
VIN = 0.9V
0.31
VIN = 0.85V
0.29
VCNTL = 5.0V
VREFEN = 1.0V
0.24
0.23
25
35
45
55
65
75
85
95
105 115 125
25
35
Temperature (°C)
VIN = 2.5V
VCNTL = 3.3V
VREFEN = 1.25V
Output Short Circuit (A)
8
6
4
2
0
-2
Force the output shorted to VDDQ
-4
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8
65
75
85
Source
95
105 115 125
VIN = 2.5V
VCNTL = 3.3V
VREFEN = 1.25V
10
8
6
4
2
0
-2
-4
Time (5ms/Div)
55
Output Short-Circuit Protection
12
Output Short Circuit (A)
Sink
10
45
Temperature (°C)
Output Short-Circuit Protection
12
VCNTL = 3.3V
Swing Frequency = 1KHz
Force the output shorted to ground
Time (5ms/Div)
is a registered trademark of Richtek Technology Corporation.
DS9173/A-20 November 2011
RT9173/A
Application Information
Internal Parasitic Diode
Thermal Consideration
Avoid forward-bias internal parasitic diode, VOUT to VCNTL,
and VOUT to VIN, the VOUT should not be forced some
voltage respect to ground on this pin while the VCNTL or
VIN is disappeared.
RT9173/A regulators have internal thermal limiting circuitry
designed to protect the device during overload conditions.
For continued operation, do not exceed absolute maximum
operation junction temperature 125°C. The power
dissipation definition in device is :
Consideration while Designs the Resistance of
Voltage Divider
Make sure the sinking current capability of pull-down NMOS
if the lower resistance was chosen so that the voltage on
VREFEN is below 0.2V.
In addition, the capacitor and voltage divider form the lowpass filter. There are two reasons doing this design; one
is for output voltage soft-start while another is for noise
immunity.
How to reduce power dissipation on Notebook PC
or the dual channel DDR SDRAM application?
In notebook application, using RichTek's Patent
"Distributed Bus Terminator Topology" with choosing
RichTek's product is encouraged.
Distributed Bus Terminating Topology
Terminator Resistor
R0
BUS(0)
R1
BUS(1)
RT9173/A
VOUT
R2
R3
R4
REFEN
R5
BUS(2)
BUS(3)
BUS(4)
BUS(5)
R6
BUS(6)
RT9173/A
VOUT
R7
R8
R9
RN
RN+1
BUS(7)
BUS(8)
BUS(9)
BUS(N)
BUS(N+1)
PD = (VIN - VOUT) x IOUT + VIN x IQ
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = ( TJ(MAX) -TA ) /θJA
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and
the θJA is the junction to ambient thermal resistance. The
junction to ambient thermal resistance θJA highly depends
on IC package, PCB layout, and the rate of surroundings
airflow. θJA for SOP-8 package is 160°C/W and TO-263-5
package is 52°C/W on standard JEDEC 51-3 (single
layer, 1S) thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
PD(MAX) = (125°C - 25°C) / (160 °C/W)= 0.625W (SOP-8
package)
PD(MAX) = (125°C- 25°C) / (52 °C/W)= 1.923W (TO- 2635 package )
Since the multiple VCTRL pins of the SOP-8 package are
internally fused and connected to lead frame, it is efficient
to dissipate the heat by adding cooper area on VCTRL
footprint. Figure 7 shows the package sectional drawing
of SOP-8. Every package has several thermal dissipation
paths, as show in Figure 8, the thermal resistance
equivalent circuit of SOP-8. The path 2 is the main path
of thermal flow due to these materials thermal conductivity.
We define the center of multiple VCTRL pins are the case
point of the path 2.
Figure 6
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RT9173/A
θJA vs. Copper Area
100
Molding Compound
Lead Frame
90
Die Pad
80
θ JA (°C/W)
Case Point
Die
70
60
50
Ambient
Molding Compound
Gold Wire
40
Lead Frame
SOP-8
2S2P thermal test board
30
Die Pad
0
10
20
30
40
50
60
70
80
90
100
2
Copper Area (mm )
Figure 7. The Package Section Drawing of RT9173/A
SOP-8 Package
Figure 9. Thermal Resistance θJA vs. Copper Area of
SOP-8 Packages
Thermal Resistance vs. Cooper Area
The thermal resistance θJA of IC package is determined
by the package design and the PCB design. However, the
package design has been decided. If possible, it's useful
to increase thermal performance by the PCB design. The
thermal resistance can be decreased efficiently by adding
copper under the main path of thermal flow on the
package.
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT9173/A package, the Figure 9 and
the Figure 10 show the thermal resistance θJA vs. copper
area of SOP-8 and TO-263-5 packages on single layer
(1S) and 4-layer (2S2P) thermal test board at TA = 25°C,
PCB copper thickness = 2oz.
RGOLD-LINE
RLEAD FRAME
path 1
Junction
RDIE
RPCB
Internally Fused
RDIE-ATTACH RDIE-PAD RLEAD FRAME
RPCB
Ambient
path 2
RMOLDING-COMPOUND
path 3
Figure 8. Thermal Resistance Equivalent Circuit of
RT9173/A SOP-8 Package
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Thermal Resistance (°C/W)
70
60
1S thermal test board
50
40
2S2P thermal test board
30
20
10
TO-263-5
0
0
50
100
150
200
250
300
350
400
2
Cooper Area (mm )
Figure 10. Thermal Resistance θJA vs. Copper Area of
TO-263-5 Packages
For example, as shown in Figure 9, RT9173/A SOP-8 with
10mm x 10mm cooper area on 4-layers (2S2P) thermal
test board at TA = 25°C, we can obtain the lower thermal
resistance about 45°C/W. The power maximum dissipation
can be calculated as :
PD(MAX) = (125°C - 25°C) / (45 °C/W) = 2.22W (SOP-8)
As shown in Figure 10, RT9173/A TO-263-5 with
15mm x 15mm cooper area on 4-layers (2S2P) thermal
test board at TA = 25°C, we can obtain the lower thermal
resistance about 29°C/W. The power maximum dissipation
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DS9173/A-20 November 2011
RT9173/A
can be calculated as :
PD(MAX) = (125°C - 25°C) / (29°C/W) = 3.45W (TO-263-5)
Figure 11 and Figure 12 of power dissipation vs. copper
area allow the designer to see the effect of rising ambient
temperature on the maximum power allowed.
Power Dissipation vs. Copper Area
100
2S2P thermal test
board
80
TA = 65°C
2
Copper Area (mm )
90
70
TA = 55°C
60
TA = 25°C
50
40
30
20
10
SOP-8
0
0
0.5
1
1.5
2
2.5
3
Power Dissipation (W)
Figure 11. Power Dissipation vs. Copper Area of SOP-8
Package
Cooper Area vs. Power Dissipation
400
2S2P thermal test
board
2
Cooper Area (mm )
350
300
250
200
150
100
TA = 65°C
TA = 55°C
TA = 25°C
50
TO-263-5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Power Dissipation (W)
Figure 12. Power Dissipation vs. Copper Area of
TO-263-5 Package
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DS9173/A-20 November 2011
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RT9173/A
Outline Dimension
C
D
U
B
V
E
L1
L2
b
e
b2
A
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
D
9.652
10.668
0.380
0.420
B
1.143
1.676
0.045
0.066
E
8.128
9.652
0.320
0.380
A
4.064
4.826
0.160
0.190
C
1.143
1.397
0.045
0.055
U
6.223 Ref.
0.245 Ref.
V
7.620 Ref.
0.300 Ref.
L1
14.605
15.875
0.575
0.625
L2
2.286
2.794
0.090
0.110
b
0.660
0.914
0.026
0.036
b2
0.305
0.584
0.012
0.023
e
1.524
1.829
0.060
0.072
5-Lead TO-263 Plastic Surface Mount Package
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DS9173/A-20 November 2011
RT9173/A
E
C2
R
b3
L3
T
V
S
D
H
L
b
P
L2
A
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
2.184
2.388
0.086
0.094
b
0.381
0.889
0.015
0.035
b3
4.953
5.461
0.195
0.215
C2
0.457
0.889
0.018
0.035
D
5.334
6.223
0.210
0.245
E
6.350
6.731
0.250
0.265
H
9.000
10.414
0.354
0.410
L
0.508
1.780
0.020
0.070
L2
L3
0.508 Ref.
0.889
2.032
0.020 Ref.
0.035
0.080
P
1.270 Ref.
0.050 Ref.
V
5.200 Ref.
0.205 Ref.
R
0.200
1.500
0.008
0.059
S
2.500
3.400
0.098
0.134
T
0.500
0.850
0.020
0.033
5-Lead TO-252 Surface Mount Package
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DS9173/A-20 November 2011
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RT9173/A
H
A
M
J
B
F
C
I
D
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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