DS9297 02

®
RT9297
3A High Performance Step-Up DC/DC Converter
General Description
Features
The RT9297 includes a high performance step-up DC/DC
converter that provides a regulated supply voltage for activematrix thin-film transistor (TFT) liquid-crystal displays
(LCDs).
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High Efficiency Up to 90%
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Adjustable Output Voltage : VDD to 24V
Wide Input Supply Voltage : 2.6V to 5.5V
Input Under Voltage Lockout
Pin-Programmable Switching Frequency 640kHz/
1.2MHz
Programmable Soft-Start
Small 10-Lead WDFN Package
RoHS Compliant and Halogen Free
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The Boost Converter incorporates current mode, fixedfrequency, pulse-width modulation (PWM) circuitry with
a built-in N-Channel power MOSFET to achieve high
efficiency and fast transient response.
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The RT9297 is available in a WDFN -10L 3x3 package.
Applications
Ordering Information
z
RT9297
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Package Type
QW : WDFN-10L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
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Notebook Computer Displays
LCD Monitor Panels
LCD TV Panels
Pin Configurations
Richtek products are :
`
COMP
FB
EN
GND
GND
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
1
2
3
4
5
GND
(TOP VIEW)
Note :
11
10
9
8
7
6
SS
FREQ
VDD
LX
LX
WDFN-10L 3x3
Marking Information
EZ= : Product Code
EZ=YM
DNN
YMDNN : Date Code
Typical Application Circuit
L1
VDD
2.6V to 5.5V
C1
R3
C3
June 2012
VAVDD
RT9297
6, 7
8 VDD
LX
9
2
FREQ
FB
3 EN
CSS
1
COMP
10
SS
GND
4, 5,
11 (Exposed Pad)
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DS9297-02
D1
C2
R1
R2
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1
RT9297
Function Block Diagram
LX
VIN
VFB
EN
4µA
SoftStart
Protection
SS
COMP
Error
Amplifier
-
FB
1.24V
+
Summing
Comparator
+
Control
and
Driver
Logic
Clock
FREQ
VDD
Oscillator
Slope
Compensation
LX
GND
Current
Sense
4µA
Functional Pin Description
Pin No.
Pin Name
Pin Function
COMP
Compensation Pin for Error Amplifier. Connect a series RC from COMP to
ground.
2
FB
Feedback. The feedback regulation voltage is 1.24V nominal. Connect an
external resistive voltage-divider between the step-up regulator’s output (VAVDD)
and GND, with the center tap connected to FB. Place the divider close to the IC
and minimize the trace area to reduce noise coupling.
3
EN
Enable Control Input. Drive EN low to turn off the Boost Converter.
GND
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
LX
Switch. LX is the drain of the internal MOSFET. Connect the inductor/rectifier
diode junction to LX and minimize the trace area for lower EMI.
8
VDD
Supply Pin. Bypass VDD with a minimum 1μF ceramic capacitor directly to GND.
9
FREQ
Frequency-Select Input. When FREQ is low, the oscillator frequency will be set
to 640kHz. When FREQ is high, the frequency will be set to 1.2MHz. This input
has a 6μA pull-down current.
SS
Soft-Start Control. Connect a soft-start capacitor (CSS) to this pin. A 4μA
constant current charges the soft-start capacitor. When EN connected to GND,
the soft-start capacitor is discharged. When EN connected to VDD high, the
soft-start capacitor is charged to VDD. Leave floating for not using soft-start.
1
4, 5
11 (Exposed Pad)
6, 7
10
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is a registered trademark of Richtek Technology Corporation.
DS9297-02
June 2012
RT9297
Absolute Maximum Ratings
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(Note 1)
LX to GND --------------------------------------------------------------------------------------------------------------- −0.3V to 26V
Other Pins to GND ---------------------------------------------------------------------------------------------------- −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
WDFN-10L 3x3 --------------------------------------------------------------------------------------------------------- 1.667W
Package Thermal Resistance (Note 2)
WDFN-10L 3x3, θJA --------------------------------------------------------------------------------------------------- 60°C/W
WDFN-10L 3x3, θJC --------------------------------------------------------------------------------------------------- 8.2°C/W
Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C
Junction Temperature ------------------------------------------------------------------------------------------------- 150°C
Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) ------------------------------------------------------------------------------------------ 2kV
MM (Machine Model) ------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
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(Note 4)
Supply Input Voltage, VDD ------------------------------------------------------------------------------------------ 2.6V to 5.5V
Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VDD = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
2.6
--
5.5
4
--
5.5
VDD
--
24
V
VDD Rising
--
2.4
--
V
Hysteresis
--
50
--
mV
VFB = 1.3V, LX Not Switching
--
0.5
--
V FB = 1V, LX Switching
--
4
--
EN = GND
--
0.1
10
FREQ = GND
500
640
750
FREQ = VlN
1000
1240
1500
--
90
--
%
Supply Current
Input Voltage Range
VDD
Output Voltage Range
VAVDD
Under-Voltage Lockout
VUVLO
Threshold
Quiescent Current
IQ
Shutdown Current
ISHDN
VAVDD < 18V
18V < VAVDD < 24V
V
mA
μA
Oscillator
Oscillator Frequency
fOSC
Maximum Duty Cycle
kHz
Error Amplifier
Feedback Regulation Voltage
VFB
1.22
1.24
1.26
V
Feedback Input Bias Current
I FB
--
125
250
nA
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9297-02
June 2012
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RT9297
Parameter
Symbol
Test Conditions
Feedback Line Regulation
Min
Typ
Max
Unit
--
0.05
0.2
%/V
Transconductance
gm
ΔI = ±2.5μA at COMP = 1V
--
135
--
μA/V
Voltage Gain
Av
FB to COMP
--
700
--
V/V
N- MOSFET
Current Limit
ILIM
3
3.8
5
A
On-Resistance
R DS(ON)
--
125
250
mΩ
Leakage Current
ILEAK
--
30
45
μA
Current-Sense Transresistance
R CS
--
0.25
--
V/A
ISS
--
4
--
μA
EN, FREQ Input Low Voltage
VIL
--
--
0.3 x V DD
V
EN, FREQ Input High Voltage
VIH
0.7 x VDD
--
--
V
EN, FREQ Input Hysteresis
--
0.1 x V DD
--
V
FREQ Pull-down Current
--
6
--
μA
--
0.001
1
μA
VLX = 24V
Soft-Start
Charge Current
Control Inputs
EN Input Current
IEN
EN = GND
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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DS9297-02
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RT9297
Typical Operating Characteristics
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
90
90
VDD = 5V
70
80
VDD = 3.3V
Efficiency (%)
Efficiency (%)
80
VDD = 5V
60
50
40
30
VDD = 3.3V
70
60
50
40
30
20
20
10
10
VAVDD = 13.6V, f = 1.2MHz
VAVDD = 13.6V, f = 640kHz
0
0
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0
0.4
0.05
0.1
13.69
13.69
13.68
13.68
13.67
13.66
VDD = 5V
13.65
13.64
VDD = 3.3V
0.25
0.3
0.35
0.4
13.67
13.66
VDD = 5V
13.65
13.64
VDD = 3.3V
13.63
13.62
13.62
13.61
13.61
VAVDD = 13.6V, f = 1.2MHz
VAVDD = 13.6V, f = 640kHz
13.60
13.60
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0
0.4
0.05
13.65
13.65
13.64
13.64
13.63
IAVDD = 0mA
IAVDD = 100mA
IAVDD = 200mA
IAVDD = 300mA
IAVDD = 400mA
13.60
13.59
Output Voltage (V)
13.66
13.61
0.15
0.2
0.25
0.3
0.35
0.4
Output Voltage vs. Input Voltage
Output Voltage vs. Input Voltage
13.66
13.62
0.1
Load Current (A)
Load Current (A)
Output Voltage (V)
0.2
Output Voltage vs. Load Current
13.70
Output Voltage (V)
Output Voltage (V)
Output Voltage vs. Load Current
13.70
13.63
0.15
Load Current (A)
Load Current (A)
13.63
13.62
IAVDD = 0mA
IAVDD = 100mA
IAVDD = 200mA
IAVDD = 300mA
IAVDD = 400mA
13.61
13.60
13.59
f = 1.2MHz
13.58
2.5
3
3.5
4
4.5
5
Input Voltage (V)
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DS9297-02
June 2012
5.5
f = 640kHz
13.58
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
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RT9297
Reference Voltage vs. Temperature
Switching Frequency vs. Temperature
1.260
1.40
1.256
Reference Voltage (V)
Switch Frequency (MHz
1.35
1.30
1.25
1.20
1.15
1.10
1.05
VDD = 3.3V
1.00
-40 -25 -10
5
20
35
50
65
80
95 110 125
1.252
1.248
1.244
1.240
1.236
1.232
1.228
1.224
VDD = 3.3V, f = 1.2MkHz
1.220
-40 -25 -10
35
50
65
Temperature (°C)
Start Up
Start Up
VAVDD
(5V/Div)
VDD
(2V/Div)
VAVDD
(5V/Div)
VLX
(10V/Div)
VLX
(10V/Div)
VDD = 3.3V, VAVDD = 13.6V
f = 1.2MHz, IAVDD = 300mA
I VDD
(1A/Div)
80
95 110 125
VDD = 5V, VAVDD = 13.6V
f = 1.2MHz, IAVDD = 300mA
Time (2.5ms/Div)
Time (2.5ms/Div)
Load Transient Response
Load Transient Response
VDD = 5V, VAVDD = 13.6V, f = 1.2MHz
VDD = 3.3V, VAVDD = 13.6V, f = 1.2MHz
VAVDD
(500mV/Div)
VAVDD
(500mV/Div)
IAVDD
(200mA/Div)
IAVDD
(500mA/Div)
Time (100μs/Div)
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20
Temperature (°C)
VDD
(2V/Div)
I VDD
(1A/Div)
5
Time (100μs/Div)
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DS9297-02
June 2012
RT9297
Application Information
The RT9297 contains a high performance boost regulator
to generate voltage for the panel source driver ICs. The
following content contains the detailed description and
the information of component selection.
Boost Regulator
The boost regulator is a high efficiency current-mode PWM
architecture with 640K / 1.2MHz operation frequency. It
performs fast transient responses to generate source driver
supplies for TFT LCD display. The high operation frequency
allows smaller components used to minimize the
thickness of the LCD panel. The output voltage setting
can be achieved by setting the resistive voltage-divider
sensing at FB pin. The error amplifier varies the COMP
voltage by sensing the FB pin to regulate the output
voltage. For better stability, the slope compensation signal
summed with the current-sense signal will be compared
with the COMP voltage to determine the current trip point
and duty cycle.
Loop Compensation
The voltage feedback loop can be compensated with an
external compensation network consisted of RCOMP and
CCOMP. Choose RCOMP to set high frequency integrator
gain for fast transient response and CCOMP to set the
integrator zero to maintain loop stability. For typical
application VDD = 3.3V , VAVDD = 13.6V , C4 = 4.7μF x 3 ,
L = 3.6μH, the recommended value for compensation is
as below : RCOMP = 56kΩ, CCOMP = 330pF.
Over Current Protection
The RT9297 boost converter has over-current protection
to limit peak inductor current. It prevents large current
from damaging the inductor and diode. During the ONtime, once the inductor current exceeds the current limit,
the internal LX switch turns off immediately and shortens
the duty cycle. Therefore, the output voltage drops if the
over-current condition occurs. The current limit there
should is also affected by the input voltage, duty cycle
and inductor value.
Soft-Start
The RT9297 provides soft-start function to minimize the
inrush current. When power on, an internal constant current
charges an external capacitor. The rising voltage rate on
the COMP pin is limited during the charging period and
the inductor peak current will also be limited at the same
time. When power off, the external capacitor will be
discharged for next soft start time.
The soft-start function is implemented by the external
capacitor with a 4μA constant current charging to the softstart capacitor. Therefore, the capacitor should be large
enough for output voltage regulation. Typical value for softstart capacitor range is 33nF. The available soft-start
capacitor range is from 10nF to 100nF.
Output Voltage Setting
The regulated output voltage is shown as following
equation :
⎛ R ⎞
VAVDD = 1.24V x ⎜ 1+ 1 ⎟
⎝ R2 ⎠
The recommended value for R2 should be up to 10kΩ
without some sacrificing. To place the resistor divider as
close as possible to the chip can reduce noise sensitivity.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9297-02
June 2012
Over Temperature Protection
The RT9297 boost converter has thermal protection function
to prevent the chip from overheating. When the junction
temperature exceeds 155°C, it will shut down the device.
Once the device cools down by approximately 30°C, it
will start to operate normally. For continuous operation,
do not operate over the maximum junction temperature
rating 125°C.
Inductor Selection
The inductance depends on the maximum input current.
The inductor current ripple is 20% to 40% of maximum
input current that is a general rule. Assume, choose 40%
as the criterion then
IVDD(MAX) =
VAVDD x IAVDD(MAX)
η x VDD
IRIPPLE = 0.4 x IVDD(MAX)
Where η is the efficiency, IIN(MAX) is the maximum input
current, IRIPPLE is the inductor current ripple. Beside, the
input peak current is maximum input current plus half of
inductor current ripple.
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RT9297
IPEAK = 1.2 x IVDD(MAX)
Note that the saturated current of inductor must be greater
than IPEAK. The inductance can be eventually determined
as follow equation :
ΔIL
Input Current
Inductor Current
2
L=
η x ( VDD ) x ( VAVDD -VDD )
2
0.4 x ( VAVDD ) x I AVDD(MAX) x fOSC
Output Current
Time
Where fOSC is the switching frequency. To consider the
system performance, a shielded inductor is preferred to
avoid EMI issue.
(1-D)TS
Output Ripple
Voltage (ac)
Time
ΔVOUT1
Diode Selection
Schottky diode is a good choice for an asynchronous
Boost converter due to the small forward voltage. However,
power dissipation, reverse voltage rating and pulsating peak
current are the important parameters for Schottky diode
selection. It is recommended to choose a suitable diode
whose reverse voltage rating is greater than the maximum
output voltage.
Capacitor Selection
Output ripple voltage is an important index for estimating
the performance. This portion consists of two parts, one
is the product of input current and ESR of output capacitor,
another part is formed by charging and discharging
process of output capacitor. Refer to Figure 1, evaluate
DVOUT1 by ideal energy equalization. According to the
definition of Q, the Q value can be calculated as following
equation :
⎡
⎤
Q = 1 × ⎢⎛⎜ IIN + 1 ΔIL − IOUT ⎞⎟ + ⎛⎜ IIN − 1 ΔIL − IOUT ⎞⎟ ⎥
2 ⎣⎝
2
2
⎠ ⎝
⎠⎦
V
× IN × 1 = COUT × ΔVOUT1
VOUT fSW
where fSW is the switching frequency, and ΔIL is the
inductor ripple current. Move COUT to the left side to
estimate the value of ΔVOUT1 as the following equation :
ΔVOUT1 =
D × IOUT
η × COUT × fSW
Finally, by taking ESR into consideration, the overall output
ripple voltage can be determined as the following
equation :
ΔVOUT = IIN × ESR +
D × IOUT
η × COUT × fSW
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Figure 1. The Output Ripple Voltage without the
Contribution of ESR
Input Capacitor Selection
Low ESR ceramic capacitors are recommended for input
capacitor applications. Low ESR will effectively reduce
the input voltage ripple caused by switching operation. A
10μF is sufficient for most applications. Nevertheless, this
value can be decreased for lower output current
requirement. Another consideration is the voltage rating
of the input capacitor must be greater than the maximum
input voltage.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and
the θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification,
where TJ(MAX) is the maximum junction temperature of the
die (125°C) and TA is the maximum ambient temperature.
The junction to ambient thermal resistance θJA is layout
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DS9297-02
June 2012
RT9297
dependent. For WDFN-10L 3x3 packages, the thermal
resistance θJA is 60°C/W on the standard JEDEC 51-7
four layers thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for
WDFN-10L 3x3 package
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA . The Figure 2 of derating curves allows the
designer to see the effect of rising ambient temperature
on the maximum power allowed.
Maximum Power Dissipation (W)
1.8
Four Layers PCB
Layout Considerations
For high frequency switching power supplies, the PCB
layout is important to get good regulation, high efficiency
and stability. The following descriptions are the guidelines
for better PCB layout.
`
For good regulation, place the power components as
close as possible. The traces should be wide and short
enough especially for the high-current output loop.
`
The feedback voltage-divider resistors must be near the
feedback pin. The divider center trace must be shorter
and the trace must be kept away from any switching
nodes.
`
The compensation circuit should be kept away from
the power loops and be shielded with a ground trace to
prevent any noise coupling.
`
Minimize the size of the LX node and keep it wide and
shorter. Keep the LX node away from the FB.
`
The exposed pad of the chip should be connected to a
strong ground plane for maximum thermal consideration.
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
20
40
60
80
100
120
140
Ambient Temperature (°C)
Figure 2. Derating Curve of Maximum Power Dissipation
C3
GND
R3
R2
COMP
FB
EN
GND
GND
1
2
3
4
5
GND
The compensation circuit should be
kept away from the power loops and
be shielded with a ground trace to
prevent any noise coupling.
11
10
9
8
7
6
SS
FREQ
VDD
LX
LX
For good regulation place the power
components as close as possible.
The traces should be wide and short
especially for the high-current output
loop.
L1
+
VIN
D1
R1
AVDD
The feedback voltage-divider
resistors must be near the
feedback pin. The divider center
trace must be shorter and the
trace must be kept away from
any switching nodes.
C2
C1
GND
Figure 3. PCB Layout Guide
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June 2012
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RT9297
Outline Dimension
D2
D
L
E
E2
1
SEE DETAIL A
2
e
A
A1
1
2
1
b
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A3
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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DS9297-02
June 2012