Reliability

Reliability
Vishay Semiconductors
Reliability
The requirements concerning quality and reliability of
products are always increasing. It is not sufficient to only
deliver fault-free parts. In addition, it must be ensured that
the delivered goods serve their purpose safely and failure
free, i.e., reliably. From the delivery of the device and up to
its use in a final product, there are some occasions where the
device or the final product may fail despite testing and
outgoing inspection.
In principle, this sequence is valid for all components of a
product.
For these reasons, the negative consequences of a failure,
which become more serious and expensive the later they
occur, are obvious. The manufacturer is therefore interested
in supplying products with the lowest possible
• AOQ (Average Outgoing Quality) value
• EFR (Early Failure Rate) value
• LFR (Long-term Failure Rate) value
The measure of λ is FIT (Failures In Time = number of
failures in 109 device hours).
Example
A sample of 500 semiconductor devices is tested in a
operating life test (dynamic electric operation). The devices
operate for a period of 10 000 h.
Failures: 1 failure after 1000 h
1 failure after 2000 h
The failure rate may be calculated from this sample by
λ=
1
2
1 x 1000 + 1 x 2000 + 498 x 10000 h
λ=
2
1 = 4.01 x 10–7 1
4983000 h
h
This is a λ-value of 400 FIT, or this sample has a failure
rate of 0.04 %/1000 h on average.
AVERAGE OUTGOING QUALITY (AOQ)
All outgoing products are sampled after 100 % testing. This
is known as “Average Outgoing Quality” (AOQ). The results
of this inspection are recorded in ppm (parts per million)
using the method defined in JEDEC 16.
l
Early Failures
EFR
Operating Period
LFR
Wear Out
Failures
EARLY FAILURE RATE (EFR)
EFR is an estimate (in ppm) of the number of early failures
related to the number of devices used. Early failures are
normally those which occur within the first 300 to 1000 h.
Essentially, this period of time covers the guarantee period
of the finished unit. Low EFR values are therefore very
important to the device user. The early life failure rate is
heavily
influenced
by
complexity.
Consequently,
‘designing-in’ of better quality during the development and
design phase, as well as optimized process control during
manufacturing, significantly reduces the EFR value.
Normally, the early failure rate should not be significantly
higher than the random failure rate. EFR is given in ppm
(parts per million).
LONG-TERM FAILURE RATE (LFR)
LFR shows the failure rate during the operational period of
the devices. This period is of particular interest to the
manufacturer of the final product. Based on the LFR value,
estimations concerning long-term failure rate, reliability and
a device’s or module’s usage life may be derived. The usage
life time is normally the period of constant failure rate. All
failures occuring during this period are random.
Within this period the failure rate is:
λ=
Σ
t
95 11401
Fig. 1 - Bath tub curve
CONFIDENCE LEVEL
The failure rate λ calculated from the sample is an estimate
of the unknown failure rate of the lot.
The interval of the failure rate (confidence interval) may be
calculated, depending on the confidence level and sample
size.
The following is valid:
• The larger the sample size, the narrower the confidence
interval.
• The lower the confidence level of the statement, the
narrower the confidence interval.
The confidence level applicable to the failure rate of the
whole lot when using the estimated value of λ is derived from
the χ2-distribution. In practice, only the upper limit of the
confidence interval (the maximum average failure rate) is
used.
Sum of failures
1
(Quantity x Time to failure) h
Document Number: 80099
Rev. 1.3, 04-Mar-08
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Reliability
Reliability
Vishay Semiconductors
Confidence level: PA = 60 %
Therefore:
χ2/2 (0; 60 %) = 0.93
λ max =
χ / 2 (r; P A)
in 1
n x t
h
LFR =
χ / 2 (r; P A)
x 1 x 10 9 in [FIT]
n x t
2
λ max =
2
r:
Number of failures
PA:
Confidence level
n:
Sample size
t:
Time in hours
0.93
= 9.3 x 10–6 1
50 x 2000
h
This means, that the failure rate of the lot does not exceed
0.93 %/1000 h (9300 FIT) with a probability of 60 %.
This example demonstrates that it is only possible to verify
LFR values of 9300 FIT with a confidence level of 60 % in a
normal qualification tests (50 devices, 2000 h).
n x t: Device hours
To obtain LFR values which meet today’s requirements
(< 50 FIT), the following conditions have to be fulfilled:
The χ2/2 for λ are taken from table 1.
• Very long test periods
For the above example from table 1:
• Large quantities of devices
χ2/2 (r = 2; PA = 60 %) = 3.08
• Accelerated testing (e.g., higher temperature)
n x t = 4983000 h
MEAN TIME TO FAILURE (MTTF)
λ max =
3.08
= 6.18 x 10 –7 1
4983000
h
This means that the failure rate of the lot does not exceed
0.0618 %/1000 h (618 FIT) with a probability of 60 %.
If a confidence level of 90 % is chosen from the table 1 :
5.3
= 1.06 x 10 –6 1
4983000
h
Accelerating Stress Tests
This means that the failure rate of the lot does not exceed
0.106 %/1000 h (1060 FIT) with a probability of 90 %.
TABLE 1
NUMBER OF
FAILURES
CONFIDENCE LEVEL
50 %
60 %
90 %
95 %
0
0.60
0.93
2.31
2.96
1
1.68
2.00
3.89
4.67
2
2.67
3.08
5.30
6.21
3
3.67
4.17
6.70
7.69
4
4.67
5.24
8.00
9.09
5
5.67
6.25
9.25
10.42
6
6.67
7.27
10.55
11.76
7
7.67
8.33
11.75
13.16
8
8.67
9.35
13.00
14.30
9
9.67
10.42
14.20
15.63
10
10.67
11.42
15.40
16.95
OPERATING LIFE TESTS
Number of devices tested: n = 50
Innovation cycles in the field of semiconductors are
becoming shorter and shorter. This means that products
must be brought to the market quicker. At the same time,
expectations concerning the quality and reliability of the
products have become higher.
Manufacturers of semiconductors must therefore assure
long operating periods with high reliability but in a short time.
Sample stress testing is the most commonly used way of
assuring this.
The rule of Arrhenius describes this temperature-dependent
change of the failure rate.
[
E
λ(T 2) = λ(T 1) x e
A
x
k
(
1
1
–
T1 T2
)]
Boltzmann’s constant
k = 8.63 x 10-5 eV/K
Activation energy
EA in eV
Junction temperature real operation
T1 in Kelvin
Junction temperature stress test
T2 in Kelvin
Number of failures
(positive qualification):
c=0
Test time:
t = 2000 h
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2
MTTF = 1
λ
MTTF is the average fault-free operating period per a
monitored (time) unit.
χ2/2 (r = 2; PA = 90 %) = 5.3
λ max =
For systems which cannot be repaired and whose devices
must be changed, e.g., semiconductors, the following is
valid:
Failure rate real operation
λ (T1)
Document Number: 80099
Rev. 1.3, 04-Mar-08
Reliability
Reliability
Failure rate stress test
λ (T2)
The acceleration factor is described by the exponential
function as being:
AF =
[
E
λ(T 2)
= e
λ(T 1)
A
x
k
(
1
1
–
T1 T2
)]
Vishay Semiconductors
estimating operating life. The values of activation energies
can be determined by experiments for different failure
mechanisms.
Values often used for different device groups are:
Opto components 0.8 eV
Bipolar ICs
0.7 eV
MOS ICs
0.6 eV
Transistors
0.7 eV
Example
Diodes
0.7 eV
The following conditions apply to an operating life stress test:
By using this method, it is possible to provide long-term
predictions for the actual operation of semiconductors even
with relatively short test periods.
Environmental temperature during stress test
TA = 70 °C
Power dissipation of the device
1000
0.8 eV
Thermal resistance junction/environment
RthJA = 300 K/W
The system temperature/junction temperature results from:
TJ = TA + RthJA x PV
TJ = 70 °C + 300 K/W x 100 mW
Acceleration Factor
PV = 100 mW
0.7 eV
0.6 eV
100
0.5 eV
10
TJ = 100 °C
Operation in the field at an ambient temperature of 50 °C and
at an average power dissipation of 80 mW is utilized. This
results in a junction temperature in operation of TJ = 74 °C.
The activation energy used for opto components is
EA = 0.8 eV.
The resulting acceleration factor is:
AF =
[
λ(373K)
= e
λ(347K)
E
(
A
1
1
x
–
k
347K 373K
]
)
100
1
55
155
95 11369
DEGRADATION OF LEDS
The diagram in figure 3 is based on electrical life tests,
calculated with Ea = 0.8 eV.
This signifies that, regarding this example, the failure rate is
lower by a factor of 6.5 compared to the stress test.
100
Degradation (%)
110
• Humidity (except displays type TDS.)
TA = 85 °C
RH = 85 %
75
95
115
135
Junction Temperature (°C)
150
Fig. 2 - Acceleration factor for different activation energies
normalized to TJ = 55 °C
AF ≈ 6.5
Other accelerating stress tests may be:
125
90
80
• Temperature cycling
Temperature interval as specified
70
The tests are carried out according to the requirements of
appropriate IEC-standards (see also chapter ‘Qualification
and Release’).
60
10
16437
AlInGaP
Tamb = 25 °C
45 mA
100
Test Data Predicted
Lifetime
1000
10000
100000
Time (h)
Fig. 3 - Average degradation of TLWR7600
ACTIVATION ENERGY
There are some conditions which need to be fulfilled in order
to use Arrhenius’ method:
• The validity of Arrhenius’ rule has to be verified.
• ‘Failure-specific’ activation energies must be determined.
These conditions may be verified by a series of tests. Today,
this procedure is generally accepted and used as a basis for
Document Number: 80099
Rev. 1.3, 04-Mar-08
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