CXA2570N
RF Matrix Amplifier
Description
The CXA2570N is an IC developed for the RF signal
processing of compact disc players.
Features
• Wide band RF signal processing
• RF system VCA circuit
• RF system equalizer (supports CAV mode)
• Supports pickups with built-in RF summing amplifier
• Low power consumption mode (EQ Pass mode)
• RW/ROM switching mode
Functions
• RFAC summing amplifier, equalizer, VCA
• RFDC summing amplifier
• Focus error amplifier
• Tracking error amplifier
• Automatic power control
• VC buffer amplifier
24 pin SSOP (Plastic)
Absolute Maximum ratings
• Supply voltage
Vcc
• Operating temperature Topr
• Storage temperature
Tstg
• Allowable power dissipation
PD
7
V
–20 to +75 °C
–65 to +150 °C
620
mW
Operating Conditions
• Supply voltage
Vcc – GND 3.0 to 5.5
V
• Operating temperature Topr
–20 to +75 °C
Applications
CD-ROM/RW compatible systems
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E98259A98-PS
CXA2570N
Connected Circuit Diagram
VCC
0.1µ VCC
ACSUM EQI
<OP (with RF_SUM)>
A
VC
B
A
B
C
D
5.1k
ACG
DC
SUM
VC
C
VC
D
A
B
C
D
RFAC
EQ
RFDCI
RW/ROM
5.1k
RFDC
VC
RW/ROM
VC
<DSP>
RFAC
AC
VCA
AC
SUM
RF
BST Rfc Vfc
RFDCO
RW/ROM
A
B
C
D
FEI
100k
VC
FE
FE
VC
RW/ROM
RW/ROM
F
F
E
VC
10k
F
E
VC
TE
TE
10k
E
PD
APC
RW/ROM VCC
VC
VC
VCC
VCC
LD
GND
APC-OFF (Hi-Z)
RW/ROM
(H/L)
SW
VCC VC GND
VC
VCC
0.1
ACSUM
<OP (without RF_SUM)>
VC
DC
SUM
B
RW/ROM
VC
VC
D
5.1k
ACG
A
B
C
D
A
B
C
D
BST Rfc Vfc
AC
VCA
AC
SUM
A
C
VCC
EQI
<DSP>
RFAC
RFAC
EQ
RFDCI
RW/ROM
5.1k
RFDC
VC
RFDCO
RW/ROM
FEI
100k
VC
FE
FE
VC
RW/ROM
RW/ROM
F
VC
F
E
10k
F
E
VC
TE
TE
10k
E
PD
APC
RW/ROM VCC
VC
VC
LD
SW
APC-OFF (Hi-Z)
RW/ROM
(H/L)
VCC VC GND
VC
–2–
VCC
VCC
GND
CXA2570N
Pin Description
Pin
No.
Symbol
I/O
Description
1
LD
Out
2
PD
In
APC amplifier input.
3
EQ_IN
In
RFAC system VCA block and EQ block input.
4
AC_SUM
5
GND
In
Ground.
6
A
In
A signal input.
7
B
In
B signal input.
8
C
In
C signal input.
9
D
In
D signal input.
10
E
In
E signal input.
11
F
In
F signal input.
12
SW
In
Mode switching signal input.
13
RFAC
Out
RFAC signal output.
14
FE
Out
Focus error signal output.
15
FEI
—
FE amplifier virtual ground.
16
TE
Out
Tracking error signal output.
17
VCC
In
VCC.
18
RFG
In
RFAC system VCA block low-frequency gain adjustment.
19
BST
In
EQ boost amount adjustment range.
20
VFC
In
EQ cut-off frequency adjustment.
21
RFC
In
EQ cut-off frequency adjustment.
22
VC
Out
VC voltage output.
23
RFDCO
Out
RFDC signal output.
24
RFDCI
—
Out
APC amplifier output.
RFAC system RF SUM output.
RFDC amplifier virtual ground.
–3–
CXA2570N
Pin Description and Equivalent Circuit
Pin
No.
Symbol
I/O
Equivalent circuit
Description
10k
1
LD
O
2
PD
I
1
APC amplifier output.
1k
55k
20k
APC amplifier input.
2
20k
1.1k
3
EQ_IN
I
3
5k
1.1k
Equalizer circuit input.
1.2k
VC
5k
VC
1.6k
1.6k
4
AC_SUM
O
5
GND
—
4
—
–4–
RFAC summing amplifier
output.
Ground.
CXA2570N
Pin
No.
6
Symbol
A
I/O
Equivalent circuit
Description
I
15k
6
7
B
100µA
I
7
8
C
I
RF summing amplifier and
focus error amplifier input.
30k
100µA
8
47k
100µA
9
47k
100µA
9
D
I
10
E
I
VC
27k
27k
Tracking error amplifier input.
10
11
F
I
124
16
11
16
TE
Tracking error amplifier output.
O
200k
12
SW
CD-ROM/RW switching input.
RW when connected to VCC,
ROM when connected to
GND.
200k
I
12
200k
13
RFAC
100
O
RFAC amplifier output.
13
2mA
14
FE
O
Focus error amplifier output.
124
50k
14
VC
15
FEI
I
124
15
–5–
Focus error amplifier gain
adjustment. The gain is
adjusted by the external
resistance value connected
between this pin and Pin 14.
CXA2570N
Pin
No.
Symbol
I/O
Equivalent circuit
—
17
VCC
—
18
RFG
I
Description
Power supply.
20k
Sets the RFAC low-frequency
gain.
18
VC
100µA
50µA
19
BST
I
20k
19
VC
20k
20
VFC
I
20
VC
100µA
1.0V
124
21
22
RFC
VC
I
21
150k
25
O
Input for adjusting the
equalizer circuit boost amount.
Input for adjusting the
equalizer circuit boost
frequency with the control
voltage.
Input for adjusting the
equalizer circuit boost
frequency with external
resistance.
(VCC + GND)/2 voltage output.
22
150k
23
RFDC
O
1.5k
24
RFDCI
I
RFDC amplifier output. This
pin serves as the eye pattern
check point.
1mA
VC
23
124
124
24
–6–
RFDC amplifier gain
adjustment. The gain is
adjusted by the external
resistance value connected
between this pin and Pin 23.
Measurement No.
Icc_Aeqoff
Icc_Slp
ACSUM_Ofst
Current consumption (Active, EQ Off)
Current consumption (Sleep)
SUM offset voltage
Gac_ROM2
Gac_ROM3
Low-frequency gain ROM_cnt
Low-frequency gain ROM_max
12
13
O
O
O
O
O
O
Fac_MinH
Fac_ECoff
Vac_H
Vac_L
DC_OfstROM
DC_OfstRW
Gdc_ROM
Gdc_RW
Fdc_ROM
Fdc_RW
Vdc_H
Vdc_L
Frequency response Min_H
Frequency response EQ_OFF
Maximum output voltage H
Maximum output voltage L
Offset voltage ROM
Offset voltage RW
Low-frequency gain ROM
Low-frequency gain RW
Frequency response ROM
Frequency response RW
Maximum output voltage H
Maximum output voltage L
28
29
30
27
26
25
24
23
22
21
20
19
18
O
O
O
O
O
O
O
Fac_MinL
Frequency response Min_L
O
Gac_EQoff
Low-frequency gain EQ_off
17
16
O
Gac_RW3
Low-frequency gain RW_max
O
O
O
O
O
O
Gac_RW2
15
RFDC
–7–
Low-frequency gain RW_cnt
Gac_RW1
Low-frequency gain ROM_min Gac_ROM1
11
Low-frequency gain RW_min
AC_OfstRW
Offset voltage RW
10
14
O
AC_OfstROM
Offset voltage ROM
9
O
O
Vsum_L
Vsum_H
Fsum
Switch conditions
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
13
0V
1.0V
0.3Vp-p 100kHz
O
O
O
25mVp-p 10MHz
0.1Vp-p 10MHz
25mVp-p 100kHz
0.1Vp-p 100kHz
13
1.9V 0V
0.8Vp-p 30MHz
23
0V
23
23
0.25V
–0.25V
23
23
23
23
23
13
–2V
13
13
1.9V
0V
13
–1.9V
0.2Vp-p 30MHz
13
0V
0.8Vp-p 100kHz
0.2Vp-p 10MHz
13
1.0V
75mVp-p 100kHz
O
13
13
13
13
13
0.2Vp-p 100kHz
0V
–1.0V
0V
0.8Vp-p 100kHz
0.4Vp-p 100kHz
–1.0V
1.6Vp-p 100kHz
2V
4
–0.3V
13
4
0.3V
4
4
5
25
45
0
7.5
40
65
V
mA
mA
mA
–0.3
–0.3
—
0.9
—
0
0
0.3
0.3
–0.5 –0.3
1.25
–3.0 –1.5 0.3
V
V
V
V
dB
14.0 16.0 18.0 dB
–1.2 –0.6
3.0
10
25
5.0
dB
8.0 11.0 dB
2.0
—
0
0
V
V
400 mV
150 mV
–0.8 –0.6
0.8
29.0 32.0 35.0 dB
16.5 19.5 22.5 dB
–100
–150
—
0.6
dB
Pin voltage
Pin voltage
20 log (Vout/Vin) – Gdc_RW
—
1.3
—
–1.0 –0.6
1.6
V
V
–6.0 –3.0 –0.5 dB
20 log (Vout/Vin) – Gdc_ROM –3.5 –1.5 –0.5 dB
20 log (Vout/Vin)
20 log (Vout/Vin)
Pin voltage
Pin voltage
Pin voltage – AC_OfstROM
Pin voltage – AC_OfstROM
–2.0 –1.0 –0.5 dB
8.5
dB
20 log (Vout/Vin) – Gac_EQoff
6.0
8.5
3.5
6.0
3.5
dB
20 log (Vout/Vin) – Gac_ROM2
5.0
20 log (Vout/Vin) – Gac_ROM2
2.0
8.0 11.0 dB
12.0 15.0 dB
–1.0
5.0
9.0
–11.0 –8.0 –5.0 dB
5.0
–1.0
20 log (Vout/Vin)
20 log (Vout/Vin) – Gac_RW2
20 log (Vout/Vin) – Gac_ROM2
20 log (Vout/Vin) – Gac_RW2
20 log (Vout/Vin) – Gac_ROM2
20 log (Vout/Vin)
20 log (Vout/Vin) – Gac_ROM2 –11.0 –8.0 –5.0 dB
Pin voltage
Pin voltage
Pin voltage
Pin voltage
20 log (Vout/Vin) – Gsum
20 log (Vout/Vin)
Pin voltage
Pin current
Pin current
17
17
Pin current
Min. Typ. Max. Unit
(VCC = 1.9V, VEE = –1.9V)
Measurement
conditions
17
0.1Vp-p 30MHz
0V
Measurement pin
4
0V
1.9V
0V
E5
0.1Vp-p 100kHz
0V
0V
E4
O
O
O
Hi-Z
0V
E3
E2
Bias conditions
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 V1 amplitude V1 frequency E1
SUM maximum output voltage L
SUM maximum output voltage H
SUM frequency response
Gsum
Icc_Aeqon
Current consumption (Active, EQ On)
SUM frequency gain
Symbol
Measurement item
8
7
6
5
4
3
2
RFAC SUM
RFAC EQ
1
Function
Electrical Characteristics
CXA2570N
Measurement No.
FE_OfstRW
Gfe_ROM1
Gfe_ROM2
Gfe_RW1
Gfe_RW2
Offset voltage RW
Low-frequency gain ROM1
Low-frequency gain ROM2
Low-frequency gain RW1
Low-frequency gain RW2
O
O
O
O
O
Fte_ROM2
Fte_RW1
Fte_RW2
Vte_H
Vte_L
Vapc1
Vapc2
Vapc3
Vapc_off
Iapc_max
Frequency response ROM1
Frequency response ROM2
Frequency response RW1
Frequency response RW2
Maximum output voltage H
Maximum output voltage L
Output voltage 1
Output voltage 2
Output voltage 3
APC OFF voltage
Maximum output current
60
59
58
57
56
55
54
53
52
51
50
49
48
Output voltage
O
Fte_ROM1
Low-frequency gain RW2
O
O
Gte_RW2
Low-frequency gain RW1
47
Vvc
O
O
O
O
O
O
O
O
Gte_RW1
Low-frequency gain ROM2
46
TE_OfstROM
Vfe_L
O
Vfe_H
O
Gte_ROM2
Low-frequency gain ROM1
O
Gte_ROM1
Offset voltage RW
44
O
TE_OfstRW
Offset voltage ROM
43
45
Maximum output voltage L
42
O
Ffe_RW2
O
Maximum output voltage H
O
Frequency response RW2
O
41
Ffe_RW1
Ffe_ROM2
40
O
O
Frequency response RW1
O
O
O
39
O
O
O
O
Frequency response ROM2
O
O
O
38
APC
–8–
VC
Hi-Z
O
O
O
O
O
O
O
O
O
O
O
0V
14
14
14
Measurement pin
22
1
1
1
30mV
0V
1
–30mV
1
0V
16
25mVp-p 200kHz
16
16
25mVp-p 200kHz
–0.3V
16
0.1Vp-p 200kHz
16
16
0.3V
16
16
16
16
16
16
25mVp-p 10kHz
0V
0.1Vp-p 200kHz
25mVp-p 10kHz
0.1Vp-p 10kHz
0.1Vp-p 10kHz
14
25mVp-p 50kHz
14
14
25mVp-p 50kHz
–0.3V
14
0.1Vp-p 100kHz
14
14
0.3V
14
25mVp-p 10kHz
0.1Vp-p 100kHz
14
0V
E5
25mVp-p 10kHz
0V
E4
14
0V
E3
0.1Vp-p 10kHz
0.1Vp-p 10kHz
0V
E2
Bias conditions
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 V1 amplitude V1 frequency E1
Switch conditions
Frequency response ROM1
Ffe_ROM1
FE_OfstROM
Offset voltage ROM
Symbol
37
36
35
34
33
32
31
Function
FE
TE
Measurement item
25.0 28.0 31.0 dB
25.0 28.0 31.0 dB
20 log (Vout/Vin)
20 log (Vout/Vin)
—
29.0 32.0 35.0 dB
20 log (Vout/Vin)
1.5
dB
85
0.45
–0.95 –0.7 –0.45 V
Pin voltage
Pin voltage
–100
0
0
–0.2
Pin voltage
Pin voltage
1.6
1.4
Pin voltage
V
V
V
100 mV
0.6
–
0.7 0.95
135 185 mV
V
Input where output voltage = 0V
–1.5 –1.1
V
—
—
Pin voltage
1.7
1.2
–4.5 –2.0 –0.2 dB
–4.5 –2.0 –0.2 dB
0
Pin voltage
20 log (Vout/Vin) – Gte_RW2
20 log (Vout/Vin) – Gte_RW1
20 log (Vout/Vin) – Gte_ROM2 –1.5
dB
29.0 32.0 35.0 dB
20 log (Vout/Vin)
1.5
17.0 20.0 23.0 dB
20 log (Vout/Vin)
0
17.0 20.0 23.0 dB
20 log (Vout/Vin) – Gte_ROM1 –1.5
–150
150 mV
150 mV
V
V
dB
20 log (Vout/Vin)
0
0
–1.5 –1.1
1.7
dB
dB
Pin voltage
–150
—
Pin voltage
Pin voltage
1.2
–3.5 –0.5 0.3
–3.5 –0.5 0.3
Pin voltage
20 log (Vout/Vin) – Gfe_RW2
20 log (Vout/Vin) – Gfe_RW1
20 log (Vout/Vin) – Gfe_ROM2 –3.5 –0.5 0.3
dB
13.0 16.0 19.0 dB
20 log (Vout/Vin)
20 log (Vout/Vin) – Gfe_ROM1 –3.5 –0.5 0.3
13.0 16.0 19.0 dB
150 mV
150 mV
–150
0
0
20 log (Vout/Vin)
–150
Min. Typ. Max. Unit
Pin voltage
Pin voltage
Measurement
conditions
CXA2570N
CXA2570N
Electrical Characteristics Measurement Circuit
VCC
1.9V
VCC
10k
5.1k
22
19
BST
RFG
VCC
TE
A
B
C
D
E
F
SW
1
2
3
4
5
6
7
8
9
10
11
12
S1
S2
S3
10k
E2
VEE S5
–1.9V
S6
0.8mA
S7
S8
10k
10k
S9
S10
RFAC
FEI
FE
VFC
13
GND
14
RFC
15
AC_SUM
16
10k
VC
17
10k
100k
EQ_ IN
18
10k
RFDCO
20
E3
PD
21
E4
RFDCI
23
E5
5.1k
LD
24
S12
S11
VEE VCC
0.1µ
VCC
VEE
V1
E1
–9–
CXA2570N
Application Circuits
RFDC
OUT
VC
5.1k
24
VCC
0.1µ 20k
VCC
20k
20k
TE
OUT
FE
OUT
100k
5.1k
22
19
14
BST
RFG
VCC
TE
A
B
C
D
E
F
SW
2
3
4
5
6
7
8
9
10
11
12
0.1µ
LD
PD IN
Drive
B
C
D
FEI
10k
RF
SUM
RFDC
OUT
10k
VCC
0.1µ 20k
VCC
20k
20k
TE
OUT
FE
OUT
RFAC
OUT
14
VCC
TE
C
D
E
F
SW
3
4
5
6
7
8
9
10
11
12
PD IN
LD
Drive
0.1µ
A
B
C
D
10k
10k
E
F
RFAC
RFG
B
2
FE
BST
A
1
FEI
VFC
GND
13
RFC
15
AC_SUM
16
VC
17
EQ_ IN
18
RFDCO
19
PD
20
RFDCI
21
LD
22
MODE
Control
100k
5.1k
23
F
E
VC
5.1k
24
A
RFAC
VFC
GND
1
FE
RFC
13
AC_SUM
15
VC
16
EQ_ IN
17
RFDCO
18
PD
20
RFDCI
21
LD
23
RFAC
OUT
MODE
Control
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
– 10 –
CXA2570N
Description of Functions
• RFAC
The RF signal input by connecting capacitance to the EQ_IN pin is equalized, arithmetically amplified and then
output from the RFAC pin.
VCC
A 6
B 7
C 8
AC
SUM
D 9
AC_SUM
19
0.1
20
21 RFC
4
3
RF
5.1k
BST VFC
EQ
Amp
EQ_IN
13 RFAC
RFG 18
RW/ROM
When BST = VCC
Low-frequency gain
AC_SUM: 16dB (both ROM/RW)
VCA to RFAC ROM: 2dB
RW: 14dB
The EQ can be bypassed by connecting the BST control pin (Pin 19) to VCC. In this case only the EQ block
enters sleep mode and the low power consumption mode (slim mode) is activated. The low-frequency gain is
the same value as for EQ ON mode.
The RF_SUM input dynamic range is VC ± 300mV (typ.).
If RF (summing signal) is present at the pickup output pin, input the addition output signal to the EQ_IN pin
(Pin 3) coupled by capacitance.
When using a pickup without a summing output function, perform addition with the AC SUM block and then
input the signal to the EQ_IN pin coupled by capacitance.
RW/ROM switching is done by the VCA block, so either input method can be used without problem.
The RW gain is 12dB higher than the ROM gain.
The VCA low-frequency gain can be adjusted by
the RFG pin (Pin 18) voltage.
The control voltage vs. low-frequency gain
characteristics are shown in the graph to the right.
Gain [dB]
VCA variable range
8
0
–8
Vcut [V]
VC – 1
VC
The RFAC pin (Pin 13) is an NPN transistor emitter follower output.
The maximum drive current is approximately 2mA.
If the load capacitance distorts the output waveform, increase the drive current.
Connect resistance between Pin 13 and GND.
– 11 –
VC + 1
CXA2570N
• EQ
In
Amp
HPF
LPF
LPF
fc
Out
Boost
The diagram to the left shows the EQ internal block
diagram.
The EQ consists of a combination of HPF and LPF.
The HPF and LPF transmittance is the Bessel function.
The boost gain can be adjusted by adjusting the HPF
gain.
The boost frequency is adjusted by the RFC external
resistance value and the VFC control voltage value.
EQ CNT
RFC 21
VFC 20
BST 19
VCC
VC
VC
RFC resistance value: The cut-off frequency fo of each
filter is adjusted by the Pin 21
external resistance value.
The VFC voltage can be varied
using this fo as the reference.
VFC voltage:
The boost gain can be adjusted by the BST pin
control voltage.
The control characteristics are shown in the graph
below.
fo can be changed by the voltage
applied to Pin 20.
The cut-off frequency control characteristics are
shown in the graph below.
Boost Gain [dB]
fc [Hz]
8dB
1.5fo
fo
0dB
0.5fo
Vcut [V]
VC – 1.0
VC
Vcut [V]
VC + 1.0
VC – 1.0
Pin 19 voltage
VC
VC + 1.0
Pin 20 voltage
• APC (Automatic Power Control)
When the laser diode is driven by a constant current, the optical power output has extremely large negative
temperature characteristics. Therefore, the current must be controlled to maintain the monitor photodiode
output at a constant level. This control is performed by the APC function
VCC
56k
PD 2
1 LD
10k
10k
55k
10k
1k
56k
1.25V
– 12 –
CXA2570N
• Focus Error
The signals input to the A and C pins and the B and D pins are arithmetically amplified and the focus error
signal is output.
This circuit has RW/ROM switching, low-frequency gain adjustment and offset adjustment (external resistance)
functions.
VC
R (ofst)
ROM
100k
RW
50k
FEI 15
200k
14 FE
A 6
50k
C 8
B 7
ROM
D 9
VC
50k
30k
200k
RW
FE = Gain {(B + D) – (A + C)}
Low-frequency gain
ROM: 16dB
RW: 28dB
Cut-off frequency fc (typ.) ROM: 400kHz
RW: 300kHz
• Tracking Error
The signals input to the E and F pins are arithmetically amplified and the tracking error signal is output.
This circuit has RW/ROM switching, low-frequency gain adjustment and offset adjustment (external resistance)
functions.
E
10k
27k
373k
10
RW
F
10k
RW
11
27k
TE = Gain (F – E)
Low-frequency gain
ROM
16 TE
ROM
373k
VC
• VC Buffer
This outputs the VC ((1/2) VCC) voltage.
The maximum output current is approximately ±3mA.
VCC
VCC
25
40k
22
40k
– 13 –
fc (typ.)
ROM: 20dB
RW: 32dB
ROM: 1MHz
RW: 250kHz
CXA2570N
• RFDC
The signals input via the A, B, C and D pins are added, amplified and the RFDC signal is output.
RW/ROM switching, low-frequency gain adjustment and offset adjustment are possible.
5.1k
A 6
B 7
15k
10k
C 8
40k
ROM
RFDCI 24
23 RFDCO
RW
1.5k
D 9
VC
VC
RFDC = Gain (A + B + C + D)
Low-frequency gain
ROM: 20dB
RW: 32dB
fc (Typ.)
ROM: 12MHz
RW: 5MHz
The gain can be adjusted by the external resistance connected between Pins 23 and 24.
• SW
This controls the laser (APC) on/off, active/sleep mode, and RW/ROM mode switching.
Switching is controlled by the voltage applied to the SW pin (Pin 12).
RSW
(ofst)
12
RW/ROM, Active/Sleep, APC_ON/OFF
The VC buffer is kept active even in sleep mode.
In the function block, BGR and MODE_SW are always set to active mode.
Item
APC
Active/Sleep
RW/ROM
VCC
ON
Active
RW
VC or Hi-Z
OFF
Sleep
—
GND
ON
Active
ROM
Control voltage
– 14 –
CXA2570N
Notes on Operation
Stabilizing the RFAC signal
The RFAC system (RFSUM + EQ) is comprised entirely of non-inverted function blocks.
This is in order to support pickups with built-in RFSUM.
Therefore, if the voltage gain of each block is increased, a feedback loop is formed over the entire RFAC
system causing the RFAC signal to become unstable (oscillate).
In these cases, it is recommended to lower the EQ frequency response and the boost gain. This has a large
effect on the board (power supply, I/O signal cross talk, etc.) loop. The RFAC signal easily becomes unstable if
the VCA gain is increased, the EQ boost frequency is set to a high frequency, the EQ boost amount is
increased, etc.
The VCA gain is low in ROM mode, so the RFAC signal is stable. Also, when not using RFSUM, the RFAC
signal is stabilized because the overall gain is low.
The area where the RFAC signal becomes unstable is thought to vary for each set, as this is greatly affected
by the board loop as noted above.
Proposed stabilization measures
The board and other loop characteristics can be changed by adding external capacitance as noted below.
This has a particularly large effect on the stabilization when using RFSUM.
RF
SUM
0.1µ
VCA
ACSUM
EQI
Add capacitance of 10pF to 20pF.
– 15 –
EQ
AMP
CXA2570N
Example of Representative Characteristics
EQ Rfc resistance value – Frequency response
EQ boost voltage – Frequency response
10
14
Rfc = 100kΩ
Vboost = 1.0V
Vbst = VC, Vfc = VC
9
12
Rfc = 20kΩ
Rfc = 5.1kΩ
8
8
Rfc = 100kΩ
Vboost = 0V
6
[dB]
[dB]
6
5
4
4
2
3
0
2
–2
1
–4
1
0.1
10
100
Rfc = 100kΩ
Vboost = –1.0V
0.1
10
EQ Vfc frequency response
RF AC frequency response
20
Rfc = 20kΩ
Vfc = 0V
9
8
Vbst = VC
AC SUM
17
Rfc = 20kΩ
Vfc = 1V
14
Rfc = 20kΩ
Vfc = –1V
7
8
[dB]
[dB]
EQ_Pass
RW mode
11
6
5
5
4
2
3
–1
2
–4
1
–7
1
0.1
10
100
EQ_Pass
ROM mode
0.1
1
10
100
[MHz]
[MHz]
RF DC frequency response
FE frequency response
38
34
35
31
RW
32
28
29
25
26
22
23
[dB]
[dB]
100
[MHz]
10
ROM
19
20
16
17
13
14
10
11
7
8
Rfc = 5.1kΩ
Vboost = –1.0V
1
[MHz]
0
Vfc = VC
Rfc = 5.1kΩ
Vboost = 0V
10
Rfc = 100kΩ
7
0
Rfc = 5.1kΩ
Vboost = 1.0V
0.1
1
10
4
0.01
100
[MHz]
RW
ROM
0.1
1
[MHz]
– 16 –
10
CXA2570N
APC I/O characteristics
TE frequency response
35
5.5
32
5.0
RW
4.5
VLD – Output voltage [V]
29
26
[dB]
23
20
17
ROM
16
4.0
VCC = 5.5V
3.5
3.0
2.5
2.0
VCC = 3.0V
13
1.5
10
1.0
0.01
0.1
1
0.5
0.05
10
[MHz]
– 17 –
0.1
0.15
0.2
VPD – Input voltage [V]
0.25
CXA2570N
Package Outline
Unit: mm
24PIN SSOP(PLASTIC)
+ 0.2
1.25 – 0.1
∗7.8 ± 0.1
24
0.1
13
∗5.6 ± 0.1
7.6 ± 0.2
A
1
+ 0.1
0.22 – 0.05
12
+ 0.05
0.15 – 0.02
0.13 M
0.65
0.5 ± 0.2
0.1 ± 0.1
0° to 10°
NOTE: Dimensions “∗” does not include mold protrusion.
DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
SONY CODE
SSOP-24P-L01
LEAD TREATMENT
SOLDER/PALLADIUM
PLATING
EIAJ CODE
SSOP024-P-0056
LEAD MATERIAL
42/COPPER ALLOY
PACKAGE MASS
0.1g
JEDEC CODE
NOTE : PALLADIUM PLATING
This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
– 18 –