ICL7611, ICL7612 ® Data Sheet April 26, 2007 FN2919.9 1.4MHz, Low Power CMOS Operational Amplifiers Features The ICL761X series is a family of CMOS operational amplifiers. These devices provide the designer with high performance operation at low supply voltages and selectable quiescent currents, and are an ideal design tool when ultra low input current and low power dissipation are desired. • High Input Impedance . . . . . . . . . . . . . . . . . . . . . . 1012Ω The basic amplifier will operate at supply voltages ranging from ±1V to ±8V, and may be operated from a single Lithium cell. A unique quiescent current programming pin allows setting of standby current to 1mA, 100μA, or 10μA, with no external components. This results in power consumption as low as 20μW. The output swing ranges to within a few millivolts of the supply voltages. Of particular significance is the extremely low (1pA) input current, input noise current of 0.01pA/√Hz, and 1012Ω input impedance. These features optimize performance in very high source impedance applications. The inputs are internally protected. Outputs are fully protected against short circuits to ground or to either supply. • Wide Operating Voltage Range . . . . . . . . . . . ±1V to ±8V • Programmable Power Consumption . . . . . Low as 20μW • Input Current Lower Than BIFETs . . . . . . . . . . . 1pA (Typ) • Output Voltage Swing . . . . . . . . . . . . . . . . . . . V+ and V• Input Common Mode Voltage Range Greater Than Supply Rails (ICL7612) • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Portable Instruments • Telephone Headsets • Hearing Aid/Microphone Amplifiers • Meter Amplifiers • Medical Instruments • High Impedance Buffers AC performance is excellent, with a slew rate of 1.6V/μs, and unity gain bandwidth of 1MHz at IQ = 1mA. Because of the low power dissipation, junction temperature rise and drift are quite low. Applications utilizing these features may include stable instruments, extended life designs, or high density packages. Pinouts ICL7611, ICL7612 (8 LD PDIP, 8 LD SOIC) TOP VIEW BAL 1 -IN 2 +IN 3 V- 4 - + 1 8 IQ SET 7 V+ 6 OUT 5 BAL CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004-2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ICL7611, ICL7612 Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # ICL7611DCBA 7611 DCBA 0 to +70 8 Ld SOIC (150 mil) M8.15 ICL7611DCBAZ (Note) 7611 DCBAZ 0 to +70 8 Ld SOIC (150 mil) (Pb-free) M8.15 ICL7611DCBA-T 7611 DCBA 0 to +70 8 Ld SOIC (150 mil) Tape and Reel M8.15 ICL7611DCBAZ-T (Note) 7611 DCBAZ 0 to +70 8 Ld SOIC (150 mil) Tape and Reel (Pb-free) M8.15 ICL7611DCPA 7611 DCPA 0 to +70 8 Ld PDIP E8.3 ICL7611DCPAZ (Note) 7611 DCPAZ 0 to +70 8 Ld PDIP* (Pb-free) E8.3 ICL7612BCPA 7612 BCPA 0 to +70 8 Ld PDIP E8.3 ICL7612BCPAZ 7612 BCPAZ 0 to +70 8 Ld PDIP* (Pb-free) E8.3 ICL7612DCBA 7612 DCBA 0 to +70 8 Ld SOIC (150 mil) M8.15 ICL7612DCBA-T 7612 DCBA 0 to +70 8 Ld SOIC (150 mil) Tape and Reel M8.15 ICL7612DCBAZ (Note) 7612 DCBAZ 0 to +70 8 Ld SOIC (150 mil) (Pb-free) M8.15 ICL7612DCBAZ-T (Note) 7612 DCBAZ 0 to +70 8 Ld SOIC (150 mil) Tape and Reel (Pb-free) M8.15 ICL7612DCPA 7612 DCPA 0 to +70 8 Ld PDIP E8.3 ICL7612DCPAZ (Note) 7612 DCPAZ 0 to +70 8 Ld PDIP* (Pb-free) E8.3 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2 FN2919.9 April 26, 2007 ICL7611, ICL7612 Absolute Maximum Ratings Thermal Information Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . V- -0.3 to V+ +0.3V Differential Input Voltage (Note 1) . . . . . . . . [(V+ +0.3) - (V- -0.3)]V Duration of Output Short Circuit (Note 2). . . . . . . . . . . . . . Unlimited Thermal Resistance (Typical, Note 3) θJA (°C/W) PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range ICL761XC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Long term offset voltage stability will be degraded if large input differential voltages are applied for long periods of time. 2. The outputs may be shorted to ground or to either supply, for VSUPPLY ≤10V. Care must be taken to insure that the dissipation rating is not exceeded. 3. θJA is measured with the component mounted on an evaluation PC board in free air. VSUPPLY = ±5V, Unless Otherwise Specified. Electrical Specifications PARAMETER SYMBOL Input Offset Voltage VOS TEST CONDITIONS RS ≤ 100kΩ ΔVOS/ΔT RS ≤ 100kΩ Temperature Coefficient of VOS Input Offset Current IOS Input Bias Current IBIAS Common Mode Voltage Range (ICL7611 Only) VCMR Extended Common Mode Voltage Range (ICL7612 Only) Output Voltage Swing VCMR VOUT Large Signal Voltage Gain AVOL 3 ICL7612B ICL7611D, ICL7612D TEMP (°C) MIN TYP MAX MIN TYP MAX UNITS +25 - - 5 - - 15 mV Full - - 7 - - 20 mV - - 15 - - 25 - μV/°C +25 - 0.5 30 - 0.5 30 pA Full - - 300 - - 300 pA +25 - 1.0 50 - 1.0 50 pA Full - - 400 - - 400 pA IQ = 10μA +25 - - - ±4.4 - - V IQ = 100μA +25 - - - ±4.2 - - V IQ = 1mA +25 - - - ±3.7 - - V IQ = 10μA +25 ±5.3 - - ±5.3 - - V IQ = 100μA +25 +5.3, -5.1 - - +5.3, 5.1 - - V IQ = 1mA +25 +5.3, 4.5 - - +5.3, 4.5 - - V IQ = 10μA, RL = 1MΩ +25 ±4.9 - - ±4.9 - - V Full ±4.8 - - ±4.8 - - V IQ = 100μA, RL = 100kΩ +25 ±4.9 - - ±4.9 - - V Full ±4.8 - - ±4.8 - - V IQ = 1mA, RL = 10kΩ +25 ±4.5 - - ±4.5 - - V Full ±4.3 - - ±4.3 - - V VO = ±4.0V, RL = 1MΩ, IQ = 10μA +25 80 104 - 80 104 - dB Full 75 - - 75 - - dB VO = ±4.0V, RL = 100kΩ, IQ = 100μA +25 80 102 - 80 102 - dB Full 75 - - 75 - - dB VO = ±4.0V, RL = 10kΩ, IQ = 1mA +25 76 83 - 76 83 - dB Full 72 - - 72 - - dB FN2919.9 April 26, 2007 ICL7611, ICL7612 VSUPPLY = ±5V, Unless Otherwise Specified. (Continued) Electrical Specifications PARAMETER SYMBOL Unity Gain Bandwidth GBW Input Resistance TEST CONDITIONS CMRR Power Supply Rejection Ratio (VSUPPLY = ±8V to ±2V) PSRR ICL7611D, ICL7612D MIN TYP MAX MIN TYP MAX UNITS IQ = 10μA +25 - 0.044 - - 0.044 - MHz IQ = 100μA +25 - 0.48 - - 0.48 - MHz IQ = 1mA +25 - 1.4 - - 1.4 - MHz +25 - 1012 - - 1012 - Ω RS ≤ 100kΩ, IQ = 10μA +25 70 96 - 70 96 - dB RS ≤ 100kΩ, IQ = 100μA +25 70 91 - 70 91 - dB RIN Common Mode Rejection Ratio ICL7612B TEMP (°C) RS ≤ 100kΩ, IQ = 1mA +25 60 87 - 60 87 - dB RS ≤ 100kΩ, IQ = 10μA +25 80 94 - 80 94 - dB RS ≤ 100kΩ, IQ = 100μA +25 80 86 - 80 86 - dB RS ≤ 100kΩ, IQ = 1mA +25 70 77 - 70 77 - dB Input Referred Noise Voltage eN RS = 100Ω, f = 1kHz +25 - 100 - - 100 - nV/√Hz Input Referred Noise Current iN RS = 100Ω, f = 1kHz +25 - 0.01 - - 0.01 - pA/√Hz Supply Current (No Signal, No Load) ISUPPLY IQ SET = +5V, Low Bias +25 - 0.01 0.02 - 0.01 0.02 mA IQ SET = 0V, Medium Bias +25 - 0.1 0.25 - 0.1 0.25 mA Channel Separation VO1/VO2 AV = 100 IQ SET = -5V, High Bias Slew Rate (AV = 1, CL = 100pF, VIN = 8VP-P) Rise Time (VIN = 50mV, CL = 100pF) SR tr Overshoot Factor (VIN = 50mV, CL = 100pF) OS +25 - 1.0 2.5 - 1.0 2.5 mA +25 - 120 - - 120 - dB IQ = 10μA, RL = 1MΩ +25 - 0.016 - - 0.016 - V/μs IQ = 100μA, RL = 100kΩ +25 - 0.16 - - 0.16 - V/μs IQ = 1mA, RL = 10kΩ +25 - 1.6 - - 1.6 - V/μs IQ = 10μA, RL = 1MΩ +25 - 20 - - 20 - μs IQ = 100μA, RL = 100kΩ +25 - 2 - - 2 - μs IQ = 1mA, RL = 10kΩ +25 - 0.9 - - 0.9 - μs IQ = 10μA, RL = 1MΩ +25 - 5 - - 5 - % IQ = 100μA, RL = 100kΩ +25 - 10 - - 10 - % IQ = 1mA, RL = 10kΩ +25 - 40 - - 40 - % VSUPPLY = ±1V, IQ = 10μA, Unless Otherwise Specified. Electrical Specifications PARAMETER SYMBOL Input Offset Voltage VOS TEST CONDITIONS RS ≤ 100kΩ ΔVOS/ΔT RS ≤ 100kΩ Temperature Coefficient of VOS Input Offset Current IOS Input Bias Current IBIAS Extended Common Mode Voltage Range VCMR 4 ICL7612B TEMP (°C) MIN TYP MAX UNITS +25 - - 5 mV Full - - 7 mV - - 15 - μV/°C +25 - 0.5 30 pA Full - - 300 pA +25 - 1.0 50 pA Full - - 500 pA +25 +0.6 to -1.1 - - V FN2919.9 April 26, 2007 ICL7611, ICL7612 VSUPPLY = ±1V, IQ = 10μA, Unless Otherwise Specified. (Continued) Electrical Specifications PARAMETER SYMBOL Output Voltage Swing VOUT Large Signal Voltage Gain TEMP (°C) MIN TYP MAX UNITS +25 ±0.98 - - V Full ±0.96 - - V +25 - 90 - dB Full - 80 - dB +25 - 0.044 - MHz +25 - 1012 - Ω RL = 1MΩ VO = ±0.1V, RL = 1MΩ AVOL Unity Gain Bandwidth ICL7612B TEST CONDITIONS GBW Input Resistance RIN Common Mode Rejection Ratio CMRR RS ≤ 100kΩ +25 - 80 - dB Power Supply Rejection Ratio PSRR RS ≤ 100kΩ +25 - 80 - dB Input Referred Noise Voltage eN RS = 100Ω, f = 1kHz +25 - 100 - nV/√Hz Input Referred Noise Current iN RS = 100Ω, f = 1kHz +25 - 0.01 - pA/√Hz No Signal, No Load +25 - 6 15 μA AV = 1, CL = 100pF, VIN = 0.2VP-P, RL = 1MΩ +25 - 0.016 - V/μs Supply Current ISUPPLY Slew Rate SR Rise Time tr VIN = 50mV, CL = 100pF RL = 1MΩ +25 - 20 - μs OS VIN = 50mV, CL = 100pF, RL = 1MΩ +25 - 5 - % Overshoot Factor Schematic Diagram IQ SETTING STAGE INPUT STAGE OUTPUT STAGE V+ 3k 900k 3k QP5 BAL BAL QP1 QP1 QP6 QP7 QP3 6.3V QP8 100k QP4 V+ +INPUT QP9 QN1 QN2 CFF = 9pF OUTPUT VV+ CC = 33pF -INPUT QN7 QN4 V- QN6 QN3 QN11 QN9 QN10 QN5 6.3V QN8 V- V+ 5 IQ SET FN2919.9 April 26, 2007 ICL7611, ICL7612 Application Information Static Protection All devices are static protected by the use of input diodes. However, strong static fields should be avoided, as it is possible for the strong fields to cause degraded diode junction characteristics, which may result in increased input leakage currents. Latchup Avoidance Junction-isolated CMOS circuits employ configurations which produce a parasitic 4-layer (PNPN) structure. The 4-layer structure has characteristics similar to an SCR, and under certain circumstances may be triggered into a low impedance state resulting in excessive supply current. To avoid this condition, no voltage greater than 0.3V beyond the supply rails may be applied to any pin. In general, the op amp supplies must be established simultaneously with, or before any input signals are applied. If this is not possible, the drive circuits must limit input current flow to 2mA to prevent latchup. Choosing the Proper IQ IQ = 10μA, nulling may not be possible with higher values of VOS . Frequency Compensation The ICL7611 and ICL7612 are internally compensated, and are stable for closed loop gains as low as unity with capacitive loads up to 100pF. Extended Common Mode Input Range The ICL7612 incorporates additional processing which allows the input CMVR to exceed each power supply rail by 0.1V for applications where VSUPP ≥ ±1.5V. For those applications where VSUPP ≤ ±1.5V the input CMVR is limited in the positive direction, but may exceed the negative supply rail by 0.1V in the negative direction (e.g., for VSUPPLY = ±1V, the input CMVR would be +0.6V to -1.1V). Operation At VSUPPLY = ±1V Operation at VSUPPLY = ±1V is guaranteed at IQ = 10μA for A and B grades only. The ICL7611 and ICL7612 have a similar IQ set-up scheme, which allows the amplifier to be set to nominal quiescent currents of 10μA, 100μA or 1mA. These current settings change only very slightly over the entire supply voltage range. The ICL7611 and ICL7612 have an external IQ control terminal, permitting user selection of quiescent current. To set the IQ connect the IQ terminal as follows: Output swings to within a few millivolts of the supply rails are achievable for RL ≥ 1MΩ. Guaranteed input CMVR is ±0.6V minimum and typically +0.9V to -0.7V at VSUPPLY = ±1V. For applications where greater common mode range is desirable, refer to the description of ICL7612 above. IQ = 10μA - IQ pin to V+ The user is cautioned that, due to extremely high input impedances, care must be exercised in layout, construction, board cleanliness, and supply filtering to avoid hum and noise pickup. IQ = 100μA - IQ pin to ground. If this is not possible, any voltage from V+ - 0.8 to V- +0.8 can be used. IQ = 1mA - IQ pin to VNOTE: The output current available is a function of the quiescent current setting. For maximum peak-to-peak output voltage swings into low impedance loads, IQ of 1mA should be selected. Typical Applications Note that in no case is IQ shown. The value of IQ must be chosen by the designer with regard to frequency response and power dissipation. Output Stage and Load Driving Considerations Each amplifiers’ quiescent current flows primarily in the output stage. This is approximately 70% of the IQ settings. This allows output swings to almost the supply rails for output loads of 1MΩ, 100kΩ, and 10kΩ, using the output stage in a highly linear class A mode. In this mode, crossover distortion is avoided and the voltage gain is maximized. However, the output stage can also be operated in Class AB for higher output currents. (See graphs under Typical Operating Characteristics). During the transition from Class A to Class B operation, the output transfer characteristic is non-linear and the voltage gain decreases. VIN + VOUT ICL7612 - RL ≥10k FIGURE 1. SIMPLE FOLLOWER (NOTE 4) +5 VIN - +5 VOUT TO CMOS OR LPTTL LOGIC ICL7612 100k Input Offset Nulling + 1M Offset nulling may be achieved by connecting a 25k pot between the BAL terminals with the wiper connected to V+. At quiescent currents of 1mA and 100μA the nulling range provided is adequate for all VOS selections; however with 6 NOTE: 4. By using the ICL7612 in this application, the circuit will follow rail to rail inputs. FIGURE 2. LEVEL DETECTOR (NOTE 4) FN2919.9 April 26, 2007 ICL7611, ICL7612 1μF + 1M ICL7611 - + ICL7611 VOUT ICL7611 λ + 1M 1M VV+ DUTY CYCLE + 680kΩ WAVEFORM GENERATOR NOTE: Since the output range swings exactly from rail to rail, frequency and duty cycle are virtually independent of power supply variations. NOTE: Low leakage currents allow integration times up to several hours. FIGURE 4. PRECISE TRIANGLE/SQUARE WAVE GENERATOR FIGURE 3. PHOTOCURRENT INTEGRATOR 1M +8V VOH 0.5μF 10k VIN 20k 2.2M + 10μF TO SUCCEEDING INPUT STAGE 20k ICL7611 - 1.8k = 5% SCALE ADJUST OUT IQ - VOL V- - V+ ICL7611 COMMON TA = +125°C + V+ -8V + FIGURE 6. BURN-IN AND LIFE TEST CIRCUIT FIGURE 5. AVERAGING AC TO DC CONVERTER FOR A/D CONVERTERS SUCH AS ICL7106, ICL7107, ICL7109, ICL7116, ICL7117 VIN BAL VOUT + BAL 25k V+ FIGURE 7. VOS NULL CIRCUIT 7 FN2919.9 April 26, 2007 ICL7611, ICL7612 0.2μF 30k 0.2μF 0.2μF 160k 680k + 100k 51k ICL7611 + - ICL7611 360k INPUT 0.1μF 0.2μF 1M 0.1μF 360k (NOTE 5) OUTPUT 1M (NOTE 5) NOTES: 5. Note that small capacitors (25pF to 50pF) may be needed for stability in some cases. 6. The low bias currents permit high resistance and low capacitance values to be used to achieve low frequency cutoff. fC = 10Hz, AVCL = 4, Passband ripple = 0.1dB. FIGURE 8. FIFTH ORDER CHEBYCHEV MULTIPLE FEEDBACK LOW PASS FILTER Typical Performance Curves 104 10k V+ - V- = 10V NO LOAD NO SIGNAL IQ = 1mA SUPPLY CURRENT (μA) SUPPLY CURRENT (μA) TA = +25°C NO LOAD NO SIGNAL 1k IQ = 100μA 100 IIQQ == 10μA 1mA 10 1 0 2 4 6 8 10 SUPPLY VOLTAGE (V) 12 14 100 10 1.0 100 FIGURE 11. INPUT BIAS CURRENT vs TEMPERATURE 8 IQ = 100μA IQ = 10μA 10 -25 0 25 50 75 100 125 FIGURE 10. SUPPLY CURRENT PER AMPLIFIER vs FREE-AIR TEMPERATURE DIFFERENTIAL VOLTAGE GAIN (kV/V) INPUT BIAS CURRENT (pA) VS = ±5V 0 25 50 75 FREE-AIR TEMPERATURE (°C) 102 FREE-AIR TEMPERATURE (°C) 1000 -25 IQ = 1mA 1 -50 16 FIGURE 9. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE 0.1 -50 103 125 1000 VSUPP = 10V VOUT = 8V RL = 1MΩ IQ = 10μA 100 RL = 100kΩ IQ = 100μA RL = 10kΩ IQ = 1mA 10 1 -75 -50 -25 0 25 50 75 100 125 FREE-AIR TEMPERATURE (°C) FIGURE 12. LARGE SIGNAL DIFFERENTIAL VOLTAGE GAIN vs FREE-AIR TEMPERATURE FN2919.9 April 26, 2007 ICL7611, ICL7612 Typical Performance Curves (Continued) 105 IQ = 100μA IQ = 1mA 104 0 45 103 PHASE SHIFT (IQ = 1mA) 102 90 135 10 IQ = 10μA 1 0.1 1.0 10 100 1k 10k FREQUENCY (Hz) 180 1M 100k SUPPLY VOLTAGE REJECTION RATIO (dB) FIGURE 13. LARGE SIGNAL FREQUENCY RESPONSE VSUPP = 10V 95 90 IQ = 100μA 85 IQ = 10μA 80 75 70 65 -75 -50 -25 0 25 50 IQ = 10μA 95 IQ = 100μA 90 IQ = 1mA 85 80 75 70 -75 -50 -25 25 50 75 100 125 75 100 125 600 TA = +25°C 3V ≤ VSUPP ≤ 16V 500 400 300 200 100 0 10 100 FREE-AIR TEMPERATURE (°C) FIGURE 15. POWER SUPPLY REJECTION RATIO vs FREE-AIR TEMPERATURE 1k FREQUENCY (Hz) 10k 100k FIGURE 16. EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 16 16 TA = +25°C 14 IQ = 1mA VSUPP = ±8V 12 MAXIMUM OUTPUT VOLTAGE (VP-P) MAXIMUM OUTPUT VOLTAGE (VP-P) 0 FIGURE 14. COMMON MODE REJECTION RATIO vs FREE-AIR TEMPERATURE 100 IQ = 1mA VSUPP = 10V 100 FREE-AIR TEMPERATURE (°C) EQUIVALENT INPUT NOISE VOLTAGE (nV/√Hz) 106 COMMON MODE REJECTION RATIO (dB) 105 TA = +25°C VSUPP = 15V PHASE SHIFT (°) DIFFERENTIAL VOLTAGE GAIN (V/V) 107 IQ = 10μA IQ = 100μA 10 8 VSUPP = ±5V 6 4 2 VSUPP = ±2V 0 100 1k 10k 100k FREQUENCY (Hz) 1M FIGURE 17. OUTPUT VOLTAGE vs FREQUENCY 9 10M VSUPP = 10V IQ = 1mA 14 12 10 TA = -55°C 8 TA = +25°C 6 TA = +125°C 4 2 0 10k 100k 1M FREQUENCY (Hz) 10M FIGURE 18. OUTPUT VOLTAGE vs FREQUENCY FN2919.9 April 26, 2007 ICL7611, ICL7612 Typical Performance Curves (Continued) 12 TA = +25°C MAXIMUM OUTPUT VOLTAGE (VP-P) MAXIMUM OUTPUT VOLTAGE (VP-P) 16 14 12 RL = 100kΩ - 1MΩ 10 RL = 10kΩ 8 6 4 2 4 6 8 10 12 SUPPLY VOLTAGE (V) 14 6 RL = 2kΩ 4 VSUPP = 10V IQ = 1mA 2 -50 -25 0 25 50 75 FREE-AIR TEMPERATURE (°C) 125 0.01 40 IQ = 1mA 30 20 10 0 0 2 4 6 8 10 12 14 IQ = 10μA 0.1 IQ = 100μA 1.0 IQ = 1mA 10 16 0 2 4 6 8 10 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) FIGURE 21. OUTPUT SOURCE CURRENT vs SUPPLY VOLTAGE 12 10 8 6 4 2 0 0.1 14 16 8 TA = +25°C V+ - V- = 10V IQ = 1mA INPUT AND OUTPUT VOLTAGE (V) 14 12 FIGURE 22. OUTPUT SINK CURRENT vs SUPPLY VOLTAGE 16 MAXIMUM OUTPUT VOLTAGE (VP-P) 100 FIGURE 20. OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE MAXIMUM OUTPUT SINK CURRENT (mA) MAXIMUM OUTPUT SOURCE CURRENT (mA) RL = 10kΩ 8 0 -75 16 FIGURE 19. OUTPUT VOLTAGE vs SUPPLY VOLTAGE RL = 100kΩ 10 6 TA = +25°C, VSUPP = 10V RL = 10kΩ, CL = 100pF 4 2 OUTPUT 0 -2 INPUT -4 -6 1.0 10 LOAD RESISTANCE (kΩ) FIGURE 23. OUTPUT VOLTAGE vs LOAD RESISTANCE 10 100 0 2 4 6 TIME (μs) 8 10 12 FIGURE 24. VOLTAGE FOLLOWER LARGE SIGNAL PULSE RESPONSE (IQ = 1mA) FN2919.9 April 26, 2007 ICL7611, ICL7612 Typical Performance Curves (Continued) 8 6 TA = +25°C, VSUPP = 10V RL = 100kΩ, CL = 100pF INPUT AND OUTPUT VOLTAGE (V) INPUT AND OUTPUT VOLTAGE (V) 8 4 2 OUTPUT 0 -2 INPUT -4 -6 6 4 2 OUTPUT 0 INPUT -2 -4 -6 0 20 40 60 TIME (μs) 80 100 120 FIGURE 25. VOLTAGE FOLLOWER LARGE SIGNAL PULSE RESPONSE (IQ = 100μA) 11 TA = +25°C, VSUPP = 10V RL = 1MΩ, CL = 100pF 0 200 400 600 TIME (μs) 800 1000 1200 FIGURE 26. VOLTAGE FOLLOWER LARGE SIGNAL PULSE RESPONSE (IQ = 10μA) FN2919.9 April 26, 2007 ICL7611, ICL7612 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E SYMBOL -B- 1 2 3 L SEATING PLANE -A- A D h x 45° -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e α B S 0.050 BSC - 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 α 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 1.27 BSC H N NOTES: MILLIMETERS 8 0° 8 8° 0° 7 8° Rev. 1 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 12 FN2919.9 April 26, 2007 ICL7611, ICL7612 Dual-In-Line Plastic Packages (PDIP) E8.3 (JEDEC MS-001-BA ISSUE D) N 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AD E BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 A1 eC B 0.010 (0.25) M C A B S MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8, 10 eA C 0.008 0.014 0.204 C D 0.355 0.400 9.01 eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. eA 0.300 BSC 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eB - L 0.115 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 0.355 10.16 N 2.54 BSC 7.62 BSC 0.430 - 0.150 2.93 8 6 10.92 7 3.81 4 8 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 FN2919.9 April 26, 2007