Selector Guide

V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
Optoelectronics Bare Die Portfolio
Infrared Emitters and Photo Detectors
TABLE OF CONTENTS
Introduction to Bare Die.......................................................................................................02
Die Portfolio..........................................................................................................................03
• Nomenclature................................................................................................................03
• Infrared Emitters............................................................................................................04
• Photodiodes..................................................................................................................06
• Phototransistors............................................................................................................08
Custom Design.....................................................................................................................09
Packaging Options ..............................................................................................................10
RESOURCES
• Infrared emitter bare die product portfolio - www.vishay.com/die-wafer/ir-emitting-diodes/
• Photo detector bare die product portfolio - www.vishay.com/die-wafer/photo-detectors/
• For technical support contact - [email protected] or
[email protected]
• Sales contacts - www.vishay.com/doc?99914
One of the World’s Largest Manufacturers of
Discrete Semiconductors and Passive Components
SELECTOR GUIDE
1/11
VMN-SG2200-1502
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC
DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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OPTOELECTRONICS
Bare Die
Introduction
Benefits of using bare die
• High design flexibility without package limitations
• High level of integration
• Temperature management with chip-on-board (COB) technology
• Highly accurate die placement
• Reduced system cost
• Customer specific design
• Possible process flow modification
Vishay service
• Design assistance
• Assembly assistance
• Die handling assistance
Wafer processing duty
• Wafer mapping/wafer inking
• Wafer thinning
• Wafer dicing
• Die sorting
• Visual inspection
Packaging and shipping methods
• Unsawn wafer: the wafers are delivered in a sealed bag and die are not singulated
• Sawn wafer on loose foil: the wafers are sawn and supplied on blue tape
• Sawn wafer on discoframe: the wafers are sawn and supplied on a blue tape in a plastic frame
SELECTOR GUIDE
2/11
VMN-SG2200-1502
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DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
Die Usage Basic Guidelines
Bare die products require careful handling and storage as well as optimized
assembly processes and tools to avoid damage and deviations from the
expected performance. The following guidelines are based on Vishay’s
many years of experience of manufacturing and assembling semiconductor
devices.
Die Handling
To avoid contamination and damage die or wafers should never be handled
by bare hands. Mechanical pressure has to be limited and special tweezers
have to be used for grabbing a die from the packing.
Storage time for wafers in sealed condition shall not exceed 6 months
(storage ambient conditions: TA = 15...30 °C; relative humidity: < 60 %).
Die Attach
To assure optimal electrical conductivity between silicon and copper, Vishay wafers are coated on the back side with two or
three metallic solderable layers which are suitable for a wide range of solders, ranging from solder alloys to conductive epoxies.
Fluxes are not recommended for solders because residuals can contaminate the surface of the die, and cause voids under the
die, thus compromising heat dissipation and electrical performance.
Vishay experts are happy to advise you on which assembly materials are best suited to your specific requirements..
Wire Bonding
Vishay does not define absolute bonding parameters, since bonding equipment and materials vary greatly. Customers are
advised to optimize bonding parameters according to their specific equipment.
Upon request, Vishay is ready to assist you in optimizing your wirebonding process.
Bare Die Naming Rules for Infrared Emitters
T
B
94
14
VA
SF
F
Telefunken
Technology
Wavelength
Chip Size
Internal
Package Form
Status
B: Bulk Emitter
S: Surface
Emitter
94: 940 nm
89: 890 nm
87: 870 nm
85: 850 nm
83: 830 nm
08: 08 mil
11: 11 mil
14: 14 mil
17: 17 mil
V: Emitter
A: Version /
Type
S: Sawn Wafer
F: Placed on
Foil
F: Finished
Good
(Now part of
Vishay)
Bare Die Naming Rules for Photo Detectors
T
11
10
P6
SD
F
Telefunken
Technology
Size
Type
Package Form
Status
(Now part of
Vishay)
11: Homogeneous
15: Epitaxial
Internal
Classification
P:
Photodetector
6: Internal
Classification
S: Sawn Wafer
D: Mounted on
Discoframe
F: Finished
Good
SELECTOR GUIDE
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OPTOELECTRONICS
Bare Die
Infrared Emitters
Vishay offers a wide variety of high-power, high-speed infrared emitter chips for a broad range of applications. Vishay offers
double heterojunction infrared emitters with the lowest forward voltages on the market; surface emitters that deliver the highest
radiant intensities; and highly efficient homojunction emitters.
All Vishay emitter chips satisfy the requirements of AEC Q101.
Portfolio
Vishay offers a wide selection of chips, emitting at 830 nm, 850 nm, 870 nm, 890 nm, 940 nm and 950 nm.
Typical Applications
• IR touch display based devices such as printer displays, ebook reader, smart phones, tablets, and ultrabooks
• Navigation devices
• Automotive dashboard displays
• Data communication
• Illumination for cameras
Available Technologies
• Liquid Phase Epitaxy (LPE):
–– Homojunction structures on GaAs
–– Double heterojunction structures (DH) on GaAs/AlGaAs
• Metal Organic Vapor Phase Epitaxy (MOVPE):
–– High-power surface emitter
–– Bulk emitter
Double Heterojunction
Structure
Homojunction Structure
P Electrode
P Electrode
P Cladding
P Cladding
N Cladding
P Layer
N Cladding
Surface Emitter
GaAs Substrate
AlGaAs-layer
N Pad
N Electrode
N Cladding
MQW
P Cladding
Bonding Layer
N Electrode
Silicon Substrate
P Electrode
SELECTOR GUIDE
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OPTOELECTRONICS
Bare Die
IR Surface Emitters
Angle
of Half
Intensity
(±°)
Surge Forward
Current
(A at tp = 100 µs)
Rise Time
(ns)
350A
55
5
15
850
75B
55
1.5
15
0.355 x 0.355 x 0.17
850
30C
55
1
15
Surface
0.250×0.250×0.17
850
40D
55
1
10
TS9414VA
Surface
0.355×0.355×0.17
940
35C
60
1
10
TS9410VA
Surface
0.250×0.250×0.17
940
12E
55
1
10
T8719VP
0.47 x 0.47 x 0.16
870
31
80
1
15
T8914VP
0.37 x 0.37 x 0.17
885
21
80
1
25
T8514VB
0.37 x 0.37 x 0.17
850
23
-
1
25
T8714VP
0.37 x 0.37 x 0.16
865
26
80
1
13
T163VU
0.37 x 0.37 x 0.265
950
22
-
1.5
800
Type
Chip Dimensions
LxWxH
(mm)
TS8542VA
Surface
1.066 x 1.066 x 0.17
850
TS8520VA
Surface
0.508 x 0.508 x 0.17
TS8514VA
Surface
TS8510VA
Part Number
Product
Image
Peak
Radiant
Wavelength Power
(nm)
(mW)
TB9414VA
Bulk
0.37 x 0.37 x 0.19
940
21C
80
1
15
TB9408VA
Bulk
0.2 x 0.2 x 0.19
940
22C
80
0.5
15
Note
*The measurements are based on samples of die which are mounted on TO-18 gold header without resin coating.
A IF=1A, B IF=250mA, C IF=100mA, D IF=70mA, E IF=50mA
SELECTOR GUIDE
5/11
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DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
Photo Detectors
Vishay offers the broadest selection of high-speed, low dark current PIN photodiode chips. They are specially designed to
achieve excellent sensitivity together with high reliability. Vishay phototransistors are extremely sensitive and fast compared to
other such devices on the market.
Portfolio
• Vishay offers the broadest selection of photo detector chips suitable for ambient light and IR detection
• Available technologies:
–– Epitaxial
–– Homogeneous
Typical Applications
• IR touch display based devices
• High-speed data transfer
• Light barriers
• Position sensing
• Alarm and safety equipment
Cross Section of PIN Photodiode and Phototransistor
PIN Photodiode
Antireflection Coating
Contact
Isolation
p+
Space Charge
Region
n+
Phototransistor
Contact
Antireflection Coating
Metallization
Emitter
n
Base
p
Isolation
Collector
EA
n
n+
Contact
SELECTOR GUIDE
6/11
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V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
PIN Photodiodes
Part
Number
Product
Image
Chip Dimensions
LxWxH
(mm)
Reverse Light
Reverse
Angle
Peak
Spectral Bandwidth
Current
Rise Time/
Photo
Dark
of Half
Wavelength
(nm)
(EA = 1 mW/cm2
Fall Time
Sensitive
Current Sensitivity
(nm)
(50%)
λ = 950 nm
(ns)
Area (mm2)
(nA)
(± °)
VR = 5 V)
T1112P
3.05 x 2.1 x 0.28
970
640 to 1070
44 µA
0.1
60
130/130
5.5
T1113P
2.97 x 2.97 x 0.28
960
660 to 1050
55 µA
2
60
100/100
7.5
T1116P
2.97 x 2.97 x 0.28
940
500 to 1050
43 µA
2
60
40/40
7.7
T1110P6
2.97 x 2.97 x 0.28
940
600 to 1050
55 µA
2
60
100/100
7.5
T1120P
2.37 x 2.37 x 0.28
940
600 to 1050
35 µA
2
60
100/100
4.4
T1172P
1.47 x 1.07 x 0.28
960
640 to 1060
8.7 µA
<1
60
625/670
1.06
T1170P
1.17 x 1.17 x 0.28
920
600 to 1040
7 µA
<1
60
100/100
0.88
T330P
0.67 x 0.67 x 0.28
900
600 to 1050
2.3 µA
0.1
60
4/4
0.23
T337P
0.67 x 0.67 x 0.28
970
610 to 1080
2.3 µA
<1
60
550/100
0.23
T1180P
0.67 x 0.3 x 0.28
810
590 to 1010
0.59 µA
<1
60
530/170
0.055
T1187P
0.67 x 0.3 x 0.28
800
580 to 1070
0.66 µA
<1
60
700/160
0.053
SELECTOR GUIDE
7/11
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC
DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
Phototransistors
Part
Number
Product
Image
Chip Dimensions
LxWxH
(mm)
Spectral
Peak
Bandwidth
Wavelength
(nm)
(nm)
(50%)
Collector Light
Current
(Ee = 1 mW/cm2
λ = 950 nm
VCE = 5V)
Collector
Emitter
Dark
Current
(nA)
Angle
of Half
Sensitivity
(± °)
Rise Time/
Fall Time
(ns)
Photo
Sensitive
Area
(mm2)
T1090P6
0.53 x 0.53 x 0.185
840
440 to
1070
65-750 µA**
1
60
4300/7700
0.14
T5096P
0.39 x 0.39 x 0.185
910
660 to
1030
72-600 µA**
<1
60
3800/3500
0.057
Note
*The measurements are based on samples of die which are mounted on TO- header without resin coating
**Binning is available
Ambient Light PIN Photodiodes
Part
Number
Product
Image
Chip Dimensions
LxWxH
(mm)
Reverse Light
Spectral
Reverse
Angle
Peak
Current
Rise Time/
Photo
Bandwidth
Dark
of Half
Wavelength
(EV = 100 lx, CIE
Fall Time
Sensitive
(nm)
Current Sensitivity
(nm)
illuminant A, VR
(ns)
Area (mm2)
(50%)
(nA)
(± °)
= 5 V)
T1610P
2.97 x 2.97 x 0.28
560
390 to 800
2.9 µA
2
60
100/100
7.7
T1670P
0.72 x 0.72 x 0.28
560
390 to 800
138 nA
0.1
60
100/100
0.27
T1677P
0.72 x 0.72 x 0.28
570
430 to 700
87 nA
0.1
60
100/100
0.27
T1678P
0.72 x 0.72 x 0.2
570
440 to 700
87 nA
0.1
60
100/100
0.34
Ambient Light Phototransistors
Part
Number
Product
Image
T1070P
Chip Dimensions
LxWxH
(mm)
0.72 x 0.72 x 0.22
Collector Light
Spectral
Peak
Current
Bandwidth
Wavelength
(EV = 100 lx, CIE
(nm)
(nm)
illuminant A, VCE
(50%)
= 5 V)
570
440 to
800
50 µA
Collector
Emitter
Dark
Current
(nA)
Angle
of Half
Sensitivity
(± °)
Rise Time/
Fall Time
(ns)
Photo
Sensitive
Area
(mm2)
3
60
-
0.25
Note
*The measurements are based on samples of die which are mounted on TO- header without resin coating
SELECTOR GUIDE
8/11
VMN-SG2200-1502
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC
DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
Custom Design
Vishay offers highly flexible design and fabrication of semi- and full custom specific photodiode and emitter chips. The huge
variety of applications and assembly options requires bare die that are tailored to the specific application to keep the full
potential of the device. A good fit between chip, assembly, and packaging is becoming ever more important with tighter space
and power requirements.
Vishay’s flexible technology base allows customization for a range of parameters and features as listed below:
Emitters
• Geometrical Design
Chip outside dimensions, thickness, pad size, and shape and pad positions can be adjusted according to the customer
specification.
• Pad Topology
Chip topology can be customized with respect to interconnect technology.
Photodetectors
• Geometrical Design
Almost all geometrical parameters of a photodiode can be customized. This includes chip outside dimensions, chip
thickness, pad size and shape, pad positions, photodiode position in an array, and alignment marks.
• AR Coating / Optical Filters
Depending on impinging wavelength and application all photodiodes are equipped with an AR coating. Customization
allows us to match the AR coating to the wavelength needed by the customer.
• Pad Topology
Depending on interconnect technology pad topology can be also optimized.
• Pitch
Linear or two-dimensional arrays with customizable pitch.
SELECTOR GUIDE
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DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
Packing Options
Vishay provides you with several packing options which can fit with virtually any assembly line. Parts are 100 % probed and
inspected.
Unsawn wafer
Sawn wafer on discoframe
Die are not singulated, wafers are provided in box.
Wafer is provided on blue foil; probed and inked; measurement
data is attached.
Upon request chips can also be delivered on plastic frames.
For shipment, the wafers are arranged in stacks. The stacks
are hermetically sealed in plastic bags to ensure protection
against environmental influence (humidity and contamination).
Sawn wafer on loose foil
The wafer is provided on blue film where dies are singulated,
ready for pick and place, bad chips are removed, and
measurement data is attached.
The following documents are available upon the request:
• Material content certificate
–– RoHS (DIN EN 62321)
• Halogen free (DIN EN 14582)
–– SGA reports
–– Failure catalogue
–– ESD test results (according to the JEDEC standards)
SELECTOR GUIDE
10/11
VMN-SG2200-1502
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC
DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
V I S H AY I N T E R T E C H N O L O G Y, I N C .
OPTOELECTRONICS
Bare Die
WORLDWIDE SALES CONTACTS
THE AMERICAS
EUROPE
UNITED STATES
GERMANY
VISHAY AMERICAS
ONE GREENWICH PLACE
SHELTON, CT 06484
UNITED STATES
PH: +1-402-563-6866
FAX: +1-402-563-6296
VISHAY ELECTRONIC GMBH
DR.-FELIX-ZANDMAN-PLATZ 1
95100 SELB
GERMANY
PH: +49-9287-71-0
FAX: +49-9287-70435
ASIA
FRANCE
SINGAPORE
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SINGAPORE 528886
PH: +65-6788-6668
FAX: +65-6788-0988
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06003 NICE, CEDEX 1
FRANCE
PH: +33-4-9337-2727
FAX: +33-4-9337-2726
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P.R. CHINA
PH: +86-21-22315555
FAX: +86-21-22315551
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UNITED KINGDOM
PH: +44-191-516-8584
FAX: +44-191-549-9556
JAPAN
VISHAY JAPAN CO., LTD.
SHIBUYA PRESTIGE BLDG. 4F
3-12-22, SHIBUYA
SHIBUYA-KU
TOKYO 150-0002
JAPAN
PH: +81-3-5466-7150
FAX: +81-3-5466-7160
SELECTOR GUIDE
11/11
VMN-SG2200-1502
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC
DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000