T1120P Datasheet

T1120P
www.vishay.com
Vishay Semiconductors
Silicon PIN Photodiode
FEATURES
• Package type: chip
A
• Package form: single chip
• Dimensions (L x W x H in mm): 2.37 x 2.37 x 0.28
• Radiant sensitive area (in mm2): 4.4
• High photo sensitivity
• High radiant sensitivity
• Suitable for visible and near infrared radiation
• Fast response times
• Angle of half sensitivity: ϕ = ± 60°
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
21678
DESCRIPTION
APPLICATIONS
T1120P is a high speed and high sensitive PIN photodiode
chip with 4.4 mm2 sensitive area detecting visible and near
infrared radiation. Anode is the bond pad on top.
• High speed photo detector
GENERAL INFORMATION
The datasheet is based on Vishay optoelectronics sample testing under certain predetermined and assumed conditions, and is
provided for illustration purpose only. Customers are encouraged to perform testing in actual proposed packaged and used
conditions. Vishay optoelectronics die products are tested using Vishay optoelectronics based quality assurance procedures
and are manufactured using Vishay optoelectronics established processes. Estimates such as those described and set forth in
this datasheet for semiconductor die will vary depending on a number of packaging, handling, use, and other factors. Therefore
sold die may not perform on an equivalent basis to standard package products.
PRODUCT SUMMARY
Ira (μA)
ϕ (deg)
λ0.1 (nm)
35
± 60
430 to 1100
PACKAGING
REMARKS
PACKAGE FORM
Wafer sawn on foil with discoframe
MOQ: 5000 pcs
Chip
COMPONENT
T1120P
Note
• Test conditions see table “Basic Characteristics”
ORDERING INFORMATION
ORDERING CODE
T1120P-SD-F
Note
• MOQ: minimum order quantity
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
VALUE
Reverse voltage
VR
60
V
Junction temperature
Tj
100
°C
Operating temperature range
Tamb
-40 to +100
°C
Storage temperature range
Tstg1
-40 to +100
°C
Storage temperature range on foil
Tstg2
-40 to +50
°C
Rev. 1.5, 07-Dec-15
TEST CONDITION
UNIT
Document Number: 81121
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
T1120P
www.vishay.com
Vishay Semiconductors
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
Breakdown voltage
Forward voltage
Reverse dark current
Diode capacitance
Open circuit voltage
Temperature coefficient of VOC
Short circuit current
Temperature coefficient of Ik
Reverse light current
Angle of half sensitivity
Wavelength of peak sensitivity
Range of spectral bandwidth
Noise equivalent power
Rise time
Fall time
TEST CONDITION
IR = 100 μA, E = 0
IF = 50 mA
VR = 10 V, E = 0
VR = 0 V, f = 1 MHz, E = 0
VR = 3 V, f = 1 MHz, E = 0
Ee = 1 mW/cm2, λ = 950 nm
Ee = 1 mW/cm2, λ = 950 nm
Ee = 1 mW/cm2, λ = 950 nm
Ee = 1 mW/cm2, λ = 950 nm
Ee = 1 mW/cm2, λ = 950 nm, VR = 5 V
VR = 10 V, λ = 950 nm
VR = 10 V, RL = 1 kΩ, λ = 820 nm
VR = 10 V, RL = 1 kΩ, λ = 820 nm
SYMBOL
V(BR)
VF
Iro
CD
CD
VOC
TKVOC
Ik
TKIk
Ira
ϕ
λp
λ0.1
NEP
tr
tf
MIN.
25
-
TYP.
60
1
2
48
17
350
- 2.6
32
0.1
35
± 60
940
430 to 1100
4 x 10-14
100
100
MAX.
1.3
5
-
UNIT
V
V
nA
pF
pF
mV
mV/K
μA
%/K
μA
deg
nm
nm
W/√Hz
ns
ns
Note
• The measurements are based on samples of die which are mounted on a TO-header without resin coating
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
1000
Ira - Reverse Light Current (µA)
Iro - Reverse Dark Current (nA)
1000
100
10
VR = 10 V
1
20
40
60
80
VR = 5 V
λ = 950 nm
1
100
Ira - Reverse Light Current (µA)
VR = 5 V
λ = 950 nm
1.0
0.8
10
1
Fig. 3 - Reverse Light Current vs. Irradiance
1.4
1.2
0.1
Ee - Irradiance (mW/cm2)
94 8421
Fig. 1 - Reverse Dark Current vs. Ambient Temperature
I ra rel - Relative Reverse Light Current
10
0.1
0.01
100
Tamb - Ambient Temperature (°C)
94 8403
100
λ = 950 nm
1 mW/cm2
0.5 mW/cm2
10
0.2 mW/cm2
0.1 mW/cm2
0.05 mW/cm2
1
0.6
0
94 8409
20
40
60
80
Tamb - Ambient Temperature (°C)
Fig. 2 - Relative Reverse Light Current vs. Ambient Temperature
Rev. 1.5, 07-Dec-15
0.1
100
94 8422
1
10
100
VR - Reverse Voltage (V)
Fig. 4 - Reverse Light Current vs. Reverse Voltage
Document Number: 81121
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
T1120P
www.vishay.com
Vishay Semiconductors
S(λ)rel - Relative Spectral Sensitivity
CD - Diode Capacitance (pF)
80
E=0
f = 1 MHz
60
40
20
1.0
0.8
0.6
0.4
0.2
0
0
0.1
94 8423
1
10
100
350
550
VR - Reverse Voltage (V)
Fig. 5 - Diode Capacitance vs. Reverse Voltage
750
950
1150
λ - Wavelength (nm)
94 8420
Fig. 6 - Relative Spectral Sensitivity vs. Wavelength
MECHANICAL DIMENSIONS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Length of chip edge (x-direction)
Lx
-
2.37
-
mm
Length of chip edge (y-direction)
Ly
-
2.37
-
mm
Sensitive area
AS
-
4.4
-
mm2
Die height
Bond pad anode
H
-
0.28
-
mm
axb
-
0.2 x 0.2
-
mm2
ADDITIONAL INFORMATION
Frontside metallization, anode
Backside metallization, cathode
Dicing
Die bonding technology
Aluminum
NiV-Ag
Sawing
Epoxy bonding
Note
• All chips are checked in accordance with the Vishay Semiconductor, specification of visual inspection FVOV6870.
The visual inspection shall be made in accordance with the “specification of visual inspection as referenced”. The visual inspection of chip
backside is performed with stereo microscope with incident light and 40x to 80x magnification.
The quality inspection (final visual inspection) is performed by production. An additional visual inspection step as special release procedure
by QM is not installed.
HANDLING AND STORAGE CONDITIONS
• The hermetically sealed shipment lots shall be opened in temperature and moisture controlled cleanroom environment only.
It is mandatory to follow the rules for disposition of material that can be hazardous for humans and environment.
• Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work environments are as
defined in MIL-HDBK-263.
• Singulated die are not to be handled with tweezers. A vacuum wand with non metallic ESD protected tip should be used.
PACKING
Chips are fixed on adhesive foil. Upon request the foils can be mounted on plastic frame or disco frame. For shipment, the
wafers are arranged to stacks and hermetically sealed in plastic bags to ensure protection against environmental influence
(humidity and contamination).
Use for recycling reliable operators only. We can help getting in touch with your nearest sales office. By agreement we will take
back packing material, if it is sorted. You will have to bear the costs of transport. We will invoice you for any costs incurred for
packing material that is returned unsorted or which we are not obliged to accept.
Rev. 1.5, 07-Dec-15
Document Number: 81121
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 02-Oct-12
1
Document Number: 91000