V03N2 - JUNE

LINEAR TECHNOLOGY
JUNE 1993
IN THIS ISSUE . . .
COVER ARTICLE
The LT1206: A 60MHz,
250mA Current-Feedback
Amplifier ......................... 1
William Jett
VOLUME III NUMBER 2
The LT1206:
A 60MHz, 250mA
Current-Feedback Amplifier
Editor's Page ................... 2
by William Jett
Richard Markell
DESIGN FEATURES
The LT1248
Power-Factor Corrector.... 3
Carl Nelson
LTC1174: A High-Efficiency
Buck Converter ................ 6
San-Hwa Chee and Randy Flatness
The New SO8 LTC1147
Switching-Regulator
Controller Offers
High Efficiency in a
Small Footprint ............... 9
Randy Flatness
DESIGN INFORMATION
Ultra-Low-Power CMOS
RS232 Transceiver Achieves
10kV ESD Protection,
Eliminates Latch-Up ...... 14
Ricky Chow and Robert Reay
DESIGN IDEAS ........... 15-25
(complete listing on p.15)
New Device Cameos ....... 26
LTC in the News ............ 27
Introduction
The LT1206 current feedback
amplifier is Linear Technology’s
high-speed solution for driving lowimpedance loads. The part combines
60MHz bandwidth with a guaranteed
250mA output current, operation with
±5V to ±15V supplies, and optional
compensation for capacitive loads,
making it well suited for driving multiple cables and other difficult loads.
A shutdown feature drops the supply
current to less than 100µA when the
part is turned off. Thermal shutdown
and short-circuit protection are included in the device. The LT1206 is
available in a variety of packages
ranging from the surface-mount SO8
to the 7-pin TO220 power package.
Capacitive Loads
Driving capacitive loads presents
two challenges to the IC designer:
maintaining the stability of the amplifier loop and supplying enough
current to slew the capacitor. The
effect of a load capacitance can be
thought of in terms of the stability of
the output stage and that of the
entire loop. A capacitive load can
cause the output stage of an amplifier
to peak or even to oscillate. The effect
of this peaking on the overall response depends on the feedback
components. Sometimes additional
networks are used to reduce the peaking; a resistor added in series with the
load capacitance will isolate the output stage, or a series RC snubber
network added in parallel with the
load will swamp out the load capacitance (Figure 1). The first approach
causes an increase in output impedance and reduction of swing. In the
second approach, power is wasted in
the snubber network, reducing the
current available to slew the load
capacitance. The LT1206 uses an
optional internal network connected
to an additional pin to compensate
for capacitive loads. Adding a 0.01µF
bypass cap between the COMP pin
and the OUTPUT pin connects the
continued on page 11
Design Tools .................. 28
SERIES R
+
Sales Offices ................. 28
OUTPUT
VIN
–
RF
CL
RG
RC NETWORK
(SNUBBER)
Figure 1. Conventional approaches to driving capacitive lines1206_1.eps
EDITOR'S
DESIGN FEATURES
PAGE
Service, Customer Satisfaction,
and All That
by Richard Markell
I first came to Linear Technology
five years ago. In those days we had
two applications engineers (not including Jim Williams, who played
guru to all) and about 300 people.
Since my first days at Linear Technology, the emphasis has been on quality.
We don’t publish circuits unless they
have been breadboarded and extensively tested. The customer is our
primary concern. Phone calls must be
returned as soon as possible. Circuit
breadboards are sometimes sent back
and forth across the country several
times before the customer is satisfied
that the circuit works correctly.
The word got out. Customers, competitors, and even the stock market
discovered LTC. Customers discovered that we mean what we say about
customer support and quality; that is,
we don’t take it for granted.
Now we have several more applications engineers as well as many more
FAEs. They all work for you, the
customer. If you don’t believe that,
give it a try.
This issue features a bevy of new
products from LTC. LTC’s first powerfactor corrector (PFC) circuit is high-
lighted and, to make life easier for “ye
olde editor,” Carl Nelson answers the
age-old question, “What is Power Factor, Anyway?” The LT1248 powerfactor corrector can provide power
factors of greater than 99.5%
over a 10:1 load range—quite an
achievement!
Next are two more switching regulators, which warp through the 90%
efficiency barrier. The LTC1147 is an
8-pin, current-mode buck DC/DC
converter with output current to 1
amp and efficiencies greater than
90% over two decades of output current. The LTC1174 is an easy-to-use
step-down converter, which requires
only a few external components to
construct a complete high-efficiency
converter. The LTC1174 requires only
130µA quiescent current with no load
and a tiny 1µA in shutdown. An internal current limit is pin selectable to
340mA or 600mA. Both of the new
switchers make use of Burst ModeTM
operation to maximize efficiency at
low current levels.
The high-speed area continues to
blossom with the introduction of the
LT1206, a 60MHz current-feedback
amplifier with a guaranteed 250mA
of output current. The LT1206
is optimized to drive multiple
video cables. It features excellent differential gain and phase performance
specifications. Additionally, the
LT1206 draws less than 100µA when
turned off.
This issue features a bumper crop
of Design Ideas. A high-current synchronous switcher circuit converts 5
volts to 3.3 volts at 10 amps and
another switcher converts 12–36 volts
to 5 volts at 5 amps output current.
The LT1228 makes a reappearance in
this issue in an article on how to
optimize a video gain control. The
growing world of RF and wireless
communications is represented with
a circuit to generate protected gate
bias for GaAs power amplifiers for RF
transmissions. Noise generation and
noise generators are here with short
sections on noise generation and noise
for communications channel testing
(i.e., filters). Finally, there is a circuit
that provides a constant 5 volt output
from 3.5 to 40 volt inputs without the
use of a transformer. The circuit hacking continues.
FAE Cameo: Hasti Foroutan
has extensive experience in servocontrol systems.
Hasti once designed the entire
power management circuit of a palmtop computer on a flight from San
Jose to Orange County. The whole
circuit worked the first time it was
powered up on the customer’s printed
circuit board. This design was powered from four AA cells and consisted
of a dual output (5 volts and 3.3 volts)
switching supply for the logic, a constant-current battery charger, a –12V
supply for VPP flash-memory programming, –24 volts for LCD contrast, plus
low-battery detect and microprocessor watchdog and reset functions.
Hasti is our first female FAE and,
as might be expected, a number of
eyebrows are ever so slightly raised
when she first visits customers. Hasti
views this as a challenge to be overcome and feels that once she gains
the customer’s confidence, any preconceptions disappear.
Hasti enjoys traveling and is, in
fact, a world traveler. She has been to
many countries in Europe, North
Africa, and the Middle East, and has
visited exotic cities in Greece and
Turkey. At home in sunny southern
California Hasti enjoys tennis and
horseback riding, but she keeps all of
us at the factory honest by attending
finance and business seminars in her
spare time. Hasti can be reached
through LTC’s Southwest Regional
Sales Office as listed on the back of
this magazine.
LTC now has nineteen Field Application Engineers (FAEs) spread
throughout the world to assist customers in the design and selection of
circuits available from LTC. All of our
FAEs are available by phone and, in
certain situations, in person, to help
you design your circuitry. This space
will profile one FAE per issue.
Hasti Foroutan works out of our
Southwest Area office. She covers
part of southern California, including Orange and San Diego Counties
and parts of Los Angeles and Riverside Counties. She has BSEE and
MBA degrees from the University of
California at Irvine. Hasti’s expertise
is in the areas of switching power
supply and interface design. She also
2
Linear Technology Magazine • June 1993
DESIGN FEATURES
The LT1248 Power-Factor Corrector
by Carl Nelson
What is Power Factor,
Anyway?
Power factor, as it relates to ACmains usage, is basically the ratio of
RMS load power to the product of line
voltage and RMS current. The two are
not the same because the line current
or its harmonics may be phase shifted
with respected to line voltage.
Figure 1 shows typical waveforms
for an electronic load (a TV, stereo,
computer, or the like) that full-wave
rectifies the line voltage to feed a large
filter capacitor. Line current flows
only at the peak of the line voltage,
generating large harmonic content
and making the RMS current much
higher than would be predicted by
load power. After power-factor correction, the current waveform mimics
that seen with a resistive load.
Clever engineers will note that a
switching power supply driving a constant load actually looks like a negative
resistance to the mains. As the mains
voltage decreases, current increases
to maintain constant load power. Power
factor, however, is concerned with what
happens in one cycle of the line. The
fact that RMS currents increase with
decreasing line voltage when averaged
over many cycles is a separate issue. It
is interesting to note, however, that
this may become a thorn in the side of
power companies as electronic loads
become a higher percentage of total
load. The use of rolling brownouts to
reduce peak load will actually result in
higher mains current.
The LT1248 was designed to handle
power-factor correction for off-line
switching supplies by generating a
380–400V DC output using a simple
boost topology. This DC supply is
then used as a raw input to a conventional switching supply, which isolates
and steps down the voltage to provide
the final load voltages. The chip can
directly drive an external MOSFET at
power levels up to 300W with AC input
voltages varying over the full international range of 90 to 270VAC. The
boost topology was chosen because it
is very efficient and uses a minimum of
parts, and because the inductor acts
as a natural filter to isolate switching
ripple from the AC line. Nevertheless,
the LT1248 is versatile enough to also
implement inverting and flyback topologies with very little change in the
control circuitry.
One way to implement power-factor
correction is to use constant switch
on-time and an inductance low
enough to ensure discontinuous-mode
operation under all load and
input-voltage conditions. If switch
on-time does not vary during one
cycle of the line, the average current
drawn from the line will vary directly
with voltage and will, therefore, look
LINE VOLTAGE
IEC 555-2
CLASS D LIMITS
UNCORRECTED
LINE CURRENT
LINE CURRENT
AFTER POWERFACTOR CORRECTION
CURRENT PULSE
“IN ENVELOPE”
95% OF TIME
resistive. This approach has the disadvantage of very high peak currents,
which lower efficiency, require a larger
switch, and create more EMI.
A second approach forces the inductor
to operate just at the border of discontinuous mode and uses a multiplier to
make peak current track the linevoltage waveform. This method
reduces peak currents but has the
additional disadvantage of variable
frequency.
The LT1248 uses a fixed-frequency
approach that measures actual line
current and forces switch duty cycle
to adjust itself dynamically to make
line current track line voltage. This
technique gives high power factor
with low harmonic distortion and
works independently of continuousor discontinuous-mode operation, so
that peak currents are kept low and
wide variations in load can be easily
accommodated. A multiplier inserted
between the error amplifier and the
PWM logic has line voltage as one
input, forcing current to track voltage.
The circuit in Figure 2 shows the
LT1248 generating a power-factor
corrected 382VDC bus suitable as an
input for a standard, off-line switching
regulator. The line filter replaces the
filter normally used in switching
regulators; it can be simpler and
lower in cost than the normal filter
because of the filtering action of the
boost inductor. A standard bridge
provides full-wave rectified power to
the boost input. Note that no capacitor
is used at the output of the bridge.
A capacitor here would create
harmonic line currents. A boost architecture is created by inductor L1,
diode D1, and switch Q1. The basic
DC equations for a boost circuit are:
VOUT =
1248_1.eps
VIN
(V )(I )
IIN = OUT OUT
1–DC
VIN
(DC = duty cycle)
Figure 1. Typical waveforms for an electronic load
Linear Technology Magazine • June 1993
3
DESIGN FEATURES
If the loop functioned as a normal
boost converter and held the output
voltage constant with a constant load,
input current would be highest at low
input voltage and lowest at high input voltage. This is exactly what we
don’t want—the voltage and current
should track. Remember, however,
that power factor is concerned with
what happens in one cycle of the line,
i.e., whether current tracks voltage
over a 16ms time frame. The fact that
average current (over many cycles)
does not track voltage is irrelevant.
This special boost converter cannot
violate the basic equations shown on
page three for averaged conditions,
but it can force current to track voltage during one line cycle. It does this
by making the response time of the
error amplifier very slow. Over many
line cycles, the error amplifier can
correct the switch drive to keep output voltage constant, but within one
line voltage, while maintaining a constant DC output voltage. First I will
describe the circuit that forces line
current to follow line voltage. A current proportional to line voltage is
generated with R5. This current is
lightly filtered with C4 to remove any
switching ripple and then fed into a
multiplier. The output of the multiplier (IM) is the product of this current
and a second current proportional to
error-amplifier output squared. (The
squaring of error amplifier output
does not affect power-factor correction per se; it is done for loop-stability
considerations—more on this topic
later.) Over one line cycle, the error
amplifier output is assumed to be
steady, so IM is a full-wave rectified
60Hz sine wave with an amplitude
dependent on error-amplifier output.
This rectified sine wave current is fed
through R2 to develop a voltage that
becomes the reference to which line
cycle the multiplier forces line current
to follow line voltage.
One consequence of power-factor
correction is that the current delivered to the output capacitor is
equivalent to full-wave rectified 60Hz
AC, and therefore the capacitor has a
healthy amount of 60Hz ripple on it.
This is the direct result of powerfactor correction and is independent
of the topology used to achieve correction. From a practical standpoint, this
is not usually a problem, but it
does have one important implication:
It is theoretically impossible to combine the power-factor function with
the switching-regulator function to
achieve a power-factor corrected output that does not contain large
amounts of 60Hz ripple.
Loop Description
The basic purpose of the loop is to
sense line current and force it to track
D1
MUR850
L1
750µH
382VDC
+
90VAC LINE
TO
FILTER
270VAC
BRIDGE
+
R5
1M
R1
0.2Ω
C1
180µF
–
R2
4k
C2
100pF
R3
4k
C4
0.01µF
C3
1nF
R4
20k
ISENSE
CUR AMP OUT
–
IAC
IAC
+
CA
PWM
COMP
+
MULT
OUT
GATE
DRIVER
LOGIC
Q1
R6
5Ω
–
+
IM
MULTIPLIER
IM = K(IAC)(IE)2
VCC
OSCILLATOR
7.9V
OVP
COMP
OVP
–
–
IE
EA
7.5V
REFERENCE
R7
1M
GATE
+
VSENSE
R10
20k
R9
20k
R8
20k
C5
0.1µF
REF
C7
0.1
µF
CSET
C6
1nF
RSET
GND
VA OUT
R11
15k
1248_2.eps
Figure 2. 25W–300W power-factor corrected supply schematic
4
Linear Technology Magazine • June 1993
DESIGN FEATURES
CAPACITOR DRIVEN
EXTRA INDUCTOR WINDING
MAIN INDUCTOR
MAIN INDUCTOR
90k
1W
90k
1W
1000pF
VCC
VCC
+
56µF
1µF
18V
1µF
+
+
+
56µF
1248_3.eps
Figure 3. Generating the LT1248’s supply voltage
current is compared. Notice that the
current amplifier CA has its inputs
connected to this reference voltage
and to a second resistor (R3), which is
connected to the opposite side of R1.
If CA operates as a true op amp, it
must somehow force the voltage
across R1 to be equal to the reference
voltage across R2. There is no voltage
drop across R3 other than amplifier
bias current. C2, C3, and R4 are
included to filter switching ripple from
CA’s output.
How does the current amplifier
force line current? Like any standard
PWM loop, comparator C1 compares
a triangle-wave signal from the
oscillator to the CA output to
generate a square wave whose duty
cycle is proportional to CA output.
This signal flows through some logic
to drive a power MOSFET. Line
current will be a function of switch
duty cycle, so the loop is closed and
CA can force the voltage across R1 to
follow the voltage across R2. This
action must have a bandwidth many
times greater than 60Hz to avoid distortion, but much less than the typical
100kHz switching frequency to reject
switching ripple.
The second part of the loop requirement is to maintain a constant
DC output voltage. Voltage is sensed
with the R7/R8 divider and compared
to a 7.5 volt reference by the
error amplifier. Local AC feedback
around the error amplifier, consisting
of R10 and C5, gives the amplifier
very slow response, but over several
cycles of the line it can adjust
the magnitude of the line current reference IM to whatever value is needed
to maintain the output voltage at
Linear Technology Magazine • June 1993
382VDC. The fact that it takes several
cycles of the line to correct for any
load or line variations is important
and necessary. If the amplifier
could respond significantly in one line
cycle, it would create distortion in the
IM reference current with resulting
line-current distortion.
The output of the multiplier is
made proportional to the square of the
error amplifier output to minimize
variations in voltage control-loop
gain. The worst case for loop stability
tends to be at high line voltage with
light loads. The error amplifier output
is low in this condition and the squaring term produces lower loop gain
with improved response.
Chip Start-Up
and Supply Voltage
During normal operation, power
for the LT1248 can be drawn from
an auxiliary winding on the power
inductor or transformer. Start-up,
however, is a problem, because the
auxiliary power is not available until
switching starts. The solution is to
make the IC have a low supply current
until its input voltage reaches
some threshold—say, 16V. Then the
chip turns on to normal operation
and draws normal operating current.
A large supply bypass capacitor holds
the supply voltage up long enough to
allow power from the auxiliary winding to develop. The trickle current
needed to charge the capacitor is
taken from a large resistor connected
to the rectified mains. This is often
referred to as “burp” starting.
In older designs, burp starting required several milliamps of trickle
current. This was annoying because
the resistor had to be about 40kΩ to
ensure start-up at low line voltage,
but at high line voltage, the resistor
had about 250V across it and dissipated almost 2W. The LT1248 has a
start-up current of approximately
250µA, so much lower trickle currents can be used. Supply efficiency is
improved and heat buildup is significantly reduced.
Auxiliary windings on boostconverter inductors do not generate
constant output voltages like those
on flyback transformers. The voltage
across the inductor is equal to the
input voltage in one polarity and is
equal to output voltage minus input
voltage in the opposite polarity. Both
of these signals are unregulated and
vary widely. The solution is to peak
detect both waveforms and sum them.
The result is a voltage proportional to
the regulated output voltage. Figure
3 shows how this is done. The 90k
resistor supplies trickle start-up
current.
Also shown in Figure 3 is a new
technique for IC supply voltage that
eliminates the need for an extra inductor winding. It uses capacitor
charge transfer to generate a constant
current source, which feeds a
zener diode. Current to the zener is
equal to (VOUT – VZ )(C)( ƒ ), where VZ
is the zener voltage and ƒ is the
switching frequency. For VOUT = 382V,
VZ = 18V, C = 1000pF, and ƒ = 100kHz,
zener current will be 36mA. This is
enough to operate the IC, including
the extra current drawn by gate-charge
drive to the FET.
Protection Features
At Linear Technology, we pride
ourselves on making “bustproof”
ICs, so we have included several
features on the LT1248 to handle
potentially destructive conditions,
regardless of their origins. There
is a peak-current-limiting comparator
that overrides the current regulating
loop if, for some reason, the loop attempts to increase switch currents to
destructive levels. This is a backup to
the main current limiting function
continued on page 13
5
DESIGN FEATURES
LTC1174: A High-Efficiency
Buck Converter
by San-Hwa Chee
and Randy Flatness
Introduction
Not long ago, linear regulators were
the choice for low-power applications
and applications where heat dissipation was not a problem. Recently,
with the trend towards portability,
users started to take a hard look at
switching regulators for these applications. The main advantage of
switching regulators over linear regulators is higher efficiency, which
translates to longer battery life.
The LTC1174 is a 8-pin SOIC,
“user-friendly” step-down converter.
(A DIP package is also available.) Only
four external components are needed
to construct a complete, high-efficiency
converter. With no load, it requires
only 130µA of quiescent current;
this decreases to a mere 1µA upon
shutdown. The LTC1174 is protected
against output shorts by an
internal current limit, which is pin
selectable to either 340mA or 600mA.
This current limit also sets the
inductor’s peak current. This allows
the user to optimize the converter’s
efficiency depending upon the output
current requirement.
In dropout conditions, the internal
0.9Ω (at a supply voltage of 9V) power
P-channel MOSFET switch is turned
on continuously (DC), thereby maximizing the life of the battery source.
Figure 1 shows a practical
LTC1174-5 circuit with a minimum
of components. Efficiency curves for
this circuit at two different input
voltages are shown in Figure 2. Note
that the efficiency is 94% at a supply
voltage of 6V and load current of
175mA. This makes the LTC1174
attractive to all power sensitive applications and shows clearly why
switching regulators are gaining
dominance over linear regulators in
battery-powered devices.
If higher output currents are desired, pin 7 (IPGM) can be connected to
VIN. Under this condition, the maximum load current is increased to
450mA. The resulting circuit and efficiency curves are shown in Figures
3 and 4, respectively.
2
7
LBIN SHUTDOWN
LBOUT
VOUT
LTC1174-5
IPGM
GND
4
SW
1
100µH†
+
1N5818
7
LBOUT
VOUT
0.1µF
8
1
100µH†
LTC1174-5
5
IPGM
SW
5V/425mA
+
GND
4
220µF*
10V
1N5818
*SANYO OS-CON
†COILTRONICS CTX100-4
COILTRONICS (305) 781-8900
1174_3.eps
Figure 3. Typical application for higher output
currents
What is
Burst ModeTM Operation?
To maximize efficiency, the
LTC1174 was designed to go into
sleep mode once the output voltage
reaches regulation. When this occurs,
a majority of the internal circuitry
is turned off, reducing the quiescent
current from 0.45mA to 130mA.
Under these conditions, all the
load current is supplied by the
output capacitor. When the output
voltage drops by an amount equivalent to the hysteresis of the comparator,
the LTC1174 wakes up and starts
switching again until the output
reaches regulation. The process then
100
100
95
95
220µF*
10V
75
Figure 1. Typical application for low output
currents
VIN = 9V
85
80
1174_1.eps
VIN = 6V
90
5V/175mA
*SANYO OS-CON
†COILTRONICS CTX100-4
COILTRONICS (305) 781-8900
L = 100µH
VOUT = 5V
IPGM = 0V
90
VIN = 6V
70
VIN = 9V
85
L = 100µH
VOUT = 5V
IPGM = VIN
COILTRONICS = CTX100-4
80
75
70
1
10
100
200
LOAD CURRENT (mA)
1
10
100
500
LOAD CURRENT (mA)
1174_2.eps
1174_4.eps
Figure 2. Efficiency vs. load current
Burst
6
2
LBIN SHUTDOWN
100µF*
20V
0.1µF
8
5
3
EFFICIENCY (%)
VIN
3
100µF*
20V
EFFICIENCY (%)
+
+
6
VIN
Efficiency
+VIN
9V
6
+VIN
9V
(Who says a switcher has to switch?)
In addition to the features already
mentioned, the LTC1174 boasts a
low battery detector. Moreover, the
LTC1174 comes in three versions: the
LTC1174-5 (5V output), the LTC11743.3 (3.3V output), and the LTC1174
(adjustable). All versions function
down to an input voltage of 4V and
work up to an absolute maximum of
13.5V.
Figure 4. Efficiency vs. load current
ModeTM
is a trademark of Linear Technology Corporation
Linear Technology Magazine • June 1993
DESIGN FEATURES
SLEEPING
OFF-TIME 4µs
INDUCTOR CURRENT
BURSTING
AC COUPLED OUTPUT VOLTAGE
TIME
HYSTERESIS OF
VOLTAGE
COMPARATOR
TIME
1174_5.eps
Figure 5. LTC1174 inductor current and output voltage at medium load
Constant Off-Time Architecture
Another technical point to note is
that the LTC1174 uses a constant offtime architecture. This off-time is set
to 4ms when the output is in regulation; otherwise it is inversely proportional to the output voltage. In
the extreme condition, the P-channel
is turned on at a 100% duty cycle to
make the LTC1174 a low-dropout
regulator. The advantage of this
scheme is that the inductor’s ripple
current is predictable and well controlled, making the selection of
inductor much easier. The inductor’s
peak-to-peak ripple current is inversely proportional to the inductance.
With a 50mH inductor and a 5V output voltage, the ripple current is
440mA. If a lower ripple current is
desired, a larger inductor can be used.
The inductance value is governed
by the current requirement of the load.
Linear Technology Magazine • June 1993
The minimum value of L can be determined by the following:
L (Henrys) =
4 × 10–6(VOUT + VD)
2(IPEAK – IOUT)
where IPEAK = 340mA or 600mA, depending on the condition of IPGM and
VD = diode forward drop. As the inductance is increased from this minimum
value, the ripple current decreases.
This also increases the maximum load
current, since the inductor’s peak
current is fixed.
Another consequence of constant
off-time architecture is that the
switching frequency is related to the
input voltage. For an input voltage
range of 6V to 12V, with an output
voltage of 5V, the operating frequency
varies from about 42kHz to 146kHz.
For example, with an input voltage
of 9V, the switching frequency is approximately 110kHz. At this high
operating frequency, a small inductor
value can be used.
100% Duty Cycle
in Dropout Conditions
When the input voltage decreases,
the switching frequency decreases.
With the off-time constant, the ontime is increased to maintain the same
peak-to-peak ripple current in the
inductor. Ultimately, a steady state
condition will be reached where
Kirchoff’s Voltage Law determines the
dropout voltage. When this happens,
the P-channel power MOSFET is
turned on at DC (100% duty cycle).
The dropout voltage is then governed
by the load current multiplied by the
total DC resistance of the MOSFET,
the inductor, and the internal 0.1Ω
current-sense resistance. Figure 6
shows the dropout voltage as a function of output current. Note that for a
load current of 400mA, the dropout
voltage is only 0.51V. This is comparable to what linear regulators can
offer. Unlike linear regulators, where
ground current varies with load current, the LTC1174’s ground current is
a constant 450µA.
550
500
450
DROPOUT VOLTAGE (mV)
repeats. The inductor’s current and
output voltage waveforms (Figure 5)
reveal how the LTC1174 utilizes
Burst ModeTM operation.
As the load current increases, the
time spent in sleep decreases.
Eventually the LTC1174 goes into
continuous-mode operation, never
going to sleep. Any increase in load
current past this point will cause the
output to drop out of regulation.
400
350
300
250
200
L = 100µH
VOUT = 5V
IPGM = VIN
COILTRONICS = CTX100-4
150
100
50
0
0
50
100 150 200 250 300 350 400
LOAD CURRENT (mA)
1174_6.eps
Figure 6. Dropout voltage vs. output current
7
DESIGN FEATURES
AC COUPLED
OUTPUT VOLTAGE
50mV/DIV
INDUCTOR
CURRENT
100mA/DIV
INDUCTOR
CURRENT
0.5A/DIV
OUTPUT
VOLTAGE
1V/DIV
LOAD CURRENT
300mA/DIV
GND
OUTPUT
SHORTED
X = 20µs/DIV
LTC1174 COMING
OUT OF SHORT
1174_8.eps
X = 50µs/DIV
1174_7.eps
Figure 7. Short-circuit and start-up response of the LTC1174
Figure 8. Load transient response
INPUT VOLTAGE
4V - 7.5V
+
0.1µF
VIN
270k
LOW
BATTERY
INDICATOR
7
2
3
IPGM SHUTDOWN
LBOUT
VOUT
LTC1174-5
LBIN
39k
SW
6
VIN
2 X 33µF*
16V
7
8
3
1
5
GND
4
+
* AVX TPSD336K016
† COILTRONICS CTX50-4
COILTRONICS (305) 781-8900
2 X 33µF*
16V
The LTC1174 exhibits excellent
start-up behavior when it is initially
powered-up or recovering from a
short-circuit. This is achieved by making the off-time inversely proportional
to the output voltage when the output
is still in the process of reaching
its regulated value. When the output
is shorted to ground, the off-time is
extended long enough to prevent any
possibility of a build up in the
inductor’s current. When the short is
removed, the output capacitor begins
to charge and the off-time gradually
decreases. Note the absence of overshoot when the LTC1174 comes out
of a short-circuit, as shown in Figure
7. When the output reaches its regulated value, the off-time is fixed at 4µs.
The initial power-up waveform is
similar to Figure 7.
In addition, the LTC1174 has
excellent load-transient response.
When the load current drops sud8
VOUT
VOUT =
–5V/150mA
0.1µF
1
50µH†
+
GND
4
1N5818
VOUT =
3.3V/450mA
2 X 33µF**
16V
* (3) AVX TPSD156K025
** (2) AVX TPSD336K016
†
COILTRONICS CTX50-4
COILTRONICS (305) 781-8900
1174_9.eps
Figure 9. Positive to –5V converter with low-battery detection
Good Start-Up
and Transient Behavior
LBIN
INPUT VOLTAGE
4V - 12.5V
3 X 15µF*
25V
8
LTC1174-3.3
5
2
LBOUT
SW
50µH†
1N5818
IPGM SHUTDOWN
1174_10.eps
Figure 10. 5V to 3.3V output application
denly, the feedback loop responds
quickly by turning off the internal
P-channel switch. Sudden increases
in output current will be met initially
by the output capacitor, causing the
output voltage to drop slightly. As
mentioned above, tight control of
inductor’s current means that output-voltage overshoot is virtually
eliminated (see Figure 8).
A 5V to 3.3V Converter
The LTC1174-3.3 is ideal for applications that require 3.3V at less than
450mA. A minimum board area,
surface mount 3.3V regulator is shown
in Figure 10. Figure 11 shows that
this circuit can achieve efficiency
greater than 85% for load currents
between 5mA and 450mA.
Typical Applications
100
Positive-to-Negative Converter
The LTC1174 can easily be set up
for a negative output voltage. The
LTC1174-5 is ideal for –5V outputs,
as this configuration requires the
fewest components. Figure 9 shows
the schematic for this application
with low-battery detection capability.
The LED will turn on at input voltages
below 4.9V. The efficiency of this circuit is 81% at an input voltage of 5V
and output current of 150mA.
90
VIN = 5V
EFFICIENCY (%)
+
6
4.7k
+
80
70
L = 50µH
VOUT = 3.3V
IPGM = VIN
COILTRONICS = CTX50-4
60
50
1
10
100
500
LOAD CURRENT (mA)
1174_11.eps
Figure 11. Efficiency vs. load current
Linear Technology Magazine • June 1993
DESIGN FEATURES
The New SO8 LTC1147
Switching-Regulator Controller Offers
High Efficiency in a Small Footprint
by Randy Flatness
Introduction
100
LTC1147-5
EFFICIENCY (%)
95
90
VIN = 6V
VIN = 10V
85
80
75
70
1mA
10mA
100mA
LOAD CURRENT (A)
1A
1147_1.eps
Figure 1. Greater than 90% efficiency is obtained
for load currents of 20mA to 2A (VIN = 10V)
Linear Technology Magazine • June 1993
+V
IN
+
0.1µF
(4V-12V)
CIN
15µF x 2
25V
1
0V = NORMAL
>1.5V = SHUTDOWN
VIN
6
SHUTDOWN PDRIVE
8
P-CH
Si943ODY
LTC1147-3.3
3
ITH
SENSE +
CT
SENSE –
RSENSE
100mΩ
VOUT
3.3V/1A
L
100µH
5
1000pF
RC
1k
2
4
+
GND
CC
3300pF
CT
560pF
D1
MBRD330
7
COUT
220µF
6.3V
RS = KRL SP-1/2-A1-0R100
L = COILTRONICS CTX100-4
COILTRONICS (305) 781-8900
KRL/BANTRY (603) 668-3210
1147_2.eps
Figure 2. This LTC1147 5V to 3.3V converter achieves 92% efficiency at 300mA load current
High Efficiency in a Small Area
The 8-pin SOIC package and a few
external components make high efficiency DC-to-DC conversion feasible
in the extremely small board space
available in today’s portable electronics. (A DIP package is also available.)
An ideal application for the LTC1147
is dropping 5V to 3.3V locally on a PC
board. If a linear regulator with a
1 amp output current is used, the
power dissipation will exceed 1.7 Watts.
This is unacceptable when there is no
way to remove the heat from an enclosed space. The LTC1147 5V to 3.3V
converter shown in Figure 2 has 85%
efficiency at 1A output, with efficiencies greater than 90% for load currents
up to 500mA. Using the LTC1147
reduces the power dissipation to less
than 500mW. The efficiency plotted as
a function of output current is shown
in Figure 3.
Giving Up the
Synchronous Switch
The decision whether to use a nonsynchronous LTC1147 design or a
fully synchronous LTC1148 design
requires a careful analysis of where
losses occur. The LTC1147 switchingregulator controller uses the same
100
LTC1147-3.3
90
EFFICIENCY (%)
The LTC1147 switching-regulator
controller is the latest addition to
Linear Technology’s high efficiency,
step-down DC/DC converter family.
This 8-pin controller uses the same
current-mode architecture and Burst
ModeΤΜ operation as the LTC1148/
LTC1149 but without the synchronous switch. Ideal for applications
requiring up to 1 amp, the LTC1147
shows 90% efficiencies over two decades of output current.
The LTC1147, like the other members of the LTC1148/LTC1149 family,
automatically changes from currentmode operation at high output
currents to Burst ModeΤΜ operation
at low output currents. The wide
operating range is illustrated by the
typical efficiency curve of Figure 1. All
members of the LTC1147/LTC1148/
LTC1149 family are capable of operation at 100% duty cycle, providing
very low dropout operation, and all
have built-in current limiting.
Load and line regulation are excellent
for a wide variety of conditions,
including the transition from Burst
ModeΤΜ operation to continuous mode
operation.
VIN = 5V
80
70
60
1mA
10mA
100mA
LOAD CURRENT (A)
1A
1147_3.eps
Figure 3. The LTC1147 5V to 3.3V converter
provides better than 90% efficiency from
20mA to 500mA of output current
9
DESIGN FEATURES
I 2R
EFFICIENCY/LOSS ( %)
GATE CHARGE
95
LTC1147 I Q
SCHOTTKY DIODE
90
85
80
10mA
30mA
0.1A
0.3A
IOUT (A)
1A
3A
1147_4.eps
Figure 4. Low current efficiency is enhanced
by Burst ModeTM operation. Schottky diode
loss dominates at high output currents
the Schottky diode conducts most of
the time. In this situation, any loss in
the diode will have a more significant
effect on efficiency and an LTC1148
might therefore be chosen.
Figure 5 compares the efficiencies
of LTC1147-5 and LTC1148-5 circuits with the same inductor, timing
capacitor, and P-channel MOSFET.
At low input voltages and 1A output
current, the efficiency of the LTC1147
differs from that of the 1148 by less
than two percent. At lower output
currents and high input voltages, the
LTC1147’s efficiency can actually
exceed that of the LTC1148.
100
LTC1147-5
LTC1148-5
90
EFFICIENCY (%)
100
10
80
ILOAD = 100mA
70
60
6
4
12
8
10
INPUT VOLTAGE (V)
14
1147_5.eps
Figure 5. At high input voltages combined
with low output currents, the efficiency of
the LTC1147 exceeds that of the LTC1148
Ideal for Low
loss-reducing techniques as the other Dropout Applications
members of the LTC1148/LTC1149
family. The non-synchronous design
saves the N-channel MOSFET gatedrive current at the expense of
increased loss due to the Schottky
diode.
Figure 4 shows how the losses in a
typical LTC1147 application are apportioned. The gate-charge loss
(P-channel MOSFET) is responsible
for the majority of the efficiency lost in
the mid-current region. If Burst
ModeΤΜ operation was not employed,
the gate-charge loss alone would cause
the efficiency to drop to unacceptable
levels at low output currents. With
Burst ModeΤΜ operation, the DC supply current represents the only loss
component that increases almost linearly as output current is reduced. As
expected, the I2R loss and Schottkydiode loss dominate at high load
currents.
In addition to board space, output
current and input voltage are the two
primary variables to consider when
deciding whether to use the LTC1147.
At low input-to-output voltage ratios,
the top P-channel switch is on most
of the time, leaving the Schottky
diode conducting only a small
percentage of the total period. Hence,
the power lost in the Schottky diode
is small at low output currents. This
is the ideal application for the
LTC1147. As the output current increases, the diode loss increases. At
high input-to-output voltage ratios,
ILOAD = 1A
MOSFET is on at DC or at a 100% duty
cycle.
With the switch turned on at a
100% duty cycle, the dropout is limited by the load current multiplied by
the sum of the resistances of the
MOSFET, the current shunt, and the
inductor. For example, the low dropout 5V regulator shown in Figure 6
has a total resistance of less than
200mΩ. This gives it a dropout voltage
of 200mV at 1A output current.
At input voltages below dropout the
output voltage follows the input. This
is the circuit whose efficiency is plotted in Figure 1.
Because the LTC1147 is so well
suited for low input-to-output voltage
ratio applications, it is an ideal
choice for low dropout designs. All
members of the LTC1148/LTC1149
family (including the LTC1147) have
outstandingly low dropout performance. As the input voltage on the
LTC1147 drops, the feedback loop
extends the on-time for the P-channel
switch (off-time is constant)
thereby keeping the inductor ripple
current constant. Eventually the ontime extends so far that the P-channel
continued on page 13
+V
IN
+
0.1µF
(5.5V-12V)
CIN
15µF x 3
25V
1
0V = NORMAL
>1.5V = SHUTDOWN
VIN
6
SHUTDOWN PDRIVE
8
LTC1147-5
3
ITH
SENSE +
CT
SENSE –
5
P-CH
Si943ODY
RSENSE
50mΩ
VOUT
5V/2A
L
62µH
1000pF
RC
1k
2
GND
CC
3300pF
CT
470pF
RS = KRL SL-1-C1-0R050J
L = COILTRONICS CTX100-4
COILTRONICS (305) 781-8900
KRL/BANTRY (603) 668-3210
7
4
+
D1
MBRD330
COUT
220µF x 2
10V
1147_6.eps
Figure 6. The LTC1147 architecture provides inherent low dropout operation. This LTC1147-5
circuit supports a 1A load with the input voltage only 200mV above the output.
Linear Technology Magazine • June 1993
DESIGN FEATURES
12
10
RF = 1.2k
COMPENSATION
VOLTAGE GAIN (dB)
8
+
eIN
75Ω CABLE
75Ω
LT1206
6
75Ω
4
2
–
RF
0
–2
RG
RF = 2k
COMPENSATION
–4
–6
75Ω
RF = RG = 560
VS = ±15V
1206_4.eps
Figure 4. LT1206 distribution amplifier
–8
1
75Ω
75Ω
RF = 2k
NO COMPENSATION
10
FREQUENCY (MHz)
100
1206_2.eps
Figure 2. Frequency response, AV = +2, CL =
200pF
LT1206, continued from page 1
network. This network has the effect
of smoothing the output peaking so
that, with the correct feedback resistor, the overall response is flat. Figure
2 shows the effect of the optional
compensation network on frequency
response with CL = 200pF. Using a
1.2kΩ feedback resistor and the compensation, the overall response is flat
within 0.35dB to 30MHz.
Although the optional compensation works well with capacitive loads,
it simply reduces the bandwidth when
it is connected with resistive loads.
For instance, with a 30Ω load, the
bandwidth drops from 55MHz to
35MHz when the compensation is
connected. Hence, the compensation
was made optional.
Although the small signal response
with a capacitive load depends on the
feedback components and the optional
compensation network, the large
signal response is limited by the
maximum output current. In the
fastest configuration, the LT1206 is
capable of a slew rate of 1V/ns. The
current required to slew a capacitor
at this rate is 1mA per picofarad of
capacitance, so a 10,000pF cap would
require 10A. The large signal behavior
with CL = 10,000pF is shown in
Figure 3. The slew rate is about
40V/µs, determined by the current
limit of 400mA.
Buffers and Cable Drivers
The combination of a 60MHz
bandwidth, 250mA output-current
capability, and low output impedance
make the LT1206 ideal for driving
multiple video cables. One concern
when driving multiple transmission
lines is the effect of an unterminated
(open) line on the other outputs. Since
the unterminated line creates a reflected wave that is incident on the
output of the driver, a non-zero amplifier output impedance will result in
crosstalk to the other lines. Figure 4
shows the LT1206 connected as a
distribution amplifier. Each line is
separately terminated to minimize
the effect of reflections. For systems
using composite video, the differential
gain and phase performance are
also important and have been considered in the internal design of the
device. The differential phase and
differential gain performance versus
supply is shown in Figures 5 and 6
for 1, 3, 5, and 10 cables. Figure 7
shows the output impedance versus
frequency. Note that at 5MHz the
output impedance is only 0.6Ω.
Although the wide bandwidth and
high output drive capabilities of the
LT1206 make it a natural for video
circuits, these characteristics are also
useful for audio applications. Figure
8 shows the LT1206 combined with
the LT1115 low-noise amplifier to
form a very low-noise, low-distortion
audio buffer with a gain of 10. With a
32Ω load and a 5Vrms output level
(780mW), the THD+noise for the circuit is 0.0009% at 1kHz, rising to
0.004% at 20kHz. The frequency
response is flat to 0.1dB from DC
to 600kHz, with a –3dB bandwidth
of 4MHz. The circuit is stable with
capacitive loads of 250pF or less.
0.10
RF = RG = 560Ω
N PACKAGE
RL = 15Ω (10 CABLES)
0.40
0.08
DIFFERENTIAL GAIN (%)
DIFFERENTIAL PHASE (DEG)
0.50
RF = RG = 560Ω
N PACKAGE
0.30
RL = 30Ω (5 CABLES)
0.20
RL = 50Ω (3 CABLES)
0.10
RL = 15Ω
(10 CABLES)
0.06
RL = 30Ω (5 CABLES)
RL = 50Ω
(3 CABLES)
0.04
0.02
RL = 150Ω (1 CABLE)
RL = 150Ω (1 CABLE)
0.00
5
AV = +2, RF = RG = 3k, VS = ±15V, CL = 0.01µF
7
9
11
13
SUPPLY VOLTAGE (±V)
15
1206_5.eps
1206_3.eps
Figure 3. LT1206 large signal response
Linear Technology Magazine • June 1993
Figure 5. Differential phase vs. supply voltage
0.00
5
7
9
11
13
SUPPLY VOLTAGE (±V)
15
1206_6.eps
Figure 6. Differential gain vs. supply voltage
11
DESIGN FEATURES
1
0.1
1M
10
FREQUENCY (Hz)
100
1206_7.eps
Figure 7. Output impedance vs. frequency
Circuit Description
The LT1206 uses a currentfeedback topology and LTC’s complementary bipolar process to obtain
excellent speed and power gain with
simple circuitry. Since both the NPNs
and PNPs are fast devices, both are
used in the signal path. Figure 9
shows a simplified schematic. The
input stage consists of devices Q1–
Q4. Devices Q5–Q8 form very fast
current mirrors. The output stage
consists of complementary emitter
followers Q9 and Q12, followed by
complementary Darlington followers
Q10–Q11 and Q13–Q14. Diodes D1
and D2 act as level shifts, providing
the proper AB bias levels for the
TO ALL
CURRENT
SOURCES
Q5
Q2
Q18
Q17
D1
1.25k
+IN
CC
–IN
50Ω
V–
COMP
RC
OUTPUT
V
SHUTDOWN
V
+
+
Q12
Q3
Q16
Q8
Q14
D2
Q4
1µF
+
+
LT1115
–
LT1206
1µF
0.01
–
–15V
1µF
68pF
560
–15V
560
909
100
1206_8.eps
Figure 8. Low noise × 10 buffered line driver
that flows in the shutdown pin. For
example, to set the supply current to
10mA on ±5V supplies, use a 12kΩ
resistor.
Performance
Table 1 summarizes the major performance specifications of the LT1206
on ±5V and ±15V supplies.
Conclusions
The LT1206 combines high output
current with wide bandwidth to form
an effective solution for driving lowimpedance loads. Stability problems
with capacitive loading have been
solved by a novel compensation
scheme. Package options range from
the surface mount SO8 to the 7-pin
TO220.
Table 1. LT1206 Performance
Q9
V–
+15V
Q11
Q15
Q6
Q1
1µF
+
0.01
100k
+15V
+
10
output devices Q11 and Q14. The
optional compensation network
INPUT
for capacitive loads consists of CC
and RC. When the COMP pin is left
open, devices Q15 and Q16 act as
a bootstrap, preventing the compensation network from loading
the output of the current mirrors.
When used, a bypass capacitor
(0.01µF) AC shorts the COMP pin
to the OUTPUT pin. A DC short
cannot be used because of the
large currents that would flow in
the COMP pin during an output
short circuit.
The shutdown pin provides a
dual function; first, it can be used
to turn off the biasing for the
amplifier, reducing the quiescent
current to less than 100µA, and
second, it can be used to control
the quiescent current in normal
operation. All of the biasing for the
LT1206 is derived from the collector
current of Q18, which results in the
supply current being proportional to
the shutdown pin current. With the
shutdown pin grounded, Q17 limits
Q18 current to about 500µA, resulting in a supply current of approximately 20mA. Supply current can be
reduced by putting a resistor from the
shutdown pin to ground. The voltage
across the resistor
is then V S –3Vbe.
V+
The supply current
is approximately 40
times the current
Q10
+
VS = ±15V
RF = RG = 560Ω
N PACKAGE
+
OUTPUT IMPEDANCE (Ω)
100
Q7
Q13
V–
1206_9.eps
Parameter
Bandwidth
Bandwidth
Bandwidth
Slew rate
Slew rate
Slew rate
Minimum output current
Maximum input
offset voltage
Maximum inverting
input current
Nominal supply
current
Conditions
AV = +2, RL = 50
AV = +2, RL = 30
AV = +2, RL = 10
AV = –1, RL = 100
AV = –1, RL = 50
AV = +2, RL = 50
VS = ±5V
45MHz
40MHz
30MHz
500V/µs
450V/µs
300V/µs
250mA
VS = ±15V
60MHz
55MHz
38MHz
1000V/µs
700V/µs
600V/µs
250mA
10mV
10mV
60µA
60µA
18mA
20mA
Figure 9. Simplified schematic
12
Linear Technology Magazine • June 1993
DESIGN FEATURES
Power Factor, continued from page 5
Additional Features
provided by a current clamp on the
IM output.
To guard against output over
voltage conditions, an over-voltagecomparator monitors DC output voltage and immediately stops switching
action if the output voltage rises more
than 10% above its intended value.
Over-voltage is a real possibility with
power-factor designs because of the
slow error amplifier response time.
Remember that power delivered to
the output increases as the square of
input voltage for frequencies above
the bandpass of the control loop
(20Hz). A sudden load shedding coincident with increased line voltage can
create a situation where the error
amplifier cannot reduce current
quickly enough to prevent overshoot
at the output. The over-voltage comparator provides an extra level of
protection against such unforeseen
conditions.
An internal gate clamp limits gate
drive if the supply voltage climbs
above 16V, ensuring reliable MOSFET
operation during extended periods of
high chip supply voltage.
The enable/sync pin does double
duty as an on/off input and as a
synchronizing port. The threshold for
shutdown is 2.5V, and that for sync
is 5.5V, so the two functions can be
made non-interactive. The LT1248 is
sometimes synchronized to the main
switcher or to a system clock to prevent beat frequencies or to eliminate
specific time-slot noise spikes.
The SS pin acts as clamp on the
reference input to the error amplifier
during startup. By connecting a capacitor to SS, the output can be
programmed to ramp up in a controlled fashion.
Performance
more concerned with harmonic
content than power factor, so a welldesigned power-factor corrector must
perform well in both areas.
The LT1248 fits in 16-pin, narrowbody, dual-in-line and surface mount
packages. It uses a high-frequency IC
process to achieve fast switching with
only 8mA supply current. Switching
frequency can extend up to 300kHz.
A flexible topology, low external parts
count, and the ability to handle both
low- and high-power applications
make this new IC attractive for a wide
variety of applications. An 8-pin version with frequency set internally at
100kHz (LT1249) will also be available.
100%
Figure 4 shows the performance of
the LT1248 both in terms of power
factor and harmonic distortion. Power
factor remains above 99.5% over a
ten-to-one load-current range. This
allows the supply to be used in “green”
applications, where it will be used in
both full-power and low-power modes.
Harmonic distortion also remains low
over a wide load range, even when
measured past the 20th harmonic.
Agency guidelines may actually be
99%
98%
REGION OF
CONTINUOUS
OPERATION
TRANSITION
BOUNDARY
97%
SET BY
INDUCTOR
VALUE
96%
95%
0
20
40
80
60
LOAD CURRENT (%)
100
1248_4.eps
Figure 4. Power factor vs. load current
LTC1147, continued from page
10
High Efficiency
Step-Down Regulator Family
Table 1 shows the members of the
LTC1147/LTC1148/LTC1149 family
and several of their applications. The
LTC1147 is available in both fixed
3.3V and fixed 5V versions and is
available in both 8-pin DIP and 8-pin
SOIC surface mount packages. For
other output voltages, the LTC1148
adjustable is suggested. (If the synchronous switch is not needed in a
low current application, the N-channel MOSFET can be eliminated and a
Schottky catch diode can be used.)
Conclusion
The LTC1147 adds even more versatility to Linear Technology’s family
of high efficiency step-down regulator controllers. Optimized for low
current applications, the LTC1147
saves board space and cost over synchronous designs with only a small
reduction in efficiency. The high performance of this controller is ideal for
extending the battery life of the newest portable electronics.
Table 1. LTC1147/LTC1148/LTC1149 family applications
Continuous input
voltage ≤ 48V
Continuous input
voltage ≤ 13.5V
Low dropout 5V
Adjustable/
multiple output
5V to 3.3V
Minimum board area
LTC1147-3.3
LTC1147-5
LTC1148-3.3
LTC1148-5
LTC1148
✔
✔
✔
✔
✔
✔
✔
LTC1149-3.3
✔
LTC1149-5
✔
LTC1149
✔
✔
✔
✔
✔
Linear Technology Magazine • June 1993
✔
✔
13
DESIGN INFORMATION
FEATURES
Ultra-Low-Power CMOS RS232
Transceiver Achieves 10kV ESD
Protection, Eliminates Latch-Up
The LTC1337 is an ultra-low-power
RS232 transceiver with supply current up to 20 times lower than other
CMOS devices. Using proven
technology borrowed from LTC’s lowpower RS485 products, the LTC1337
achieves ultra-low power consumption without sacrificing ESD
protection and latch-up immunity.
The single 5 volt, three-driver/fivereceiver RS232 transceiver draws only
300µA of supply current in the noload condition and 1µA in the
shutdown mode. The charge pump
requires only four 0.1µF capacitors
and can supply up to 12mA of extra
current to power external circuitry.
The transceiver can operate up to
120k baud with a 1000pF cap in
parallel with a 3kΩ load, and both
driver outputs and receiver inputs
can be forced to ±25V and withstand
multiple 10kV ESD strikes.
V+
BIAS
N1
N1
V–
Q4
N-CHANNEL
SOURCES
1337_2.eps
V–
Figure 2. Simplified LTC1337 driver output stage and parasitic devices
below V–, the parasitic P+/N-well/
P-substrate PNP or the N+/
P-substrate/N-well NPN (Q1, or Q2,
respectively) will turn on.
The collector current of Q1 or Q2
will then turn on the SCR structure
formed by R1, R2, Q3, and Q4. The
SCR structure forms a short-circuit
path between V+ and V–, and remains
on even though the output is
brought back within the supply rails
(i.e., Q1 or Q2 turns off). This will
cause the charge pump to collapse
and excessive current to flow. The
latch-up state can only be stopped by
turning off the power.
By incorporating Schottky diodes
into the output stage of the LTC1337
P-CHANNEL
SOURCES
Q1
Q3
R1
N-WELL
OUTPUT
N1
N1
Q2
R2
P-SUBSTRATE
INPUT
V–
Q4
N-CHANNEL
SOURCES
1337_1.eps
Figure 1. Conventional CMOS output stage and parasitic devices
14
Q2
R2
P-SUBSTRATE
INPUT
OUTPUT
V–
OUTPUT
C1
N2
N3
R1
N-WELL
D2
N3
P1
C1
Q3
OUTPUT
P2
BIAS
Q1
D2
N2
V+
P1
P-CHANNEL
SOURCES
P1
The main sources of latch-up in
CMOS RS232 transceivers have been
eliminated by incorporating circuit
techniques borrowed from the LTC485
family. Latch-up can occur in conventional CMOS output stages when
the output of the driver is forced
beyond the supply rails. If the output
of the traditional CMOS output stage
of Figure 1 is driven above V+ or
BIAS
D1
D1
P1
Latch-Up Eliminated
V+
V+
P2
BIAS
by Ricky Chow
and
Robert Reay
driver (simplified in Figure 2), the
triggering source of the latch-up is
eliminated. When the output is forced
above V+ or below V–, Schottky diode
D1 or D2 will reverse bias and prevent
current flow. By preventing Q1 or Q2
from turning on, the trigger source of
latch-up is eliminated.
ESD Protection
ESD protection is provided by a
specialized ESD protection circuit connected to the receiver inputs and driver
outputs (Figure 3). The protection
cell is designed to turn on and
absorb the ESD pulse energy, but to
remain off during normal operation.
Figure 4 shows the I-V curve of the
ESD protection cell.
When the voltage reaches about
23V with respect to ground, the ESD
cell starts to turn on; when it reaches
about 28V the cell snaps back and
conducts a large amount of current
while limiting the voltage to 5V. During an ESD pulse, the ESD cell turns
on and clamps the pin at 5V until all
of the energy has been dissipated,
then returns to its off state. With the
voltage clamped at 5V, the power
dissipation is kept to a minimum and
continued on page 16
Linear Technology Magazine • June 1993
DESIGN
DESIGN
FEATURES
IDEAS
Switching Regulator Provides
Constant 5V Output from 3.5 – 40V Input,
without a Transformer
by Brian Huffman
A common switching-regulator requirement is to produce a constant
output voltage from an input voltage
that varies above or below the output
voltage. This is particularly important
for extending battery life in
battery-powered applications. Figure
1 shows how an LT1171 switching
regulator IC, two inductors, and a
“flying” capacitor can generate a
constant output voltage that is independent of input voltage variations.
This is accomplished without the use
of a transformer. Inductors are preferred over transformers because they
are readily available and more
economical.
The circuit in Figure 1 uses the
LT1171 to control the output voltage.
A fully self-contained switching
DESIGN IDEAS
Switching Regulator Provides Constant 5V Output
from 3.5–40V Input, without
a Transformer ................ 15
5
VSW
+
VIN
(3.5V-40V)
C1
56µF
50V
4
+
FB
3
2
C3
470µF
16V
VC
1
R3
1.00k
1%
R1
1k
Milt Wilcox
R2
3.01k
1%
LT1171
GND
High-Current Synchronous
Switcher Converts 5V to
3.3V at 90% Efficiency ... 23
C4
1µF
Protected Bias for
GaAs Power Amplifiers ... 24
High-Current,
Synchronous, Step-Down
Switching Regulator ...... 25
VOUT
+5V
0.5A
L2
50µH
VIN
Frank Cox
Mitchell Lee
D1
MBR350
+
Optimizing A VideoGain-Control Stage
Using the LT1228 ........... 17
Jim Williams, Richard Markell,
and Bent Hessen-Schmidt
C2
150µF
50V
L1
50µH
Brian Huffman
Noise Generators
for Multiple Uses ............ 20
The waveforms are virtually identical
because the inductors have identical
inductance values and the same voltages are applied across them. The
current flowing through inductor L1 is
not only delivered to the load, but is
also used to charge C2. C2 is charged
to a potential equal to the input voltage.
When the LT1171 power switch
turns on, the VSW pin is pulled to
ground and the input voltage is
applied across the inductor L1. At the
same time, capacitor C2 is connected
across inductor L2. Current flows
from the input-voltage source through
inductor L1 and into the LT1171.
Trace C shows the voltage at the VSW
pin, and Trace D is the current flowing
through the power switch. The
catch diode (D1) is reversed biased,
and capacitor C2’s current also flows
through the switch, through ground,
and into inductor L2. During this
regulator IC, the LT1171 contains a
power switch as well as the control
circuitry (pulse-width modulator,
oscillator, reference voltage, error
amplifier, and protection circuitry).
The power switch is an NPN transistor
in a common-emitter configuration;
consequently, when the switch turns
on, the LT1171’s VSW pin is connected to
ground. This power switch can handle
peak switch currents of up to 2.5A.
Figure 2 shows the operating waveforms for the circuit. In this
architecture, the capacitor C2 serves
as the single energy transfer device
between the input voltage and output
voltage of the circuit. While the LT1171
power switch is off, diode D1 is forward
biased, providing a path for the currents from inductors L1 and L2. Trace
A shows inductor L1’s current waveform and trace B is L2’s current waveform. Observe that the inductor current
waveforms occur on top of a DC level.
EQ. 1: VOUT = 1.25V (1 + R2/R3)
C1 = NICHICON (AL) UPL1H560MEH, ESR = 0.250Ω, IRMS = 360mA
C2 = NICHICON (AL) UPL1H151MPH, ESR = 0.100Ω, IRMS = 820mA
C3 = NICHICON (AL) UPL1C471MPH, ESR = 0.090Ω, IRMS = 770mA
L1, L2 = COILTRONICS CTX50-4, DCR = 0.090Ω,
COILTRONICS (305) 781-8900
1171_1.eps
Brian Huffman
Figure 1. LT1171 provides constant +5V output from 3.5V to 40V input. No transformer is required
Linear Technology Magazine • June 1993
15
DESIGN IDEAS
FEATURES
interval, C2 transfers its stored energy
into inductor L2. After the switch
turns off, the cycle is repeated.
Another advantage of this circuit is
that it draws its input current in a
triangular waveshape (see Trace A in
Figure 2). The current waveshape of
the input capacitor is identical to the
current waveshape of inductor L1,
except that the capacitor’s current
has no DC component. This type of
ripple injects only a modest amount
of noise into the input lines because
the ripple does not contain any sharp
edges.
Figure 3 shows the efficiency of this
circuit for a 0.5A load and maximum
output current for various input
voltages. The two main loss elements
are the output diode (D1) and the
LT1171 power switch. A Schottky
diode is chosen for its low forward
voltage drop; it introduces a 10%
loss, which is relatively constant with
input-voltage variations. At low input
voltages the efficiency drops because
the LT1171 power switch’s saturation
voltage becomes a higher percentage
of the available input supply.
This circuit can deliver an output
current of 0.5A at a 3.5V input
voltage. This rises to 1A as input
voltage is increased. Above 20V,
higher output currents can be
achieved by increasing the values of
inductors L1 and L2. Larger inductances store more energy, providing
additional current to the load. If 0.5A
of output current is insufficient, use a
higher current part, such as the
LT1170.
The output voltage is controlled by
the LT1171 internal error amplifier.
This error amplifier compares a fraction of the output voltage, via the
R1–R2 divider network shown in Figure 1, with an internal 1.25V reference
voltage, and varies the duty cycle
until the two values are equal. (The
duty cycle is determined by multiplying the switch-on time by the
switching frequency.) The RC network
(R1 and C4 in Figure 1) connected to
the VC pin provides sufficient compensation to stabilize this control loop.
Equation 1 (on the schematic) can be
used to determine the output voltage.
80
1.2
75
1.0
A = 1A/DIV
IL1, IC1
EFFICIENCY
IOUT (MAX) (A)
C = 10V/DIV
VSW
D = 1A/DIV
ISW
IOUT (MAX)
0.8
70
0.6
65
0.4
60
0.2
55
0.0
0
5
10
15 20 25 30
INPUT VOLTAGE (V)
5µs/DIV
35
EFFICIENCY (%)
B = 1A/DIV
IL2
50
40
1171_3.eps
1171_2.eps
Figure 3. Efficiency and load characteristics for
various input voltages
Figure 2. LT1171 switching waveforms
LTC1337, continued from page 14
V+
P1
R1
150Ω
N2
BIAS
OUTPUT
C1
N3
BIAS
ESD
CELL
N1
R1
8kΩ
V–
CURRENT (mA)
P2
BIAS
0
INPUT
INPUT
ESD
CELL
R2
10kΩ
R2
1kΩ
–30
1337_3.eps
V–
–20
–10
0
10
VOLTAGE (V)
20
30
1337_4.EPS
Figure 3. LTC1337 ESD protection
the CMOS devices are kept below the
oxide-rupture voltage. To provide
further protection, the receiver input
goes through a 9-to-1 resistive
16
Figure 4. ESD protection cell IV curve
divider before going to any CMOS
devices. The ESD cell provides
protection against over 10kV of
human-body-model ESD strikes.
Linear Technology Magazine • June 1993
DESIGN
DESIGN
FEATURES
IDEAS
Optimizing A Video-Gain-Control
Stage Using the LT1228
by Frank Cox
Video automatic-gain-control (AGC)
systems require a voltage- or
current-controlled gain element. The
performance of this gain-control element is often a limiting factor in the
overall performance of the AGC loop.
The gain element is subject to several,
often conflicting restraints. This is
especially true of AGC for composite
color video systems, such as NTSC,
which have exacting phase- and gaindistortion requirements. To preserve
the best possible signal-to-noise ratio
(S/N),1 it is desirable for the input
signal level to be as large as practical.
Obviously, the larger the input signal,
the less the S/N will be degraded
by the noise contribution of the gaincontrol stage. On the other hand, the
gain-control element is subject to
dynamic-range constraints, and exceeding these will result in rising
levels of distortion.
Linear Technology makes a
high-speed transconductance (gm) amplifier, the LT1228, which can be used
as a quality, inexpensive gaincontrol element in color video and
some lower-frequency RF applications. Extracting the optimum
performance from video AGC systems
takes careful attention to circuit
details.
As an example of this optimization,
consider the typical gain-control
circuit using the LT1228 shown in
Figure 1. The input is NTSC composite
video, which can cover a 10dB range,
Extracting the optimum
performance from video
AGC systems takes careful
attention to circuit details
from 0.56 volt to 1.8 volt. The out-put
is to be 1 volt peak-to-peak
into 75 ohms. Amplitudes were measured from peak negative chroma to
peak positive chroma on an NTSC
modulated ramp test signal (see
sidebar).
Notice that the signal is attenuated 20:1 by the 75 ohm attenuator
at the input of the LT1228, so the
voltage on the input (pin 3) ranges
from 0.028 to 0.090 volt. This is done
750
82.5
BIAS
GENERATOR
3750
TEKTRONIX
TSG 120
8
2
LT1228
75
20:1
6
1
gm
3
75Ω
ATTENUATOR
–
–
37.5
VARIABLE
ATTENUATOR
+
5
75
to limit distortion in the transconductance stage. The gain of this circuit is
controlled by the current into the ISET
terminal, pin 5 of the IC. In a closedloop AGC system the loop-control circuitry generates this current by
comparing the output of a detector2 to
a reference voltage, integrating the
difference and then converting to a
suitable current. The measured performance for this circuit is presented
in Table 1.
All video measurements were taken
with a Tektronix 1780R videomeasurement set, using test signals
generated by a Tektronix TSG 120.
The standard criteria for characterizing NTSC video color distortion are
the differential gain and the differential phase. For a brief explanation of
these tests see the sidebar “Differential Gain and Phase.” For this design
exercise the distortion limits were set
at a somewhat arbitrary 3% for differential gain and 3° for differential phase.
Depending on conditions, this should
be barely visible on a video monitor.
Figures 2 and 3 plot the measured
differential gain and phase, respectively, against the input signal level
+
75
TEKTRONIX
1780R VIDEO
MEASUREMENT
SET
75
365
RSET
1228_1.eps
2k
VARIABLE ISET
GENERATOR
Figure 1. Schematic diagram
Linear Technology Magazine • June 1993
17
DESIGN IDEAS
FEATURES
(the curves labeled “A” show the
uncorrected data from Table 1). The
plots show that increasing the input
signal level beyond 0.06 volt results in
a rapid increase in the gain distortion, but comparatively little change
in the phase distortion. Further attenuating the input signal (and
consequently increasing the set current) would improve the differential
gain performance but degrade the
S/N. What this circuit needs is a
good tweak!
Optimizing for
Differential Gain
Referring to the small signal
transconductance versus DC input
voltage graph (Figure 4), observe that
the transconductance of the amplifier
is linear over a region centered
around zero volts.3 The 25°C gm curve
starts to become quite nonlinear above
0.050 volt. This explains why the differential gain (see Figure 2, curve A)
degrades so quickly with signals above
this level. Most RF signals do not have
DC bias levels, but the composite video
signal is mostly unipolar.
Video is usually clamped at some
DC level to allow easy processing of
sync information. The sync tip, the
chroma reference burst, and some
chroma-signal information swing
negative, but 80% of the signal that
carries the critical color information
(chroma) swings positive. Efficient use
of the dynamic range of the LT1228
requires that the input signal have
little or no offset. Offsetting the video
signal so that the critical part of the
chroma waveform is centered in the
linear region of the transconductance
amplifier allows a larger signal to be
input before the onset of severe
distortion. A simple way to do this is
to bias the unused input (in this
circuit the inverting input, pin 2) with
a DC level.
In a video system it might be convenient to clamp the sync tip at a
more negative voltage than usual.
Table 1. Measured performance data (uncorrected)
Input
(volts)
0.03
0.06
0.09
ISET(ma)
1.93
0.90
0.584
Differential
Gain
0.5%
1.2%
10.8%
Differential
Phase
2.7°
1.2°
3.0°
References
1. Signal to noise ratio, S/N = 20 x log(RMS signal/
RMS noise).
2. One way to do this is to sample the colorburst
amplitude (the nominal peak-to-peak amplitude
of the colorburst for NTSC is 40% of the
peak luminance) with a sample-and-hold and
peak detector.
3. Notice also that the linear region expands
with higher temperature. Heating the chip has
been suggested.
Table 2. Measured performance data (corrected)
Input
(volts)
0.03
0.06
0.09
S/N
55dB
56dB
57dB
11
Clamping the signal prior to the gaincontrol stage is good practice because
a stable DC reference level must be
maintained.
The optimum value of the bias level
on pin 2 used for this evaluation was
determined experimentally to be
about 0.03 volt. The distortion tests
were repeated with this bias voltage
added. The results are reported in
Table 2 and Figures 2 and 3
(curves B). The improvement to the
differential phase is inconclusive,
but the improvement in the differential gain is substantial.
Bias
Voltage
0.03
0.03
0.03
ISET(ma)
1.935
0.889
0.584
3.5
DIFFERENTIAL PHASE (DEG)
DIFFERENTIAL GAIN (%)
7
6
A, UNCORRECTED
5
4
3
2
B, CORRECTED
TRANSCONDUCTANCE (µA/mV)
1.8
8
3.0
A, UNCORRECTED
2.5
2.0
1.5
B, CORRECTED
1
0
0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09
VIDEO INPUT LEVEL (V)
1.6
V S = ±2V TO ±15V
ISET = 100µA
1.4
–55°C
1.2
1.0
25°C
0.8
0.6
125°C
0.4
0.2
0.1
1228_2.eps
Figure 2. Differential gain vs. input level
18
S/N
55dB
56dB
57dB
2.0
10
9
Differential Differential
Gain
Phase
0.9%
1.45°
1.0%
2.25°
1.4%
2.85°
1.0
0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09
VIDEO INPUT LEVEL (V)
0.1
1228_3.eps
Figure 3. Differential phase vs. input level
0
–200 –150 –100 –50
0
50
100 150 200
INPUT VOLTAGE (mVDC)
1228_4.eps
Figure 4. Small-signal transconductance
vs. DC input voltage
Linear Technology Magazine • June 1993
DESIGN IDEAS
Differential Gain and Phase
Differential gain and phase are
sensitive indications of chromasignal distortion. The NTSC system encodes color information
on a separate subcarrier at
3.579545MHz. The color subcarrier
is directly summed to the black and
white video signal. (The black and
white information is a voltage proportional to image intensity and is
called luminance or luma.) Each
line of video has a burst of 9 to 11
cycles of the subcarrier (so timed that
it is not visible) that is used as
a phase reference for demodulation
of the color information of that line.
The color signal is relatively immune
to distortions, except for those
that cause a phase shift or an
amplitude error to the subcarrier
during the period of the video line.
Differential gain is a measure of
the gain error of a linear amplifier
at the frequency of the color
subcarrier. This distortion is measured with a test signal called a
modulated ramp (shown in Figure
5). The modulated ramp consists of
the color subcarrier frequency
superimposed on a linear ramp (or
sometimes on a stair step). The ramp
has the duration of the active portion
of a horizontal line of video. The
amplitude of the ramp varies from
zero to the maximum level of the
luminance, which, in this case, is
0.714 volt. The gain error corresponds
to compression or expansion by the
amplifier (sometimes called “incremental gain”) and is expressed as a
percentage of the full amplitude range.
An appreciable amount of differential gain will cause the luminance to
modulate the chroma, causing visual chroma distortion. The effect of
differential gain errors is to change
the saturation of the color being displayed. Saturation is the relative degree of dilution of a pure color with
white. A 100% saturated color has
0% white, a 75% saturated color has
25% white, and so on. Pure red is
100% saturated, whereas pink is red
with some percentage of white and is
therefore less than 100% saturated.
Differential phase is a measure of
the phase shift in a linear amplifier at
the color subcarrier frequency when
+0.714V
100% WHITE
0V
BLANKING
– 0.286V
the modulated ramp signal is used as
an input.
The phase shift is measured relative to the colorburst on the test
waveform and is expressed in degrees. The visual effect of the distortion
is a change in hue. Hue is the that
quality of perception which differentiates the frequency of the color, red
from green, yellow-green from yellow, and so forth.
Three degrees of differential phase
is about the lower limit that can
unambiguously be detected by observers. This level of differential phase
is just detectable on a video monitor
as a shift in hue, mostly in the yellowgreen region. Saturation errors are
somewhat harder to see at these
levels of distortion—3% of differential gain is very difficult to detect on a
monitor. The test is performed by
switching between a reference
signal, SMPTE (Society of Motion
Picture and Television Engineers)
75% color bars, and a distorted
version of the same signal, with
matched signal levels. An observer is
then asked to note any difference.
In professional video systems
(studios, for instance) cascades of
processing and gain blocks can reach
hundreds of units. In order to maintain a quality video signal, the
distortion contribution of each
processing block must be a small
fraction of the total allowed distortion budget 4 (the errors are
cumulative). For this reason, highquality video amplifiers will have
distortion specifications as low as a
few thousandths of a degree for
differential phase and a few thousandths of a percent for differential
gain.
+0.1429V
0V
– 0.1429V
3.58 MHz COLOR
SUBCARRIER SUMMED
TO LINEAR RAMP
0µs
7µs
10µs
11.5µs
1228_br.eps
References
4. From the preceding discussion, the limits on
visibility are about 3° differential phase, 3%
differential gain. Please note that these are not
hard and fast limits. Tests of perception can be
very subjective.
Figure 5. NTSC test signal
Linear Technology Magazine • June 1993
19
DESIGN IDEAS
Noise Generators for Multiple Uses
A Broadband
Random Noise Generator
A Diode Noise Generator
for “Eye Diagram” Testing
by Jim Williams
Filter, audio, and RF-communications testing often require a random
noise source. Figure 1’s circuit provides an RMS-amplitude regulated
noise source with selectable bandwidth. RMS output is 300 millivolts,
with a 1kHz to 5MHz bandwidth,
selectable in decade ranges.
Noise source D1 is AC coupled
to A2, which provides a broadband
gain of 100. A2’s output feeds a gaincontrol stage via a simple, selectable
lowpass filter. The filter’s output is
applied to A3, an LT1228 operational
transconductance amplifier. A1’s
output feeds LT1228 A4, a current-
by Richard Markell
The circuit that Jim Williams describes evolved from my desire to
build a circuit for testing communications channels by means of “eye
diagrams.” (See Linear Technology,
Volume I, Number 2 for a short
explanation of the eye diagram.) I
wanted to replace my pseudo-random code generator circuit, which
used a PROM, with a more “analog”
design—one that more people could
build without specialized components. What evolved was a noise
source sampled by a very fast comparator (see Figure 5). The comparator outputs a random pattern of 1’s
and 0’s.
The noise diode (an NC201) is filtered and amplified by the LT1190
high-speed operational amplifier (U1).
The output feeds the LT1116 (U2), a
12ns, single-supply, ground-sensing
comparator. The 2kΩ pot at the inverting input of the LT1116 sets the
threshold to the comparator so that a
quasi-equal number of 1’s and 0’s are
output. U3 latches the output from
U2 so that the output from the comparator remains latched throughout
one clock period. The two-level output is taken from U3’s Q0 output.
The additional circuitry shown in
the schematic diagram allows the
circuit to output four-level data for
PAM (pulse amplitude modulation)
testing. The random data from the
two-level output is input to a shift
register, which is reset on every fourth
clock pulse. The output from the shift
register is weighted by the three 5kΩ
resistors and summed into the
LT1220 operational amplifier from
which the output is taken. The filter
network between the 74HC74 output
and the 74HC4094 strobe input is
necessary to ensure that the output
data is correct.
feedback amplifier. A4’s output, which
is also the circuit’s output, is sampled
by the A5-based gain-control configuration. This closes a gain control
loop to A3. A3’s ISET current controls
gain, allowing overall output level
control.
Figure 2 plots noise at a 1MHz
bandpass, whereas Figure 3 shows
RMS noise versus frequency in the
same bandpass. Figure 4 plots similar
information at full bandwidth
(5MHz). RMS output is essentially
flat to 1.5MHz, with about ±2dB
control to 5MHz before sagging badly.
0.1(1kHz)
1µF
16k
+
+15V
D1
NC201
1k
0.01(10kHz)
1.6k
A2
LT1226
–
0.001(100kHz)
1k
1k
100pF(1MHz)
10Ω
NC
(5MHz)
15V
+
A3
LT1228
gm
+
–
A4
LT1228
CFA
910Ω
3k
–
0.1
510Ω
1µF
NON POLAR
–15V
15V
+
–15V
+
A5
LT1006
22µF
22µF
– –
10k
+
10Ω
–
0.5µF
10k
1M
4.7k
–15V
NC 201= NOISE COM CORP.
NOISE COM= (201) 261-8797
1N4148
THERMALLY
COUPLED
LT1004
1.2V
Noise_1.eps
Figure 1. Broadband random noise generator schematic
20
Linear Technology Magazine • June 1993
DESIGN IDEAS
Symmetrical White
Gaussian Noise
NOISE AMPLITUDE
500mV/DIV
by Bent Hessen-Schmidt,
NOISE COM, INC.
10.0µs/DIV
Noise_2.eps
Figure 2. Noise amplitude at 1MHz bandpass
12
AMPLITUDE VARIANCE (dB)
9
6
Vn = 2 √kT∫ R(f) p(f) df
3
0
–3
–6
–9
–12
–15
–18
0
0.1
0.2
0.3
0.4
0.5
0.6
FREQUENCY (MHz)
0.7
0.8
0.9
1.0
(1)
where:
k = 1.38E–23 J/K
(Boltzmann’s constant)
T = temperature of the
resistor in Kelvin
f=
frequency in Hz
h = 6.62E–34 Js (Planck’s
constant)
R(f) = resistance in ohms as a
function of frequency
Noise_3.eps
p(f) =
Figure 3. RMS noise vs. frequency at 1MHz bandpass
hf
kT[exp(hf/kT) –1]
(2)
p(f) is close to unity for frequencies
below 40GHz when T is equal to
290°K. The resistance is often assumed to be independent of frequency, and ∫df is equal to the
noise bandwidth (B). The available
noise power is obtained when the
load is a conjugate match to the
resistor, and it is:
9
6
3
AMPLITUDE VARIANCE (dB)
White noise provides instantaneous coverage of all frequencies
within a band of interest with
a very flat output spectrum. This
makes it useful both as a broadband stimulus and as a powerlevel reference.
Symmetrical white Gaussian
noise is naturally generated in resistors. The noise in resistors is
due to vibrations of the conducting electrons and holes, as described by Johnson and Nyquist.1,2
The distribution of the noise voltage is symmetrically Gaussian,
and the average noise voltage is:
0
–3
–6
–9
–12
N=
–15
–18
–21
0
1
2
3
4
5
6
FREQUENCY (MHz)
7
8
Figure 4. RMS noise vs. frequency at 5MHZ bandpass
Linear Technology Magazine • June 1993
9
10
Noise_4.eps
Vn2
= kTB
4R
(3)
where the “4” results from the
fact that only half of the noise
voltage and hence only 1/4 of the
noise power is delivered to a
matched load.
21
DESIGN IDEAS
non-reflecting load exceeds the noise
power available from a load held at
the reference temperature of 290°K
(16.8°C or 62.3°F).
The importance of a high ENR
becomes obvious when the noise is
amplified, because the noise contributions of the amplifier may be
disregarded when the ENR is 17dB
larger than the noise figure of the
amplifier (the difference in total noise
power is then less than 0.1dB). The
ENR can easily be converted to noise
spectral density in dBm/Hz or
µV/√ Hz by use of the white noise
conversion formulas in Table 1.
Equation 3 shows that the available noise power is proportional to
the temperature of the resistor; thus
it is often called thermal noise power.
Equation 3 also shows that white
noise power is proportional to the
bandwidth.
An important source of symmetrical white Gaussian noise is the
noise diode. A good noise diode generates a high level of symmetrical
white Gaussian noise. The level is
often specified in terms of excess
noise ratio (ENR).
ENR (in dB) = 10Log
(Te –290)
290
(4)
When amplifying noise it is important to remember that the
noise voltage has a Gaussian distribution. The peak voltages of noise are
therefore much larger than the average or RMS voltage. The ratio of peak
voltage to RMS voltage is called crest
factor, and a good crest factor for
Gaussian noise is between 5:1 and
10:1 (14 to 20dB). An amplifier’s 1dB
gain-compression point should therefore be typically 20dB larger than the
desired average noise-output power
to avoid clipping of the noise.
For more information about noise
diodes, please contact NOISE COM,
INC. at (201) 261-8797.
Table 1. Useful white noise conversion
Te is the physical temperature that
a load (with the same impedance as
the noise diode) must be at to generate the same amount of noise.
The ENR expresses how many
times the effective noise power
delivered to a non-emitting,
References
1. Johnson, J.B. “Thermal Agitation of Electricity
in Conductors,” Physical Review, July 1928,
pp. 97-109.
2. Nyquist, H. “Thermal Agitation of Electric
Charge in Conductors,” Physical Review,
July 1928, pp. 110–113.
dBm = dBm/Hz + 10log(BW)
dBm = 20log(Vn) – 10log(R) + 30dB
dBm = 20log(Vn) + 13dB for R = 50ohms
dBm/Hz= 20log(µVn√Hz) - 10log(R) – 90dB
dBm/Hz= –174dBm/Hz + ENR for ENR > 17dB
10k
5V
10pF
100k
5V
1µF
3
NC201
NOISE DIODE
1M 2
+
5V
7
–
–5V
1k
6
U1
LT1190
3
4
2
100k
–5V
1k
1µF +
+
U2
LT1116
–
4
TANT.
8
6
3
20
VCC
5 7
LE
U3
74HC373
11
5V
10
100k
10µF
5V
2 LEVEL
OUTPUT
Q0
LE
–5V
+
2
DO
0E
–5V
U5
74HC04
5
6
2k
CLOCK
1
4
2 1RD
1SD 5
1
1D
1Q
3
6
1CLK
5V
2 D
3 CP
1.7k
8V
QS210
8-STAGE SHIFT
REGISTER
QS19
2
1 STR
8-BIT STORAGE
REGISTER
15 OE
7
8
LT1220
3
5V
–
74HC4094
VCC = PIN 16
GND = PIN 8
3-STATE OUTPUTS
+
1Q
13
10
12 2RD
2SD 9
2D
2Q
11
8
2CLK
4
4 LEVEL
OUTPUT
– 8V
100pF
1k
2Q
74HC74
VCC = PIN 14
GND = PIN 7
QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7
4
5
6
7
14
13
12
11
5k x 3
NC 201= NOISE COM DIODE
NOISE COM= (201) 261-8797
Noise_5.eps
Figure 5. Pseudo-random code generator schematic diagram
22
Linear Technology Magazine • June 1993
DESIGN IDEAS
High-Current Synchronous Switcher
Converts 5V to 3.3V at 90% Efficiency
by Milt Wilcox
At start-up, the circuit in Figure 1
uses the charge pump built into the
LT1158 synchronous, N-channel
MOSFET driver to pump the gates of
the top MOSFET switch above VIN.
Start-up current is controlled by the
same LT1158 protection loop that
provides short-circuit protection. The
DC level of the CMOS 555 trianglewave oscillator relative to the LT1158
input threshold sets the PWM duty
cycle during normal operation. The
LT1431 contains the reference and
error amplifier that controls the DC
level of the triangle wave via the CMOS
555 supply pin.
When the output is shorted, the
LT1158 current-sense comparator
overrides the LT1431 output to create
a current-mode protection loop.
Current limit is approximately
100mV/RS, or approximately 20A for
the Figure 1 circuit. During a short,
the duty cycle drops to a very low
100
98
96
EFFICIENCY (%)
The next generation of microprocessors used in desktop computers
and workstations will consume prodigious amounts of current at 3.3V.
Often a high-current, offline 5V supply
is already available. The problem
then becomes how to generate 3.3V
from the available supply without the
need for costly and space-consuming
heat sinks. For example, dropping 5V
to 3.3V in a linear regulator would
consume a minimum of 17W.
The circuit in Figure 1 efficiently
converts 5V to 3.3V at output currents
up to 15A and features soft-start and
short-circuit protection. The efficiency
at 10A output is 91% (see Figure 2),
meaning that only 7.25A is drawn
from the 5V input. Because the 3.3Wconversion power loss is fairly evenly
divided among RS, L1, and the four
MOSFETs, heat sinking is not required
for operation at 10A. At 15A output,
total losses are still only 7W, requiring
minimal heat sinking.
94
92
90
88
86
84
82
80
0
2
4
6
8
10 12 14
IOUT (A)
16 18 20
1158_2.eps
Figure 2. Efficiency for 5V to 3.3V high-current
synchronous switcher
value, increasing the dissipation in
each bottom MOSFET to approximately 3W. Therefore, 20°C/W
heat sinking should be provided for
the bottom MOSFETs if continuous
short-circuited operation is required.
5VIN
BAT85
+
10µF
3.3k
0.01µF
3
4
24k
2
CMOS
555
BST
V+
T DR
BIAS
T FB
LT1158
0.01µF
IN
8
500pF
6
1
V+
FAULT
COLL
REF
LT1431
GND-F
(2) IRLZ44
SEN–
1000pF
1.62k
–
+
GND-S
CIN
(4) 150µF/16V
OS-CON
SRC
16k
4.99k
(2) IRLZ44
B DR
SEN+
f = 50kHz
V+
500k
B FB
7
0.01µF
+
0.1µF
COUT
220µF
10V
OS-CON
3.3V/15A
OUT
RS
5mΩ
+
L1
20µH
L = COILTRONICS CTX 02-12061
COILTRONICS (305) 781-8900
RS = DALE WSC-2-4 (SURFACE MOUNT) LVR-3 (THROUGH HOLE)
1158_1.eps
Figure 1. 5V to 3.3V/15A high-efficiency switching regulator
Linear Technology Magazine • June 1993
23
DESIGN IDEAS
Protected Bias for
GaAs Power Amplifiers
Portable communications devices
such as cellular telephones and answer-back pagers rely on small,
GaAsFET-based 0.1 to 1.0W RF amplifiers as the transmitter output
stage. The main power device requires a negative gate-bias supply,
which is not readily available in a
battery-operated product. The circuit
shown in Figure 1 not only develops
a regulated negative gate bias, it
also switches the positive supply,
protects against the loss of gate
bias, limits power dissipation in
the amplifier under high standingwave ratio (SWR) conditions, and
protects against amplifier failures
that might otherwise short-circuit the
battery pack.
Negative bias is supplied by an
LTC1044 charge-pump inverter, and
the amplifier’s positive supply is
switched by an LTC1153 electronic
circuit breaker. An open-collector
by Mitchell Lee
switch can be used to turn the
LTC1044 inverter off by grounding
the OSC pin (7). When off, the LTC1044
draws only 2µA.
The negative output from the
LTC1044 is sensed by a 2.5V reference
diode (IC2) and Q2. With no
negative bias available, Q2 is off and
Q3 turns on, pulling the LTC1153’s
control input low. This shuts off the
GaAs amplifier. Total standby power,
including the LTC1044, is approximately 25µA.
If the LTC1044’s OSC pin (7) is
released, a negative output, nearly
equal in magnitude to the battery
input voltage, appears at VOUT (pin 5).
The negative bias is regulated by R1,
IC2, and Q2’s base-emitter junction.
Q2 saturates, shutting Q3 off and
thereby turning the LTC1153 on.
The LTC1153 charges the
N-channel MOSFET (Q4) gate to 10V
above the battery potential, switching
Q4 fully on. Power is thus applied to
the GaAs amplifier.
The nominal negative bias is –3.2V,
comfortably assuring the –2.5V minimum specified for the amplifier. Total
quiescent current, exclusive of the
GaAs amplifier drain supply, is approximately 1.5mA in the “on” state.
Short circuits or over-current conditions in the GaAs amplifier can
damage the circuit board, the batteries, or both. The LTC1153 senses the
amplifier’s supply current and turns
Q4 off if it is over 2A. After a timeout
period set by C6 (200ms) the LTC1153
tries again, turning Q4 on. If the
amplifier’s supply current is still too
high, the LTC1153 trips off again.
This cycle continues until the fault
condition is cleared. Under fault conditions the LTC1153’s STATUS pin (3)
is low. As soon as the fault is cleared,
the LTC1153 resets and normal operation is restored.
7.2V
(6 NiCd CELLS)
R3
1MΩ
+
R4
1MΩ
1
BOOST
V+
7
CT
IC3 DS
LTC1153CS8
3
6
STATUS GATE
7
CAP+ IC1 OSC
LTC1044CS8
3
6
LV
GND
4
CAP–
VOUT
OFF
ON
4
GND
FAULT
IC2
LT1004CS8-2.5
R1
3.3kΩ
5
Q1
+
C1
1µF
C6
220nF
SD
5
R5
1kΩ
C7
1nF
R7
50mΩ
Q4
IRFR024
R6
5.1MΩ
R2
10kΩ
C2
100nF
2
+
8
8
C3
1µF
+
1
C5
100nF
VS
2
Q3*
Q2*
IN
C8
10µF
C4
1µF
* ZETEX ZTX 384
ZETEX (516) 543-7100
OR MOTOROLA MMBT3904
GaAsFET
AMPLIFIER
VDD
RF
OUT
GATE BIAS
R8
1MΩ
1044_1.eps
Figure 1. Schematic diagram
24
Linear Technology Magazine • June 1993
DESIGN IDEAS
High-Current, Synchronous, Step-Down
by Brian Huffman
Switching Regulator
VIN
12V TO 36V
output (Pin 4) that swings between
ground and 10V, turning Q3 on and
off. While Q3 is on, the N-channel
MOSFET (Q4) is off because its gate is
pulled low by Q3, through D2. During
this interval, the NGATE output (pin
13) turns the synchronous switch
(Q5) on, creating a low-resistance
path for the inductor current.
Q4 turns on when its gate is driven
above the input voltage. This is
accomplished by bootstrapping
capacitor C2 off the drain of Q4. The
LTC1149 VCC output (Pin 3) supplies
a regulated 10V output that is used to
charge C2 through D1 while Q4 is off.
With Q4 off, C2 charges to 5V during
the first cycle in Burst ModeTM operation and to 10V thereafter.
When Q3 turns off, the N-channel
MOSFET is turned on by the
SCR-connected NPN-PNP network
(Q1 and Q2). Resistor R2 supplies Q2
with enough base drive to trigger the
SCR. Q2 then forces Q1 to turn on,
+
D1
1N4148
R4
220Ω
CIN
1000µF
63V
Q1
2N3906
+
R2
10k
C1
0.1µF
2
3
+
C3
3.3µF
5
16
10
0V = NORMAL
>2V = SHUTDOWN
VIN
PGATE
VCC
VCC
PDRIVE
D2
1N4148
1
4
SENSE+
SD1
15 SD2
9
SENSE– 8
C4
3300pF
X7R
C3
CIN
COUT
Q1
Q2
Q3
6 CT
CT
820pF
NPO
NGATE 13
12
24V
70
36V
60
50
100mA
1A
OUTPUT CURRENT
5A
1149_2.eps
Figure 2. LTC1149-5 (12V–36V to 5V/5A)
high-current buck
supplying more base drive to Q2. This
regenerative process continues until
both transistors are fully saturated.
During this period, the source of Q4
is pulled to the input voltage. While Q4
is on, its gate-source voltage is
approximately 10V, fully enhancing
the N-channel MOSFET.
Efficiency performance for this circuit is quite impressive. Figure 2
shows that for a 12V input the efficiency never drops below 90% over
the 0.6A to 5A range. At higher input
voltages efficiency is reduced due to
transition losses in the power
MOSFETs. For low output currents,
efficiency rolls off because of quiescent
current losses.
L1
50µH
RSENSE
20Ω
+
C4
0.001µF
R6
100Ω
5V/5A
COUT
220µF X 2
10V
Q5
IRFZ34
D3
MBR160
SGND PGND RGND
11
12V
80
Q4
MTP30N06EL
R5
100Ω
CAP LTC1149-5
90
Q2
2N2222
Q3
VN2222LL
7 I
TH
R1
1k
C2
0.1µF
R3
470Ω
100
EFFICIENCY (%)
The new LTC1149 can drive an
external, N-channel MOSFET to
achieve high-efficiency, high-current
power conversion. The standard
P-channel approach is preferred at
output currents of under 2A; however,
P-channel MOSFETs become a
dominant loss element at higher output currents, limiting overall circuit
efficiency. Consequently, N-channel
MOSFETs are better suited for use in
high-current applications, since they
have a substantially lower onresistance than comparably priced
P-channels. The best P-channels have
an on-resistance of 60mΩ, whereas
N-channels with on-resistances less
than 25mΩ are readily available. The
circuit shown in Figure 1 uses the lowloss characteristics of N-channel
MOSFETs, providing efficiency in
excess of 90% at an output current
of 5A.
The circuit’s operation is as follows:
the LTC1149 provides a PDRIVE
14
(TA) LOW ESR
NICHICON (AL) UPL1J102MRH, ESR = 0.027Ω, IRMS = 2.370A
SANYO (OS-CON) 10SA220M, ESR = 0.035Ω, IRMS = 2.360A
PNP, BVCEO = 30V
NPN, BVCEO = 40V
SILICONIX NMOS, BVDSS = 60V, RDSON = 5Ω
Q4, Q5
D1, D2
D3
RSENSE =
L1 =
NMOS, BVDSS = 60V, RDSON = 0.05Ω
SILICON, VBR = 75V
MOTOROLA SCHOTTKY, VBR = 60V
KRL NP-2A-C1-0R020J, PD = 3W
COILTRONICS CTX50-5-52, DCR = 0.21Ω, IRON POWDER CORE
ALL OTHER CAPACITORS ARE CERAMIC
1149_1.eps
Figure 1. LTC1149-5 (12V–36V to 5V/5A) using N-channel MOSFETs
Linear Technology Magazine • June 1993
25
NEW
DESIGN
DEVICE
IDEAS
CAMEOS
New Device Cameos
LT1180A, LT1181A,
and LT1130A Family
RS232 Transceivers
Three new RS232 interface transceivers provide enhanced performance
and fault tolerance compared to existing devices. The LT1180A and
LT1181A are two-driver/two-receiver
transceivers, pin compatible with
the existing LT1080/LT1081 and
LT1180/LT1181. The LT1130A family consists of eleven devices that are
pin compatible with the LT1130 family. Members of the LT1130A family
provide up to five drivers and five
receivers with a charge pump in a
single package.
All of the new circuits feature ±10kV
ESD protection on the RS232 line
pins and operate to 120k baud while
driving up to 2500pF loads. The onchip charge-pump power generators
are capable of using low-cost 0.1µF
capacitors to generate RS232 levels
from standard, 5V power supplies.
Power consumption is reduced by as
much as 43% from the earlier devices,
while SHUTDOWN and DRIVER
DISABLE operating modes allow further power savings in some systems.
All of these circuits are available in
Plastic DIP or SOIC packages. The
LT1137A and LT1138A are also available in 28-lead SSOP packages.
The LTC1163 Triple
1.8V to 6V MOSFET Driver
The LTC1163 triple 1.8V to 6V gate
driver makes it possible to switch
either supply- or ground-referenced
loads through low RDS(ON) N-channel
switches from as little as 1.8V (two
discharged cells). The LTC1163 contains three on-chip charge pumps so
that less expensive, lower R DS(ON)
N-channel MOSFETs can be used to
replace high-side P-channel switches,
which generally perform poorly below
5V and cannot operate down to 1.8V.
The three charge pumps require
no external components and have
26
been designed to be very efficient. The
standby current with the three inputs
switched off is typically 0.01
microamps. The quiescent current
rises to 95 microamps per channel
with the input turned on and the
charge pump producing 11V from a
3.3V supply.
Micropower operation, coupled
with a power supply range of 1.8V to
6V, makes the LTC1163 ideal for 2to 4-cell battery-powered applications.
The LTC1163 is also well suited for
3.3V and 5V nominal supply applications. The LTC1163 is available in
both 8-pin DIP and 8-pin SOIC packaging. The pin-out has been optimized
as a “flow-through” configuration, with
the three inputs and ground pin on
one side and the three outputs and
supply pin on the other.
LT1204 Four-Input
Video Multiplexer with
Current-Feedback Amplifier
The LT1204 is a four-input video
multiplexer designed to drive 150Ω
cables and to expand easily into larger
routing systems. Wide bandwidth,
high slew rate, and low differential
gain and phase make the LT1204
ideal for broadcast-quality routing.
Gain flatness is 0.1dB at 40MHz for
A V = 2. Channel separation and disable isolation are 90dB at 10MHz. The
channel-to-channel output switching
transient is only 40mV, with a
50ns duration, making the transition imperceptible on high-quality
monitors.
A unique feature of the LT1204 is
its ability to expand into larger routing
matrices. This is accomplished by
bootstrapping the feedback resistors
in the disable condition, raising the
true output impedance of the circuit.
This feature negates the effects of
poor cable terminations in large
systems.
A large input range of ±6V makes
the LT1204 ideal for general-purpose
analog signal selection and multiplexing. The new multiplexer operates
on ±5V to ±15V supplies and a shutdown feature reduces the supply
current to just 1mA. The part is available in a 16-lead plastic DIP (N)
package or a 16-lead wide SO.
LT1381 5V-Powered RS232
Transceiver in a 16-Lead,
Narrow-Body SO Package
The LT1381 is a new two-driver/
two-receiver RS232 interface transceiver with an integral charge-pump
power generator. The circuit is available in 16-lead narrow SOIC packages, reducing board space by 27%
over existing devices. The circuit is
also available in a 16-lead plastic DIP.
The circuit contains an on-chip
charge-pump generator, which uses
small 0.1µF ceramic chip capacitors
to supply RS232 output drive levels
while operating from a single 5V power
supply. Power consumption is a low
13mA max. RS232 I/O pins are protected from ESD transients in excess
of ±10kV, eliminating the need for
expensive TranZorbs. Driver outputs
are capable of driving 2500pF loads to
data rates in excess of 120k baud.
Driver outputs are high impedance
when powered down, and do not load
the RS232 line as do CMOS devices.
LT1332 Wide-Supply-Range,
Low Power RS232 Transceiver
The LT1332 is an extremely low
power RS232 transceiver intended
for systems that operate at low voltage
yet require true RS232 output
levels. The LT1332 is designed to be
powered from an external switching
regulator, which may be used elsewhere for power conditioning. In a
typical application, the LT1332 shares
Linear Technology Magazine • June 1993
NEW DEVICE
DESIGN
CAMEOS
IDEAS
the regulator’s positive output, while
charge is capacitively pumped from
the regulator’s switch pin to the negative supply. Schottky rectifiers built
into the LT1332 simplify the chargepump design.
The LT1332/switcher combination
generates fully compliant RS232 signal levels from inputs as low as 2V
(e.g., two dead AA batteries) or as high
as 6V (e.g., a poorly regulated 5V
supply). The LT1109A can deliver
greater than 100mA of output current, making it an excellent choice for
powering FLASH memory, while the
surplus power available to the LT1332
is sufficient to drive long cables, heavy
loads, or mice. When operated unloaded, the LT1332 draws 1mA of
supply current. While shut down, the
LT1332 typically draws 40µA of supply current which keeps one receiver
active for detecting start-up signals.
If external RS232 supplies are available (6.6V < V+ < 13.2V; –13.2V < V–
< –6.6V), the LT1332 can be used as
a stand-alone unit. When used in this
way, the LT1332’s low supply current
makes it an attractive alternative to
the LT1141.
The LT1332 is a complete RS232
serial port with three drivers and five
receivers, arranged in a flow-through
architecture similar to that of the
popular LT1137. Advanced driver
output stages operate up to 120k
baud while driving heavy capacitive
loads. New ESD structures on the
driver outputs and receiver inputs
make the LT1332 resilient to multiple
±10kV strikes, eliminating costly transient suppressors.
The LT1332 requires two external
charge pump caps for the negative
supply, but only small decoupling caps
are needed on the positive supply
inputs. The low parts count helps
For further information on the
above or any other devices
mentioned in this issue of Linear
Technology, use the reader service
card or call the LTC literatureservice number: (800) 637-5545.
Ask for the pertinent data sheets
and application notes.
Linear Technology Magazine • June 1993
reduce board space. The LT1332 is
available in SO, SSOP, and DIP
packages.
LT1259 Dual/LT1260 Triple
Current-Feedback Amplifiers
The LT1259 contains two independent 100MHz current-feedback
amplifiers, each with a shutdown
pin. These amplifiers are designed for
excellent linearity while driving cables
and other low impedance loads. The
LT1260 is a triple version, especially
suited to RGB video applications.
These amplifiers operate on all supplies from single 5V to ±15V and draw
only 5mA per amplifier when active.
When shut down, the LT1259/
LT1260 amplifiers draw zero supply
current and their outputs become
high impedances. The amplifiers’ turnon times are only 70ns and their
turn-off times are 140ns. In portable
equipment and systems using several
amplifiers, the shutdown feature
reduces system power without the
problems normally associated with
power supply switching. The shutdown feature also allows the outputs
of several amplifiers to be wired together to make a video mux amp.
Dual and triple amplifiers significantly reduce costs compared with
singles; board space and the number
of insertions are reduced and fewer
supply-bypass capacitors are required. The wide bandwidth and high
slew rate of these amplifiers make
driving RGB signals easy. Only two
LT1260s are required to make a complete, two input RGB MUX and cable
driver.
The LT1259 is available in 14-pin
DIPs and narrow S14 surface mount
packages. The LT1260 is available in
16-pin DIPs and narrow S16 surface
mount packages.
Information furnished by Linear Technology
Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use.
Linear Technology makes no representation that
the circuits described herein will not infringe on
existing patent rights.
LTC in the News . . .
Third Quarter Earnings
Thanks to the continued patronage
of our customers and acceptance of
our products and application solutions
in the marketplace, Linear Technology
Corporation recorded its 30th consecutive quarter of increased sales and
income levels. Linear Technology
Corporation net sales for the third
quarter of 1993 reached a record
$38,806,000, a 27% increase over
the third quarter of 1992. Third quarter net income also reached a record
$9,571,000 or $0.26 per share, an
increase of 46% over last year (adjusted to reflect the two-for-one stock
split distributed on November 24, 1992).
Rankings & Ratings
Magazines and newspapers annually rank leading companies on the
bases of sales growth, profitability,
return on equity and other criteria.
Linear Technology has traditionally
done very well in all of the ratings
for which the company qualified. This
year is no exception. Three of the
year’s recent evaluations are summarized below.
In Business Week ’s “Top 1000:
America’s Most Valuable Companies,”
based on its market value, Linear
ranked 812th in the U.S. compared to
853rd last year, when LTC first appeared on this list. This ranking placed
Linear Technology Corporation best in
its class and 10th among all semiconductor manufacturers.
Financial World magazine ranked
Linear Technology Corporation 1st
among all semiconductor companies
and 22nd among its “Top 200
Growth Companies in the U.S.” ranking for 1993.
Upside magazine is a national magazine published in San Francisco that
focuses on high technology companies.
In this year’s “Upside 100” list, Linear
Technology placed 5th in market value
growth among all semiconductor companies and 31st within the 800 technology companies in the survey.
Industry statistical analysts at
In-Stat in Scottsdale, Arizona, named
Linear Technology “the best financially
managed manufacturer in the semiconductor industry” in its annual
Kachina Awards.
Bob Swanson, President of Linear
Technology, shares the honor of Financial World “CEO of the Year” with the
CEO of Loral and Andy Grove of Intel.
27
DESIGN IDEAS
DESIGN TOOLS
World Headquarters
Applications on Disk
Linear Technology Corporation
1630 McCarthy Boulevard
Milpitas, CA 95035-7487
Phone: (408) 432-1900
FAX: (408) 434-0507
NOISE DISK
This IBM-PC (or compatible) progam allows the user to
calculate circuit noise using LTC op amps, determine the
best LTC op amp for a low noise application, display the
noise data for LTC op amps, calculate resistor noise, and
calculate noise using specs for any op amp.
Available at no charge.
SPICE MACROMODEL DISK
This IBM-PC (or compatible) high density diskette contains
the library of LTC op amp SPICE macromodels. The
models can be used with any version of SPICE for general
analog circuit simulations. The diskette also contains working circuit examples using the models, and a demonstration
copy of PSPICETM by MicroSim.
Available at no charge.
Technical Books
1990 Linear Databook — This 1440 page collection
of data sheets covers op amps, voltage regulators,
references, comparators, filters, PWMs, data conversion
and interface products (bipolar and CMOS), in both commercial and military grades. The catalog features well over
300 devices.
$10.00
1992 Linear Databook Supplement — This 1248 page
supplement to the 1990 Linear Databook is a collection of
all products introduced since then. The catalog contains full
data sheets for over 140 devices. The 1992 Linear Databook
Supplement is a companion to the 1990 Linear Databook ,
which should not be discarded.
$10.00
Linear Applications Handbook — 928 pages full of
application ideas covered in depth by 40 Application Notes
and 33 Design Notes. This catalog covers a broad range of
“real world” linear circuitry. In addition to detailed, systemsoriented circuits, this handbook contains broad tutorial
content together with liberal use of schematics and scope
photography. A special feature in this edition includes a 22
page section on SPICE macromodels.
$20.00
1993 Linear Applications Handbook Volume II —
Continues the stream of “real world” linear circuitry initiated
by the 1990 Handbook. Similar in scope to the 1990 edition,
the new book covers Application Notes 41 through 54 and
Design Notes 33 through 69. Additionally, references and
articles from non-LTC publications that we have found
useful are also included.
$20.00
International
Sales Offices
FRANCE
Linear Technology S.A.R.L.
Immeuble “Le Quartz”
58 Chemin de la Justice
92290 Chatenay Mallabry
France
Phone: 33-1-46316161
FAX: 33-1-46314613
U.S. Area
Sales Offices
GERMANY
Linear Technology GMBH
Untere Hauptstr. 9
D-8057 Eching
Germany
Phone: 49-89-3194710
FAX: 49-89-3194821
CENTRAL REGION
Linear Technology Corporation
Chesapeake Square
229 Mitchell Court, Suite A-25
Addison, IL 60101
Phone: (708) 620-6910
FAX: (708) 620-6977
JAPAN
Linear Technology KK
5F YZ Building
4-4-12 Iidabashi Chiyoda-Ku
Tokyo, 102 Japan
Phone: 81-3-3237-7891
FAX: 81-3-3237-8010
NORTHEAST REGION
Linear Technology Corporation
One Oxford Valley
2300 E. Lincoln Hwy., Suite 306
Langhorne, PA 19047
Phone: (215) 757-8578
FAX: (215) 757-5631
KOREA
Linear Technology Korea Branch
Namsong Building, #505
Itaewon-Dong 260-199
Yongsan-Ku, Seoul
Korea
Phone: 82-2-792-1617
FAX: 82-2-792-1619
NORTHWEST REGION
Linear Technology Corporation
782 Sycamore Dr.
Milpitas, CA 95035
Phone: (408) 428-2050
FAX: (408) 432-6331
SINGAPORE
Linear Technology Pte. Ltd.
101 Boon Keng Road
#02-15 Kallang Ind. Estates
Singapore 1233
Phone: 65-293-5322
FAX: 65-292-0398
SOUTHEAST REGION
Linear Technology Corporation
17060 Dallas Parkway
Suite 208
Dallas, TX 75248
Phone: (214) 733-3071
FAX: (214) 380-5138
TAIWAN
Linear Technology Corporation
Rm. 801, No. 46, Sec. 2
Chung Shan N. Rd.
Taipei, Taiwan, R.O.C.
Phone: 886-2-521-7575
FAX: 886-2-562-2285
SOUTHWEST REGION
Linear Technology Corporation
22141 Ventura Boulevard
Suite 206
Woodland Hills, CA 91364
Phone: (818) 703-0835
FAX: (818) 703-0517
UNITED KINGDOM
Linear Technology (UK) Ltd.
The Coliseum, Riverside Way
Camberley, Surrey GU15 3YL
United Kingdom
Phone: 011-44-276-677676
FAX: 011-44-276-64851
Interface Product Handbook — This 200 page handbook
features LTC’s complete line of line driver and receiver
products for RS232, RS485, RS423, RS422 and AppleTalk 
applications. Linear’s particular expertise in this area involves low power consumption, high numbers of drivers
and receivers in one package, 10kV ESD protection of
RS232 devices and surface mount packages.
Available at no charge.
Monolithic Filter Handbook — This 232 page book comes
with a disk which runs on PCs. Together, the book and disk
assist in the selection, design and implementation of the
right switched capacitor filter circuit. The disk contains
standard filter responses as well as a custom mode. The
handbook contains over 20 data sheets, Design Notes and
Application Notes.
$40.00
SwitcherCAD Handbook — This 144 page manual, including disk, guides the user through SwitcherCAD—a
powerful PC software tool which aids in the design and
optimization of switching regulators. The program can cut
days off the design cycle by selecting topologies, calculating operating points and specifying component values and
manufacturer's part numbers.
$20.00
LINEAR TECHNOLOGY CORPORATION
1630 McCarthy Boulevard
Milpitas, CA 95035-7487
(408) 432-1900
Literature Department (800) 637-5545
AppleTalk is a registered trademark of Apple Computer, Inc.
©28
1993 Linear Technology Corporation/ Printed in U.S.A./20K
Linear Technology Magazine • June 1993