AOD7S60/AOU7S60 600V 7A α MOS TM Power Transistor General Description Product Summary The AOD7S60 & AOU7S60 have been fabricated using the advanced αMOSTM high voltage process that is designed to deliver high levels of performance and robustness in switching applications. By providing low RDS(on), Qg and EOSS along with guaranteed avalanche capability these parts can be adopted quickly into new and existing offline power supply designs. VDS @ Tj,max 700V IDM 33A RDS(ON),max 0.6Ω Qg,typ 8.2nC Eoss @ 400V 1.9µJ 100% UIS Tested 100% Rg Tested TO252 DPAK Top View TO251 D Top View Bottom View Bottom View D D G S G S G D G S S D Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Continuous Drain Current VGS TC=25°C TC=100°C S AOU7S60 AOD7S60 Gate-Source Voltage G Maximum 600 Units V ±30 V 7 ID 5 A Pulsed Drain Current C IDM 33 Avalanche Current C IAR 1.7 A Repetitive avalanche energy C EAR 43 mJ Single pulsed avalanche energy H TC=25°C Power Dissipation B Derate above 25oC MOSFET dv/dt ruggedness Peak diode recovery dv/dt Junction and Storage Temperature Range EAS 86 mJ PD dv/dt TJ, TSTG Maximum lead temperature for soldering purpose, 1/8" from case for 5 seconds K TL Thermal Characteristics Parameter Maximum Junction-to-Ambient A,D Symbol RθJA Maximum Case-to-sink A RθCS Maximum Junction-to-CaseD,F RθJC Rev0: Aug 2011 83 W 0.7 100 20 -55 to 150 W/ oC 300 °C V/ns °C Typical Maximum 45 55 °C/W -1.2 0.5 1.5 °C/W °C/W www.aosmd.com Units Page 1 of 7 AOD7S60/AOU7S60 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units ID=250µA, VGS=0V, TJ=25°C 600 - - ID=250µA, VGS=0V, TJ=150°C 650 700 - V µA STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current VDS=600V, VGS=0V - - 1 VDS=480V, TJ=150°C - 10 - IGSS Gate-Body leakage current VDS=0V, VGS=±30V - - ±100 VGS(th) Gate Threshold Voltage VDS=5V,ID=250µA 2.7 3.3 3.9 nΑ V RDS(ON) Static Drain-Source On-Resistance VSD Diode Forward Voltage IS ISM VGS=10V, ID=3.5A, TJ=25°C - 0.54 0.6 Ω VGS=10V, ID=3.5A, TJ=150°C - 1.48 1.64 Ω IS=3.5A,VGS=0V, TJ=25°C - 0.82 - V Maximum Body-Diode Continuous Current - - 7 A Maximum Body-Diode Pulsed CurrentC - - 33 A - 372 - pF - 28 - pF - 22 - pF - 65 - pF DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Co(er) Effective output capacitance, energy related I Crss Effective output capacitance, time related J Reverse Transfer Capacitance Rg Gate resistance Co(tr) VGS=0V, VDS=100V, f=1MHz VGS=0V, VDS=0 to 480V, f=1MHz VGS=0V, VDS=100V, f=1MHz - 1.2 - pF VGS=0V, VDS=0V, f=1MHz - 17.5 - Ω - 8.2 - nC - 2.0 - nC SWITCHING PARAMETERS Total Gate Charge Qg VGS=10V, VDS=480V, ID=3.5A Qgs Gate Source Charge Qgd Gate Drain Charge - 2.8 - nC tD(on) Turn-On DelayTime - 19 - ns tr Turn-On Rise Time - 13 - ns tD(off) Turn-Off DelayTime - 50 - ns tf trr Turn-Off Fall Time - 15 - ns VGS=10V, VDS=400V, ID=3.5A, RG=25Ω Body Diode Reverse Recovery Time Peak Reverse Recovery Current IF=3.5A,dI/dt=100A/µs,VDS=400V - 198 - ns Irm IF=3.5A,dI/dt=100A/µs,VDS=400V - 18 - Qrr Body Diode Reverse Recovery Charge IF=3.5A,dI/dt=100A/µs,VDS=400V - 2.4 - A µC A. The value of R θJA is measured with the device in a still air environment with T A =25°C. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g. G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. H. L=60mH, IAS=1.7A, VDD=150V, Starting TJ=25°C I. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS. J. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS. K. Wave soldering only allowed at leads. THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev0: Aug 2011 www.aosmd.com Page 2 of 7 AOD7S60/AOU7S60 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 12 14 10V 12 10V 6V 10 8 8 5.5V ID (A) ID (A) 6V 10 5.5V 6 6 5V 4 5V 4 VGS=4.5V 2 VGS=4.5V 2 0 0 0 5 10 15 0 20 5 10 15 20 VDS (Volts) Figure 2: On-Region Characteristics@125°C VDS (Volts) Figure 1: On-Region Characteristics@25°C 1.5 100 VDS=20V -55°C 1.2 10 RDS(ON) (Ω ) ID(A) 125°C 1 25°C 0.1 0.9 VGS=10V 0.6 0.3 0.0 0.01 2 4 6 8 0 10 VGS(Volts) Figure 3: Transfer Characteristics 6 9 12 15 ID (A) Figure 4: On-Resistance vs. Drain Current and Gate Voltage 1.2 3 2.5 VGS=10V ID=3.5A BVDSS (Normalized) Normalized On-Resistance 3 2 1.5 1 1.1 1 0.9 0.5 0 -100 -50 0 50 100 150 200 0.8 -100 Temperature (°C) Figure 5: On-Resistance vs. Junction Temperature Rev0: Aug 2011 www.aosmd.com -50 0 50 100 150 200 o TJ ( C) Figure 6: Break Down vs. Junction Temperature Page 3 of 7 AOD7S60/AOU7S60 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 15 1.0E+02 1.0E+01 125°C 12 VDS=480V ID=3.5A 25°C 1.0E-01 VGS (Volts) IS (A) 1.0E+00 1.0E-02 9 6 1.0E-03 3 1.0E-04 1.0E-05 0 0.0 0.2 0.4 0.6 0.8 1.0 0 2 VSD (Volts) Figure 7: Body-Diode Characteristics (Note E) 8 10 12 5 1000 4 Ciss 100 Eoss(uJ) Capacitance (pF) 6 Qg (nC) Figure 8: Gate-Charge Characteristics 10000 Coss 10 3 Eoss 2 Crss 1 1 0 0 0 100 200 300 400 500 VDS (Volts) Figure 9: Capacitance Characteristics 0 600 100 100 200 300 400 500 VDS (Volts) Figure 10: Coss stroed Energy 600 800 100µs 1 1ms 10ms DC TJ(Max)=150°C TC=25°C 600 10µs RDS(ON) limited Power (W) 10 ID (Amps) 4 400 200 0.1 TJ(Max)=150°C TC=25°C 0.01 1 10 100 1000 0 0.0001 VDS (Volts) Figure 11: Maximum Forward Biased Safe Operating Area (Note F) Rev0: Aug 2011 www.aosmd.com 0.001 0.01 0.1 1 10 Pulse Width (s) Figure 12: Single Pulse Power Rating Junction-toCase (Note F) Page 4 of 7 AOD7S60/AOU7S60 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS Zθ JC Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC RθJC=1.5°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0.1 0.01 Single Pulse 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 Pulse Width (s) Figure 13: Normalized Maximum Transient Thermal Impedance (Note F) 100 8 Current rating ID(A) EAS(mJ) 80 60 40 20 0 6 4 2 0 25 50 75 100 125 TCASE (°C) Figure 14: Avalanche energy Rev0: Aug 2011 150 175 0 www.aosmd.com 25 50 75 100 125 TCASE (°C) Figure 15: Current De-rating (Note B) 150 Page 5 of 7 AOD7S60/AOU7S60 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 400 TA=25°C Power (W) 300 200 100 0 0.01 0.1 1 10 100 Pulse Width (s) Figure 16: Single Pulse Power Rating Junction-to-Ambient (Note G) 1000 Zθ JA Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA RθJA=55°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0.1 0.01 0.001 Single Pulse 0.0001 0.001 0.01 0.1 1 10 100 1000 10000 Pulse Width (s) Figure 17: Normalized Maximum Transient Thermal Impedance (Note G) Rev0: Aug 2011 www.aosmd.com Page 6 of 7 AOD7S60/AOU7S60 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC DUT - Vgs Ig Charge Res istive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs + VDC 90% Vdd - Rg 10% Vgs Vgs t d(on) tr t d(off) t on tf t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L EAR= 1/2 LI Vds 2 AR BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Tes t Circuit & Waveforms Qrr = - Idt Vds + DUT Vgs Vds - Isd Vgs Ig Rev0: Aug 2011 L Isd + VDC - IF trr dI/dt IRM Vdd Vdd Vds www.aosmd.com Page 7 of 7