V24N2 - JULY

July 2014
I N
T H I S
I S S U E
build your own high
performance portable DC
bench power supply 12
battery charging controller
actively finds true
maximum power point in
solar power applications
21
wireless precision
temperature sensor powers
itself, forms own network
26
Volume 24 Number 2
Fractional-N PLL with Integrated
6GHz+ VCO Delivers Fractional-N
Benefits without Complexity or
Performance Downsides
Michel Azarian
Fractional-N synthesizers tempt with a number of advantages
over integer-N synthesizers, including frequency agility and overall
phase noise performance. Even in light of these advantages, PLL
system designers rarely yield to the temptation—complex design,
poor spurious performance, and delta-sigma modulator noise
are generally accepted
downsides of using
fractional-N synthesizers—but
the LTC6948 gives system
designers the benefits of
fractional-N PLLs without the
drawbacks. Unlike typical
fractional-N synthesizers, this
device is easy to use and
yields spurious and noise
performance on par with
integer-N synthesizers.
The LTC6948 integrates a high end 6GHz-plus
VCO in its 4mm × 5mm package, shrinking the size of the PLL system. Furthermore,
PLL system design with the LTC6948 is
LTC®3350 supercapacitor charger and backup controller ensures uninterrupted power in the event of a
Caption
main
power failure (see page 2).
w w w. li n ea r.com
(continued on page 4)
Linear in the News
In this issue...
COVER STORY
Fractional-N PLL with Integrated 6GHz+
VCO Delivers Fractional-N Benefits without
Complexity or Performance Downsides
Michel Azarian
1
NEW POWER PRODUCTS LAUNCHED
DESIGN FEATURES
Two significant new power management products were announced in May in
press meetings in key locations worldwide: the LTC3350 supercapacitor charger
and backup controller, and the LT®8620 2A, 65V synchronous step-down regulator.
High Performance Portable DC Bench Power Supply:
Save Money and Free Up Bench Real Estate by
Building Your Own
LTC3350 Supercapacitor Charger and Backup Controller
Keith Szolusha
12
80V Buck-Boost Lead-Acid and Lithium Battery
Charging Controller Actively Finds True Maximum
Power Point in Solar Power Applications
Tage Bjorklund
21
DESIGN IDEAS
What’s New with LTspice IV?
Gabino Alonso
24
Wireless Precision Temperature Sensor Powers Itself,
Forms Own Network, Enabling Easy Deployment
in Industrial Environments
Kris Lokere
26
Dual Phase Buck Controller Drives High Density
1.2V/60A Supply with Sub-Milliohm DCR Sensing
Mike Shriver
32
DC Accurate Driver for 20-Bit SAR
ADC Achieves 2ppm Linearity
Guy Hoover
The LTC3350 includes all of the features necessary to provide a complete, standalone capacitor-based backup power solution. It is ideal for applications requiring
reliable, short-term uninterrupted power in the event of a main power failure.
Examples include data backup for solid state drives, power fail alarms in medical and industrial applications, as well as other dying gasp power fail indicators.
The LTC3350 incorporates all PowerPath™ control, capacitor stack charging
and balancing, and capacitor health monitoring circuitry necessary to provide a
complete, high reliability backup system. The device can charge and monitor a
series stack of one to four supercapacitors. The device’s synchronous step-down
controller drives N-channel MOSFETs for constant current/constant voltage charging, and can run in reverse as a step-up converter to deliver power from the
supercapacitor stack to the backup supply rail. Internal balancers eliminate the
need for external balance resistors and each capacitor has a shunt regulator for
overvoltage protection. All system currents and voltages as well as stack capacitance and ESR are accurately measured using an internal 14-bit ADC and can be
read back via I2C interface. Operating parameters such as capacitor charging
voltage can be programmed via I2C to optimize system lifetime and performance.
LT8620 Wide Input Voltage Range Synchronous Step-Down Regulator
34
Complete Single IC Power Management Battery
Maintenance/Backup System for 48V Supplies
Jay Celani
36
new product briefs
39
back page circuits
40
The LT8620 is the first synchronous high voltage step-down regulator with
an input voltage range of 3.4V to 65V, delivering up to 2A to voltages as low
as 0.97V. Applications in automotive and commercial vehicles demand power
management ICs with increasingly high performance. For example, automotive (12VNOM) or commercial vehicle (24VNOM) applications running from the
battery bus require a well regulated output voltage such as 3.3V, since the
input voltage can swing from 3.5V in a cold crank or stop/start scenario up
to 65V in a load dump scenario. High efficiency is a priority, with a focus
on minimizing thermal design considerations while maximizing battery run
time in hybrid and electric vehicles. For always-on automotive applications
such as security, navigation, safety and environmental control, minimal quiescent current is critical to avoid draining the battery when the car is idle.
The LTC8620’s internal synchronous rectification delivers efficiencies as high as
94%, eliminating the need for heat sinks, and Burst Mode® operation requires
2 | July 2014 : LT Journal of Analog Innovation
Linear in the news
only 2.5µ A of quiescent current, reducing
battery drain associated with always-on
systems. The LT8620’s minimum on-time of
30ns enables stepping down from 32V to
2V with a switching frequency of 2MHz.
The device operates with only 250mV (at
1A) of dropout under all conditions, ideal
for applications that must withstand cold
crank or soft-start operating conditions.
AWARDS
Boeing Performance Excellence Award
The Boeing Company presented Linear
Technology with a Gold Performance
Excellence Award for superior supplier
performance over the past year.
Olympus Best Analog IC Supplier Award
Olympus Medical Systems Corporation
honored Linear Technology with its Best
Analog IC Supplier Award “for a great
contribution to product development over
the years.”
CISPR 25 Class 5 limit. Even with switching
frequencies in excess of 2MHz, synchronous rectification delivers efficiency as
high as 96% while Burst Mode operation
keeps quiescent current under 2.5µ A in
no-load standby conditions. This makes it
well suited for applications such as automotive “always-on” systems, which need
to extend operating battery life. Its 3.4V to
42V input voltage range makes it ideal for
automotive and industrial applications.
CONFERENCES & EVENTS
LTspice® World Circuit—Join Arrow Electronics
and Linear Technology for a free halfday seminar with Mike Engelhardt
for both advanced and new users of
LTspice. Gain the knowledge to successfully simulate circuit designs and
predict circuit behavior for faster, more
efficient designs. Offered at multiple
locations in the U.S., Europe and Asia,
July through September. Schedule &
info at secure.effreg.com/r/ltspice2014
Free LTspice IV download at
www.linear.com/solutions/LTspice.
Techno Frontier, Power System Japan 2014,
Tokyo Big Sight, Tokyo, Japan, July 23-25,
Booth 1F-301—Linear will exhibit power
system management, battery management systems and LTspice IV.
More info at www.jma.or.jp/tf/en.
The Battery Show/Electric & Hybrid Vehicle
Tech Expo, Suburban Collection Showcase,
Novi, Michigan, September 16-18, Booth
920—Presenting Linear’s battery
management system products. More
info at www.thebatteryshow.com.
ECN Impact Awards
Winner, Best Integrated Circuit: LTC2378-20—The
LTC2378-20 is a 20-bit, 1Msps no latency
SAR ADC with industry leading 0.5ppm
integral nonlinearity error (INL). A true
20-bit ADC, the LTC2378-20 is able to
resolve down to 5µV of resolution on a
5V differential input span. The device is
the first 20-bit SAR ADC offering extremely
stable ±0.5ppm (typical) INL error with
a guaranteed specification of 2ppm
(maximum) over temperature, making
it the most accurate ADC in the industry.
Applications include seismic monitoring, energy exploration, airflow sensing,
silicon wafer fabrication, medical devices,
data acquisition systems, automatic test
equipment, compact instrumentation
and industrial process control systems.
Finalist, Power Sources Category: LT8614—The
LT8614 Silent Switcher™ is a 4A, 42V input
capable synchronous step-down switching
regulator that reduces EMI/EMC emissions by more than 20dB, well below the
The LTC2378-20 20-bit
no-latency serial SAR
ADC was named Best
Integrated Circuit by
ECN magazine. A true
20-bit ADC, it features
1Msps throughput and
0.5ppm INL.
July 2014 : LT Journal of Analog Innovation | 3
The LTC6948 borrows the high performance phase/frequency
detector and VCO from the LTC6946, and adds an 18-bit delta-sigma
modulator to the mix to create a world-class fractional-N PLL.
would require a very small phase/frequency detector rate, fPFD(INT_N), where
easy with the help of FracNWizard™,
a free and sophisticated fractional-N
PLL design and simulation tool.
fPFD(INT _N) = fSTEP(INT _N) • O
Often, in these situations, fPFD is too small
to be practically feasible, but even if it
were possible, the in-band phase noise
floor, LM(OUT), becomes prohibitively high:
WHO NEEDS A FRACTIONAL-N PLL?
The LTC6946 integer-N PLL (LT Journal
of Analog Innovation, January 2012)
produces a PLL output frequency,
fLO(INT_N), that is related to the reference frequency, fREF, as follows:
fLO(INT _N) =
L M(OUT) =
f 
L M(NORM) + 10 • log10 ( fPFD ) + 20 • log10  LO 
 fPFD 
fREF N
•
R
O
where R is the reference input divide
value, N is the VCO feedback divide
value, and O is the output divide value.
Figure 1. Simplified
LTC6946 block diagram
with external reference
clock and loop filter
fREF
LM(NORM) is fixed for the PLL, so this
means that for the same desired fLO, the
in-band phase noise floor degrades by
−10 • log10 (fPFD). In other words, smaller
fPFD frequencies make the in-band phase
noise floor worse. Figure 2 plots the last
equation for an fLO of 6.236GHz while
varying fPFD from 10kHz to 100MHz
fPFD
PFD
ICP(UP)
ICP(DN)
÷N
LOOP FILTER
CP
÷O
4 | July 2014 : LT Journal of Analog Innovation
RZ
CI
VCO
fLO
−100
−110
LM(NORM) = −225dBc/Hz
−120
100k
1M
10k
fPFD (Hz)
10M
100M
and assuming LM(NORM) = –225dBc /
Hz, the typical normalized constant
for the LTC6948 in fractional mode.
CHARGE PUMP
÷R
−90
Combining the two fPFD terms:
LTC6946
OCXO
−80
Figure 2. In-band phase noise floor of a PLL at a
fixed fLO vs fPFD
L M(NORM) + 20 • log10 ( fLO ) − 10 • log10 ( fPFD )
The LTC6946 delivers excellent overall performance, but certain applications require
that fLO is moved in small frequency steps,
fSTEP(INT_N), or fine-tuned to track a certain
frequency with high resolution. Trying to
fit an integer-N PLL into such applications
−70
where LM(NORM) is the normalized
in-band phase noise floor of the PLL.
L M(OUT) =
Figure 1 shows the LTC6946’s simplified block diagram together with the
loop filter required to stabilize the loop
and an OCXO driving its reference.
−60
IN-BAND PHASE NOISE FLOOR (dBc/Hz)
(LTC6948, continued from page 1)
V_TUNE
Figure 2 shows that fPFD needs to be
as high as possible, but it is strongly
limited by fSTEP(INT_N), the frequency
step size in an integer-N PLL.
Fractional-N PLLs decouple this strong
relationship between fSTEP and fPFD.
Fractional-N PLLs allow for a much
smaller fSTEP than integer-N PLLs while
running at a much faster fPFD.
To further investigate the effect of fPFD on
the noise contribution of fLO to a communications channel, the phase noise is
integrated from 100Hz to 100MHz offset
on both sides of fLO = 6.236GHz using
practical LTC6948 settings in FracNWizard.
Figure 3 summarizes the results.
The integrated noise shown in Figure 3
relates directly to the signal-to-noise ratio
(SNR) of the communications channel.
design features
DOUBLE-SIDEBAND
100Hz TO 100MHz INTEGRATED NOISE (dBc)
The LTC6948 employs intelligent noise shaping techniques to minimize the in-band
noise contribution from the modulator. It boasts a normalized in-band phase noise floor,
LM(NORM), of –225dBc/Hz in fractional-N mode that compares well with its –226dBc/Hz
integer-N mode performance. These numbers place the LTC6948 among the PLL elites.
where NUM is the numerator programmed into the delta-sigma modulator internal to the LTC6948. Its value
can be any integer between 1 and
218 – 1 (or 262143), meaning 0 < F < 1
−25
−30
−35
−40
−45
−50
5
55
30
80
fPFD (MHz)
Figure 3. Double-sideband, 100Hz to 100MHz
integrated noise at fLO = 6.236GHz
Modern communications channels use
complex modulation schemes to maximize
data throughput, where an SNR of 40dB or
higher is common. Figure 3 shows that a
higher fPFD helps meet such requirements.
UNDER THE HOOD OF THE LTC6948
The LTC6948 borrows the high performance phase/frequency detector and
VCO from the LTC6946, and adds an
18-bit delta-sigma modulator to the mix
to create a world-class fractional-N PLL.
Figure 4 shows the block diagram of
the LTC6948 along with the loop filter
and an OCXO acting as its reference.
As mentioned above, fSTEP(FRAC_N) is small
relative to fSTEP(INT_N), despite fPFD(FRAC_N)
being typically larger than fPFD(INT_N).
This allows the designer to choose the
highest possible fPFD(FRAC_N) given fREF,
taking advantage of the lowered inband phase noise floor as shown in
Figure 2, then verifying that fSTEP(FRAC_N)
is small enough to provide the desired
frequency resolution at fLO(FRAC_N). The
following equation relates the step size
to the phase/frequency detector rate.
fSTEP(FRAC _N) =
fPFD(FRAC _N )
O•2
18
fSTEP(FRAC_N) is 218 times smaller than
fSTEP(INT_N) for the same fPFD. For example,
an fLO of 6.236GHz can be generated by
the LTC6948 with an fPFD of 50MHz resulting in outstanding in-band phase noise
floor with a frequency resolution of
190.7Hz (= fSTEP(FRAC_N)). That means the
LTC6948
For the LTC6948, fLO(FRAC_N) and
fREF are related as follows.
fLO(FRAC _N) =
F=
218
fREF
fREF N + F
•
R
O
F is the fractional value and is given by
NUM
OCXO
designer can hit any frequency within
the VCO range with a maximum error of
±(190.7/2 = 95.4Hz). A maximum error
of 95.4Hz out of ~6.236GHz is 0.015ppm
(parts per million) or 15ppb (parts per
billion), eclipsing the accuracy of virtually any reference clock. Using a larger
than one output divide value, O, further shrinks the absolute step size.
Employing a delta-sigma modulator to
perform the fractionalization function
in a PLL is the preferred method, because
a delta-sigma modulator provides high
resolution (such as the 218 steps possible
with the LTC6948) while intelligently
shaping the quantization noise. In other
words, the in-band quantization noise is
lowered at the expense of higher outof-band noise. The out-of-band noise
is easy to filter out with the help of the
passive components shown in Figure 4.
As is shown in the “Design Example:
Doppler Radar” below, determining the
values of these components is straightforward using the FracNWizard software.
CHARGE PUMP
fPFD
÷R
LOOP FILTER
PFD
ICP(UP)
ICP(DN)
∆∑
÷ (N + F)
L1
R1
C2
CP
RZ
CI
VCO
Figure 4. Simplified
LTC6948 block
diagram with external
reference clock and
loop filter
÷O
V_TUNE
fLO
July 2014 : LT Journal of Analog Innovation | 5
A fractional-N PLL has three types of spurious products at its output: reference spurs,
integer boundary spurs and fractionalization spurs—troublesome spurs that are
unpredictable. The LTC6948 has absolutely no fractionalization (or delta-sigma) spurs.
DON’T PAY THE USUAL PRICE FOR
FRACTIONALIZATION
Adding a delta-sigma modulator to a
PLL can have serious drawbacks, including poor spurious performance (the most
significant), delta-sigma modulator noise
and design complexity. This is not the case
with the LTC6948, as discussed below.
Spurious Performance Overview
A fractional-N PLL has three types of
spurious products at its output.
1.Reference spurs
2.Integer boundary spurs
3.Fractionalization spurs
Troublesome spurs are those that are
unpredictable. If the location and magnitude of a spur are known, the system
designer can either avoid it, or ensure
that it does not corrupt the integrity of
the system. If the spur’s location and
magnitude are random, the designer
is left with few good options.
Low Reference Spurs of the LTC6948
Reference (or PFD) spurs are predictable and exist in integer-N PLLs as
well. These are located at exactly
fPFD and its harmonics away from
fLO, centered at fLO. The LTC6948 has
excellent reference spur performance.
Figure 5 shows the typical performance
of the LTC6948 at a ~2.3GHz output.
6 | July 2014 : LT Journal of Analog Innovation
Figure 5. LTC6948 fPFD spurs for fLO = 2.378GHz
0
−20
−40
POUT (dBm)
The delta-sigma modulator inside
the LTC6948 can be shut down, making it run as an integer-N PLL.
RBW = 100Hz
VBW = 100Hz
INTN = 0
CPLE = 1
O=2
fLO = 2377.73MHz
fREF = 61.44MHz
fPFD = 61.44MHz
LOOP BW = 180kHz
−60
−80
−91dBc
−78dBc
−78dBc
−96dBc
−100
−120
−140
−246 −184 −123−61.4 0 61.4 123 184 246
FREQUENCY OFFSET (MHz IN 10kHz SEGMENTS)
Figure 5 shows that with the LTC6948
set to fractional-N mode and generating
an fLO of 2.378GHz, the output spectrum
contains reference spurs offset from
fLO by 61.44MHz (fPFD), and by the harmonics of fPFD. The LTC6948 reference
spurs are relatively low in magnitude
compared to other devices. Even the most
significant spur, 121.88MHz offset from
fLO, is inconsequential—it is too low in
energy and too far from fLO to cause
harm in most real-world applications.
Low and Predictable Integer Boundary
Spurs
Integer boundary spurs are physical
phenomena inherent to fractional-N PLLs.
The VCO output intermodulates with the
fPFD harmonics to create beat frequencies.
These beat frequencies appear as spurs
around fLO only when they are within
or near the passband of the loop bandwidth, BW, of the PLL. In other words,
when F is extremely close to 0 or 1, these
spurs are not attenuated by the loop
filter and show up in the spectrum of the
PLL output. Figure 6 illustrates this with
measurements taken using the LTC6948.
As F shifts away from 0 or 1, the integer boundary spurs are attenuated by
the loop filter. As F approaches 1/2, 1/3,
1/4, etc., a similar mechanism is in place
but at an exponentially lesser extent, so
the main integer boundary spurs occur
when fPFD • F < BW or fPFD • (1-F) < BW.
In most situations, with careful choice
of fREF, and possibly using more than
one fPFD and/or fREF, a system designer
can avoid these spurs, since their
position is known beforehand.
Better yet, and in a good portion of
applications, the LTC6948’s integer boundary spur levels (a maximum of –60dBc
in the example shown in Figure 6) are
so low that they are likely to be below
the channel integrated noise in the system. A –40 to –50dBc double-sideband
integrated noise in a communications
channel is typically considered high end
performance, meaning that a maximum
of –60dBc spur is still at least 10dB below
the channel noise and should not interfere
with the overall system performance.
The reduced levels of integer-boundary
spurs in the LTC6948, and even unfiltered inside the loop bandwidth, gives
it a competitive advantage over other
fractional-N PLLs whose integer-boundary
spurs often dominate the channel energy.
design features
Figure 6. LTC6948 integer boundary spurs for fLO = 2.365GHz
(F = 0.00043) to fLO = 2.378GHz (F = 0.4)
PHASE NOISE (dBc/Hz)
–50
–75
–100
–125
No Fractionalization Spurs
Easy Design
The radar application described below
under “Design Example: Doppler Radar”
outlines how simple it is to design-in the
LTC6948 with FracNWizard software.
The LTC6948 does not use a labyrinth
of modes, instead using a straightforward design process. All LTC6948
specifications are readily achievable.
PHASE NOISE (dBc/Hz)
The LTC6948 employs intelligent noise
shaping techniques to minimize the
in-band noise contribution from the
modulator. It boasts a normalized inband phase noise floor, LM(NORM), of
–225dBc /Hz in fractional-N mode that
compares well with its –226dBc /Hz integerN mode performance. These numbers
place the LTC6948 among the PLL elites.
1k
10k
100k
fOFFSET FROM fLO (Hz)
1M
10M
10k
100k
fOFFSET FROM fLO (Hz)
1M
10M
10k
100k
fOFFSET FROM fLO (Hz)
1M
10M
10k
100k
fOFFSET FROM fLO (Hz)
1M
10M
–50
–75
–100
–125
F = 0.0084
–150
1k
–50
PHASE NOISE (dBc/Hz)
Delta-Sigma Noise
F = 0.00043
–150
–75
–100
–125
F = 0.024
–150
1k
–50
PHASE NOISE (dBc/Hz)
The LTC6948 does not have unpredictable fractionalization spurs, which
infest most other fractional-N devices
on the market. The stress of dealing
with unpredictable spurs is removed
from the LTC6948 equation.
–75
–100
–125
F = 0.4
–150
1k
July 2014 : LT Journal of Analog Innovation | 7
The reference clock can be the most expensive component in the system.
Proper and careful selection of the PLL IC avoids degrading the close-in phase
noise, ideally dominated by the reference clock. Often overlooked, the 1/f (or
flicker) noise of the PLL IC is an important specification that could degrade
the close-in phase noise and negatively affect the in-band phase noise.
VCO CALIBRATION TIME
3.0
The LTC6948 uses multiple internal
VCO sub-bands to cover its entire output
frequency range. Each time the LTC6948 is
powered up or its frequency is changed,
it must be communicated to the IC so
it can run an internal search algorithm
to apply the correct VCO sub-band.
2.9
VCO calibration time should be minimized
to limit the PLL lock time. Frequency
hopping applications, for example,
benefit from fast overall lock times. The
LTC6948 can complete its VCO calibration in a little over 10µs as shown in
Figure 7. That’s a full order of magnitude
faster than most alternative devices.
THE OFTEN HIDDEN BUT
ALL-IMPORTANT 1/F NOISE
The reference clock can be the most
expensive component in the system. Proper
and careful selection of the PLL IC avoids
degrading the close-in phase noise, ideally
dominated by the reference clock. Often
overlooked, the 1/f (or flicker) noise of
the PLL IC is an important specification
that could degrade the close-in phase
noise and negatively affect the in-band
phase noise. For instance, Figure 8 shows
how the 1/f noise corrupts the in-band
phase noise when the 1/f noise corner is
elevated. Figure 8 assumes a normalized
in-band phase noise floor of –225dBc /Hz.
Figure 8 reveals a fact of PLLs that most
vendors choose to hide. It shows the
strong effect of 1/f noise on the in-band
phase noise floor. Even if a PLL IC claims
to have an impressive normalized in-band
phase noise floor (also known as the figure
8 | July 2014 : LT Journal of Analog Innovation
−60
CALIBRATION TIME
−70
PHASE NOISE (dBc/Hz)
FREQUENCY (GHz)
2.8
2.7
2.6
2.5
126MHz STEP
fPFD = 61.44MHz
fCAL = 1.28MHz
LOOP BW = 180kHz
MTCAL = 0
2.4
2.3
2.2
–5
0
5
10
15
TIME (µs)
20
−80
−90
−100
−110
−120
−130
−140
100
25
1/f NORM = −274
1/f NORM = −264
1/f NORM = −254
1/f NORM = −244
1k
10k
100k
1M
fOFFSET FROM 6.236GHz LO (Hz)
10M
Figure 7. Typical LTC6948 VCO calibration time
Figure 8. The effect of different normalized in-band
1/f phase noise specifications on the close-in and
in-band phase noise performance
of merit), it is likely that the same part
lacks 1/f noise performance, devaluing
the in-band phase noise specification.
challenging the best 100MHz crystal
oscillators available on the market.
The LTC6948 features an impressive –274dBc /Hz normalized in-band
1/f noise specification (normalized
with respect to 1Hz offset from an
fLO of 1Hz), which is equivalent to a
–134dBc /Hz phase noise level for a 100MHz
reference clock at an offset of 100Hz,
The following formula shows how to convert the normalized 1/f number (L1/f) to an
offset phase noise value, LOUT(1/f)(fOFFSET),
offset by fOFFSET from a certain fLO.
L OUT(1/f) ( fOFFSET ) =
L 1/f + 20 • log10 ( fLO ) − 10 • log10 ( fOFFSET )
Table 1. LTC6948 output frequency options
VCO OUTPUT
DIVIDER
FREQUENCY RANGE (GHz)
LTC6948-1
LTC6948-2
LTC6948-3
LTC6948-4
O_DIV = 1
2.240 to 3.740
3.080 to 4.910
3.840 to 5.790
4.200 to 6.390
O_DIV = 2
1.120 to 1.870
1.540 to 2.455
1.920 to 2.895
2.100 to 3.195
O_DIV = 3
0.747 to 1.247
1.027 to 1.637
1.280 to 1.930
1.400 to 2.130
O_DIV = 4
0.560 to 0.935
0.770 to 1.228
0.960 to 1.448
1.050 to 1.598
O_DIV = 5
0.448 to 0.748
0.616 to 0.982
0.768 to 1.158
0.840 to 1.278
O_DIV = 6
0.373 to 0.623
0.513 to 0.818
0.640 to 0.965
0.700 to 1.065
design features
Doppler radar applications exemplify why 1/f noise performance can be crucial. Doppler
radar relies on detecting small frequency shifts inflicted on an incident frequency when
reflected by a moving object. The 1/f noise performance of the LTC6948 allows the
requisite dynamic range at a 186Hz offset, increasing the chances of locating the
10mph moving object. Because the reflected signal is strongly attenuated, sufficient
dynamic range in the radar receiver is key to properly deciphering the signal.
DESIGN EXAMPLE: DOPPLER RADAR
Doppler radar applications exemplify
why 1/f noise performance can be crucial.
Doppler radar relies on detecting small
frequency shifts inflicted on an incident
frequency when reflected by a moving
object. The frequency shift, Doppler shift,
of a reflected electromagnetic wave, fD,
on an incident frequency, fLO, is related
to the velocity of the moving object, v,
and the speed of light, c, as follows:
fD = 2 • v •
fLO
c
Modern uses of Doppler radar include
tracking slowly moving objects in surveillance applications. A moderately
paced object that is moving at 10mph
creates an fD of only 186Hz (assuming
c = 671 • 106mph) for an fLO = 6.236GHz.
As shown in Figure 8, the 1/f noise
performance of the LTC6948 allows the
requisite dynamic range at a 186Hz
offset, increasing the chances of locating
the 10mph moving object. Because the
reflected signal is strongly attenuated, sufficient dynamic range in the radar receiver
is key to properly deciphering the signal.
Even detection of significantly faster
objects benefits from the lower 1/f
noise performance of the LTC6948 and
its excellent in-band phase noise floor.
For instance, a body moving at 200mph
has an fD = 3.72kHz if fLO = 6.236GHz.
Figure 9. The FracNWizard tool determines design parameters for fLO = 6.236GHz using the LTC6948
1. Choose Loop Design
2. Choose the LTC6948-4
3. Enter the reference frequency
4. Enter the desired fLO
5. Click Compute Params
6. Choose Filter 3
7. Click Design Filter
8. Populate the circuit with practical
versions of the Component Values
shown
July 2014 : LT Journal of Analog Innovation | 9
Even detection of significantly faster objects benefits from the lower 1/f noise
performance of the LTC6948 and its excellent in-band phase noise floor. For instance,
a body moving at 200mph has an fD = 3.72kHz if fLO = 6.236GHz. A radar system
equipped with the LTC6948 allows for the best dynamic range at 3.72kHz offset.
1.6nF
10µH
76.8Ω
76.8Ω
2.4nF
1µF
Figure 10. The LTC6948-4 circuit with the calculated loop filter components
1µF
56nF
0.01µF
0.01µF
1µF
3.3V
0.1µF
GND
VVCO+
CP
VCP+
VREF+
68nH
68nH 100pF
VRF+
3.3V
0.1µF
BB
3.3V
RF+
0.1µF
LTC6948-4
RF–
SPI BUS
GND
51.1Ω
GND
REF–
1µF
REF+
STAT
CS
SCLK
SDI
SDO
LDO
VD+
MUTE
100MHz
5V
15Ω
0.1µF 3.3V
BVCO
GND
CMA
CMB
CMC
GND
TB
TUNE
3.3V
2.2µF
1µF
R = 2, fPFD = 50MHz
N = 84 TO 127.8
LOOP BW = 169kHz
O=1
0.01µF
100pF
fLO = 4200MHz TO 6390MHz IN 190.7Hz STEPS
Figure 8 reveals that a radar system
equipped with the LTC6948 allows for the
best dynamic range at 3.72kHz offset.
Now that we’ve seen that the performance
of the LTC6948 meets the requirements of
Doppler radar applications, let’s look at
the nuts and bolts of the design process.
Picking the PLL
To design a PLL for the Doppler radar
application, where fLO is 6.236GHz, choose
the version of the LTC6948 that operates at that frequency. Table 1 shows
the four available LTC6948 options.
The LTC6948-4 includes a VCO that
delivers the desired fLO of 6.236GHz.
10 | July 2014 : LT Journal of Analog Innovation
Designing the PLL
Download FracNWizard at
www.linear.com/FracNWizard and install.
The design presented here assumes a
100MHz reference clock—demonstration
circuit DC1216A-D from Linear Technology
can perform this task. Using FracNWizard
(see Figure 9) choose the LTC6948-4, enter
the design goals and determine the components required to complete the design.
Update the FracNWizard filter component values with the practical values of
the passive components. As illustrated in
Figure 11, FracNWizard predicts the phase
noise performance of the LTC6948-4 at the
desired 6.236GHz. It shows how the reference phase noise affects the total output
noise, helping you choose the reference
clock. FracNWizard also shows how the
shaped delta-sigma modulator noise is
filtered with the use of the passive filter.
Simulating and Building the PLL
Demonstration circuit DC1959A-D makes
a good starting point. Take the filter
component values as determined by
FracNWizard (sidebar) and replace components on the DC1959A-D as needed with
practical value components. Figure 10
shows the schematic of the 6.236GHz circuit with practical filter component values.
Evaluating the PLL
Apply power to the DC1959 and connect it
to a PC via demonstration circuit DC590, a
USB serial controller available from Linear
Technology. Apply the 100MHz reference
clock source to the DC1959 and follow the
instructions given in the DC1959 demonstration circuit manual at www.linear.com.
design features
The LTC6948 fractional-N PLL offers the benefits of fractionalization, including frequency
agility and overall reduced in-band phase noise, without the usual downsides associated
with fractional-N PLLs. Design is simplified by free FracNWizard software, and published
specifications, although impressive, are conservative and readily attainable.
−90
PHASE NOISE (dBc/Hz)
−100
−110
−120
−130
−140
−150
RMS Noise = 0.412°
RMS Jitter = 183fs
fPFD = 50MHz
O=1
Loop BW = 169kHz
−160
100
1k
10k
100k
fOFFSET (Hz)
1M
10M 40M
Figure 12. Measured results of fLO = 6.236GHz
at the output of the LTC6948-4
Figure 11. FracNWizard simulation results for fLO = 6.236GHz
Verify the phase noise of our example
fLO by connecting the output of the
DC1959 to a signal source analyzer,
the E5052A from Agilent in this case.
Figure 12 shows the result, which
aligns closely with the calculated
FracNWizard results shown in Figure 11.
That’s it. The fractional-N PLL system design is complete.
CONCLUSION
The LTC6948 fractional-N PLL offers the
benefits of fractionalization, including
frequency agility and overall reduced
in-band phase noise, without the usual
downsides associated with fractionalN PLLs. Design is simplified by free
FracNWizard software, and published
specifications, although impressive, are
conservative and readily attainable. n
July 2014 : LT Journal of Analog Innovation | 11
High Performance Portable DC Bench Power Supply:
Save Money and Free Up Bench Real Estate by
Building Your Own
Keith Szolusha
The bench power supply, along with the soldering iron and
handheld multimeter, is a required item in any electronics
lab toolbox. Some projects require only a single, constant
voltage supply, but more often, properly testing and
debugging a project demands a variety of voltages and
currents. Significant debugging time can be saved by
using a high performance adjustable bench supply to
dial in voltage and current at will. Unfortunately, typical
universal adjustable bench power supplies are bulky and
expensive—at least the better-performing versions—and
have a number of limitations. None are truly portable
(handheld) due to necessary heat dissipation structures.
Furthermore, even high cost supplies do not support zero
current or voltage, and cannot match the transient and
short performance exhibited by the supply shown here.
Linear Technology’s demonstration circuit
DC2132A is a high performance, compact,
efficient DC bench supply
Save money and free up benchtop space
by building your own high quality bench
power supply. The key component to
this supply is the LT3081 linear regulator
surrounded by a short list of easy-to-get
components (see Figure 1). The LT3081’s
unique current-source reference and
voltage-follower output amplifier make it
possible to connect two linear regulators
in parallel for up to 3A and over 24V of
adjustable current and voltage output
control. Linear regulators at the output
suppress output ripple without requiring large output capacitors, resulting in
a truly flat DC output and small size.
In the supply shown here, parallel LT3081s
are preceded by a high performance,
IMON TOTAL CURRENT
MONITOR OUTPUT
0V–24V CONSTANT VOLTAGE
0A–3A CONSTANT CURRENT
1-TURN (OR 10-TURN) POTENTIOMETERS
FOR OUTPUT VOLTAGE AND OUTPUT
CURRENT ADJUSTMENT
TEMPERATURE
MONITOR
OUTPUTS
LTC3632
−5V, −8mA SUPPLY
FOR 0V OPERATION
JUMPER FOR ADJUSTING VOUT MAXIMUM
RESISTOR WITH JUMPER FOR VIN = 12V,
24V OR 36V TO MAXIMIZE TURNS OF
POTENTIOMETER
ON/OFF
LED ON INDICATOR
12 | July 2014 : LT Journal of Analog Innovation
10V–40V INPUT
design features
The key component to the supply is the LT3081 linear regulator surrounded by a short
list of easy-to-get components. The LT3081’s unique current-source reference and
voltage-follower output amplifier make it possible to connect two linear regulators
in parallel for up to 3A and over 24V of adjustable current and voltage output
control. Linear regulators at the output suppress output ripple without requiring
large output capacitors, resulting in a truly flat DC output and small size.
synchronous step-down converter, in this
case, the 40V, 6A LT8612. No heat sink or
fan is required, in direct contrast to linear
bench supplies featuring power transistors
that require heat sinks and forced airflow
(fans) to sufficiently dissipate the heat.
The LT8612 efficiently steps down 10V to
40V at high or low current to a dynamically adaptive output voltage, which
remains just above the output voltage
of the bench power supply (output of
the LT3081 linear regulator). The output
of the LT8612 is low ripple and conversion is efficient over the full range of
the bench supply. Power loss across the
LT3081 devices is minimized by keeping their input just above dropout. This
bench supply includes the uncommon
ability to adjust both the voltage and
current limit down to zero. A complete schematic of this mixed-mode
DC bench supply is shown in Figure 2.
with a minimal efficiency hit. The parallel
LT3081 linear regulators shown in Figures
1 and 2 knock down the output ripple of
the LT8612 and accurately control constant
voltage and constant current output of the
power supply. The LT3081 has the unique
ability (for linear regulators) to be easily
paralleled for higher output currents.
PARALLEL LINEAR REGULATORS
STEADY OUTPUT, CONTROL
VOLTAGE AND CURRENT
Figures 1 and 2 show how two parallel LT3081s double the supported current of a single LT3081 (1.5A) to 3A.
A few parallel connections and two
small 10mΩ ballast resistors are all that
is needed to accurately share current
Linear regulators are commonly used at
the output of step-down converters to
suppress switching power supply ripple
−5V OUTPUT CONTROLLER
PULLS 8mA, ALLOWING LT3081s TO REGULATE TO ZERO VOLTS
VIN
LTC3632
SWITCHING REGULATOR
EFFICIENTLY STEPS-DOWN ANY 10V–40V INPUT TO VOUT + 1.7V
−5V
VOUT + 1.7V
VIN
VIN
BST
0.1µF
EN/UV
LT8612
INTVCC TR/SS
L1
5.5µH
IN
SW
BIAS
SET
FB
RT
1nF
1k
100k
700kHz
ISET
50µA
+
–
100k
VOUT
200Ω
VIN
LT3092
10mΩ
OUT
ILIM
LT3081
PNP
4.99k
8mA
CURRENT
LIMITED
VOUT
ILIM
ADJUST
ILIM
IN
SET
2.4mA
47.5k
ISET
50µA
+
–
OUT
10mΩ
LT3081
Figure 1. Block diagram of the mixedmode DC bench supply. The central
components are the parallel LT3081s,
which produce the low ripple output and
set the voltage and current limit.
CURRENT SOURCE
INSERTS 2.4mA INTO SET PIN OF LT3081 TO
SET ACCURATE VOUT REGARDLESS OF ISET
TEMPERATURE COEFFICIENT
VOUT
ADJUST
PARALLEL LINEAR REGULATORS
STEP-DOWN OUTPUT OF SWITCHING REGULATOR (VOUT + 1.7V) TO A NOISE-FREE VOUT
July 2014 : LT Journal of Analog Innovation | 13
The minimum current limit of the bench power supply is 0A. The LT3081
guarantees 0A output current as long as the ILIM resistor is reduced below
200Ω.The minimum output voltage of the bench power supply is 0V. The
LT3081 guarantees 0V output as long as there is 4mA pulled from the output.
between the two without a loss of output voltage accuracy. Readily available,
high quality 10k and 5k potentiometers
provide the control from 0V–24V and
0V–3A when connected to the SET pin
and ILIM pins. Potentiometers with more
turns and more accuracy can certainly
be used to fancy-up one’s bench supply.
The minimum current limit of the
bench power supply is 0A. The LT3081
guarantees 0A output current as long
as the ILIM resistor is reduced below
200Ω. A small 100Ω resistor is placed
in series with the ILIMIT potentiometer to maximize the turning range
and still guarantee zero current when
two regulators are used in parallel.
The minimum output voltage of the
bench power supply is 0V. The LT3081
guarantees 0V output as long as there is
4m A pulled from the output. The best
way to do this is to use a negative supply to pull 8m A for the two LT3081s. The
LTC3632 –5V regulator easily produces this
negative load, dissipates little power and
occupies only a tiny bit of board space.
Figure 2. Complete 0V–24V, 0A–3A DC bench supply
L2
470µH
VIN
10µF
50V
ON
S1
OFF
VIN
10V–40V
22µF
63V
+
10µF
50V
VIN
0.1µF
499k
EN/UV
LT8612
54.9k
5.1k
1nF
1k
1%
60.4k
700kHz
0.1µF
Q2
100k
1%
100k
1%
2.7k
LT3092
IN
10µA
+
–
SET
OUT
200Ω
1%
47.5k
11.3k
73.2k
JP1
COUT: EMZA350ADA101MF80G
D4: GREEN LED
L1: WÜRTH 744325550
L2: MURATA LQH32CN471K23L
Q1: SI2309CDS
Q2: CMST3904TR
Q3, Q4: MMBT3906
Q5: FMMT493
RI(LIM): BOURNS INC. 91A1A‐B28‐A13L
RV(OUT): BOURNS INC. 91A1A‐B28‐A15L
S1: PHILMORE 30‐10002B
VOUT(MAX)
5V
15V
24V
14 | July 2014 : LT Journal of Analog Innovation
280k
1%
0.01µF
8mA
Q5
10µF
50V
×3
+
–
LT3081
ILIM
TEMP
10k 1%
100Ω
IN
10k
3.92k
TEMP1
IMON
10mΩ
1%
OUT
10µF
50V
IMON
1k
1%
549Ω
ISET
50µA
SET
4.99k
1µF
50V
806k
IN
IMON
Q3
549Ω
ISET
10µF
50V
10µF
50V
×3
1k
1%
FB
TR/SS PGND GND RT
D4
Q1
5.1k
10µF
6.3V
−5V
COUT
100µF
35V
INTVCC
1µF
GND
10k
1.47M
VFB
VOUT + 1.7V
+
BIAS
SYNC
INTVCC
L1
5.5µH
SW
PG
RUN
1k
BST
LTC3632
Q4
INTVCC
SW
ILIM ADJUST
RI(LIM)
5k
ILIM
ISET
50µA
SET
+
–
0.01µF
LT3081
VOUT ADJUST
RV(OUT)
10k
10mΩ
1%
OUT
10µF
50V
×3
TEMP
TEMP2
10k 1%
B140
10k
VOUT
0V TO 24V
ILIMIT
0A TO 3A
1µF
50V
design features
Once target voltage is precisely dialed-in, you don’t want to see the bench
supply voltage drift as load is added, increased or decreased. Ideally, it should
maintain a flat regulation profile across the entire range of load currents up
to the current limit. The supply shown here fulfills this requirement.
FLAT LOAD REGULATION AND
SHARP VI CURVE
Once target voltage is precisely dialedin, you don’t want to see the bench
supply voltage drift as load is added,
increased or decreased. Ideally, it should
maintain a flat regulation profile across
the entire range of load currents up to
the current limit (Figures 3 and 4).
The supply shown here fulfills this
requirement. The LT3081 output remains
virtually flat from 0A to 1.5A. Minimum
IC heating helps keep load regulation of
the bench supply under 50mV for any
output voltage, as shown in Figure 3—
even with 15mV due to the 10mΩ ballast
resistors. A 1.7V drop across the linear
regulators while driving 1.5A produces
a mere 30ºC temperature rise with the
DD package, as shown in Figure 5.
Figure 3. DC bench supply V-I curve shows < 50mV load regulation from 0A to 3A, falling off a cliff above 3.1A.
25
Setting the current limit knob should be
just as deterministic as the voltage knob.
If the current limit is set to 3.0A, the
bench supply should enter current limit
at exactly 3.0A and never supply higher
current. A high performance bench supply
must demonstrate a voltage vs current
regulation curve that remains flat until
it drops off a cliff to 0V when the current limit is reached. Figure 4 shows that
Figure 4. Adjustable current limit moves the cliff of
Figure 3 to any value from 3.1A down to 0.0A.
25
25
24.8
24.6
20
20
ILIMIT
FUNCTIONS
DOWN TO 0A
10
24.2
VOUT (V)
15
VOUT (V)
VOUT (V)
24.4
24
23.8
15
0.5A
1.5A
ILIMIT = 3.15A
(FULL LIMIT)
10
23.6
5
0
23.4
VIN = 36V
VOUT = 24V
FULL ILIMIT
0
0.5
1
1.5
2
IOUT (A)
2.5
3
23
3.5
5.5
5.5
5
5.4
4.5
5.3
4
VOUT (V)
VOUT (V)
0
0.5
1
1.5
2
IOUT (A)
2.5
3
3.5
1
1.5
2
IOUT (A)
2.5
3
3.5
0
VIN = 36V
VOUT = 24V
0
0.5
1
1.5
2
IOUT (A)
2.5
3
3.5
5.2
3.5
3
2.5
2
5.1
5
4.9
4.8
1.5
4.7
VIN = 12V
VOUT = 5V
FULL ILIMIT
1
0.5
0
5
VIN = 36V
VOUT = 24V
FULL ILIMIT
23.2
0
0.5
VIN = 12V
VOUT = 5V
FULL ILIMIT
4.6
1
1.5
2
IOUT (A)
2.5
3
3.5
4.5
0
0.5
July 2014 : LT Journal of Analog Innovation | 15
The portable DC bench power supply can produce 0A–3A at any voltage between 0V
and 24V from an input voltage of 10V and 40V, with the input at least 5V above the
desired output voltage. The input can come from a front-end AC/DC converter, readily
available at 19V, 28V and 36V. It can also be a simple 24VAC transformer, a rectifier
bridge, and a 10mF capacitor that gives approximately 34V with 1V–2V of ripple.
the bench supply performs as desired,
regardless where the current limit is set.
SYNCHRONOUS STEP-DOWN
CONVERTER KEEPS OVERALL
EFFICIENCY HIGH
The portable DC bench power supply can produce 0A–3A at any voltage between 0V and 24V from an input
voltage of 10V and 40V, with the input
at least 5V above the desired output
voltage. The input can come from a
front-end AC/DC converter, readily available at 19V, 28V and 36V. It can also be
a simple 24VAC transformer, a rectifier
bridge, and a 10mF capacitor that gives
approximately 34V with 1V–2V of ripple.
The LT8612 step-down switching converter
portion of the power supply drops the
AC/DC front-end voltage (10V to 40V) down
to any voltage between 0V and just below
its input voltage. The low ripple output
of the LT8612-based converter is further
dropped by 1.7V across the parallel LT3081
linear regulator to the final regulated voltage, with nearly no ripple on the output.
High Efficiency Keeps it Cool
The LT8612 synchronous step-down easily
supports 3A and efficiently steps down to
outputs as low as 1.7V from inputs up to
40V, even at a relatively high switching
frequency, 700kHz, due to low minimum
on-time of 40ns. Efficiency is shown in
Figure 6. High efficiency at high switching frequency makes it possible to realize
a converter with a few small components that remain cool at high power.
Differential Feedback
The LT8612 uses a differential feedback
scheme, shown in Figures 1 and 2, to
regulate its output (the input to the LT3081
pair) to 1.7V above the bench supply
output (the output of the LT3081 pair).
The LT3081 works best when its input
is at least 1.5V above its output, with
1.7V used here as margin for transients.
Differential feedback continues to
operate during output transients and
Figure 5. Thermoscans of bench supply
in high power conditions and shortcircuit show that the DC bench supply
components remain cool without the
use of a heat sink or fan.
LT3081
FMMT493
LT3081
L1
LT8612
16 | July 2014 : LT Journal of Analog Innovation
VIN = 36V, VOUT = 24V, ILOAD = 3A
VIN = 36V, VOUT = 3.3V, ILOAD = 3A
VIN = 12V, VOUT = 5V, ILOAD = 3A
SHORT AT OUTPUT, VIN = 36V, ILIMIT = 3A
design features
One way to combat current drift is to use a higher current source to drive the
SET pin potentiometer. The LT3092 is an accurate current source that works
up to 40V and is used to drive an accurate 2.4mA for a 24V output with a
10k resistor. Its output current is easy to adjust with the change of the set
resistor value when a different maximum output voltage is needed.
voltage should be 5.5V when a 12V source
is used, 15V when a 24V source is used
and 24V when a 36V source is used. An
input switch is used in the circuit to cut
off the supply to the LT3092 when the
power switch is turned off. Disconnecting
this IC from VIN when the switch is
turned off prevents its constant current
from charging up an unloaded bench
supply output, saving engineers from
potentially damaging circumstances.
ACCURATE CURRENT SOURCE
COMBATS I SET TEMPERATURE
COEFFICIENT
short-circuits, as shown in Figures 7 and
8. When the output is shorted to GND,
the LT8612 output follows it to GND.
When the output is suddenly increased
with a release of the short or a change
in the potentiometer, the LT8612 follows
the rising output of the LT3081, striving
to stay 1.7V above the quickly changing
output. A reasonable-sized 100µ F output
capacitor is enough to provide stability to
the LT8612 over a wide range of conditions, while maintaining relatively fast
transient response, though it will never
move as fast as the linear regulators can.
The output voltage of the bench supply
is easily adjusted by hand with a potentiometer that is connected to the SET pins
of the LT3081 pair. It seems simple enough
that the SET pins each source 50µ A, and
that their sum current, multiplied by
an adjustable resistor, can generate the
proper output voltage with no additional components. Nevertheless, that
current may not be enough for a robust
bench power supply solution, since it
can drift a bit with LT3081 temperature.
This setup could be expanded to support 4.5A output current using three
parallel LT3081 linear regulators.
The switching regulator would need
no change, as the LT8612 features
6A peak switch current capability.
EASY TURN POTENTIOMETER
KNOBS FOR VOLTAGE AND CURRENT
The LT3081 SET and ILIM pin functions
make it easy to program the output
voltage and current to any level with the
simple turn of a potentiometer. Parallel
LT3081s share the same SET pin connection and voltage as well as the same ILIM+
and ILIM− pin connections. The 10k and
5k potentiometers are chosen to give
0V to 24V and 0A to 3A output ranges
(or slightly above for a little headroom.)
The potentiometers are easy to source
One way to combat the current drift is
to use a higher current source to drive
the SET pin potentiometer. The LT3092 is
an accurate current source that works
up to 40V and is used to drive an accurate 2.4m A for a 24V output with a 10k
resistor. Its output current is easy to
adjust with the change of the set resistor
value when a different maximum output
voltage is needed. The maximum output
Figure 6. Efficiency and power loss of DC bench supply for a various input and output conditions
90
EFFICIENCY
100
8
7
90
7
6
80
5
60
4
50
3
40
POWER
LOSS
30
20
VIN = 36V
0
0.5
1
1.5
2
ILOAD (A)
VOUT = 24V
VOUT = 18V
VOUT = 12V
VOUT = 5V
VOUT = 3.3V
2.5
3
3.5
70
5
60
4
50
3
2
40
1
30
0
6
EFFICIENCY
20
POWER
LOSS
VIN = 12V
0
0.5
1
1.5
2
ILOAD (A)
VOUT = 5V
VOUT = 3.3V
VOUT = 1.8V
2.5
3
3.5
POWER LOSS (W)
70
POWER LOSS (W)
EFFICIENCY (%)
80
8
EFFICIENCY (%)
100
2
1
0
July 2014 : LT Journal of Analog Innovation | 17
The bench supply shown features single-turn potentiometers with easy-to-turn
shafts and right angle PCB connections. The cermet element prevents time
and temperature drift with 150ppm/ºC rating versus the 1000ppm/ºC rating of
similar plastic element versions. Less expensive plastic potentiometers are still
excellent for use on a standard bench supply, or ten-turn precision potentiometers
can be used for very fine trimming of both voltage and current limits.
15µs
3A
IOUT
1A/DIV
3A
IOUT
1A/DIV
1A
VOUT
AC COUPLED
100mV/DIV
320mV
Figure 7. 5V, 1A to 3A output
transient response shows (a) low
output ripple and (b) LT8612 output
tracks LT3081 VOUT through a
transient.
and they can be selected from a range
of performance and cost parameters.
The bench supply shown in the photo
on page 12 features single-turn
potentiometers with easy-to-turn shafts
and right angle PCB connections. They
can be mounted on a side hole of a
box should you decide to enclose the
LT8612
VOUT(DC)
2V/DIV
VOUT(DC)
2V/DIV
50µs/DIV
(a)
(b)
PCB in a protective case. The cermet
element prevents time and temperature
drift with 150ppm/ºC rating versus the
1000ppm/ºC rating of similar plastic
element versions. Less expensive plastic potentiometers are still excellent
for use on a standard bench supply,
or ten-turn precision potentiometers
can be used for very fine trimming of
both voltage and current limits.
If VOUT drift due to ISET temperature
coefficient is not an issue, the LT3092
current source can be removed and
the 10k potentiometer can be replaced
by a 250k pot with similar quality.
10µs
3A
SPIKE
IOUT
1A/DIV
1.7V
50µs/DIV
400µs
Figure 8. 5V output (a) overload
transient and (b) short-circuit
transient are well tolerated by the
DC bench supply.
1A
40A SPIKE = COUT DISCHARGING
INTO SHORT
1.5A
1A
ISHORT
1A/DIV
LT8612
LT8612
VOUT(DC)
2V/DIV
VOUT(DC)
2V/DIV
1.7V
1.5A
VOUT(DC)
2V/DIV
VOUT(DC)
2V/DIV
1.7V
200µs/DIV
(a)
18 | July 2014 : LT Journal of Analog Innovation
200µs/DIV
(b)
design features
The most extreme overload condition is a short-circuit, which not only pushes the
output over the cliff, but all the way down to ground. The bench supply gracefully
maintains its current limit in short-circuit and regulates its LT8612 output to
1.7V, sourcing the limited current through the LT3081 and into the short.
NEGATIVE CONVERTER FOR 0V
REGULATION
Although it is trivial to turn the SET potentiometer down to 0V with a short to GND,
the LT3081 must have 4m A pulled out of
it to run down to 0V. A resistive preload
from VOUT to GND only pulls current when
VOUT is not equal to zero, so a negative
supply is used instead to sink current
from a 0V output. The LTC3632 negative
regulator is a small −5V source that draws
−8m A through a small resistor across
−5V and a VBE below ground (−0.6V).
Although the LTC3632 turns off when the
power switch is turned off, it continues to
run when the power is on even when the
output voltage is higher than 0V. Caution
must be used when choosing the negative
current transistor since −8m A • 24.6V drop
can be a significant source of heat if
the thermal impedance of the transistor is more than 250°C/W or the negative
current is increased to over −10m A.
SHORT-CIRCUIT AND 0A CONTROL
The LT3081 also provides 0A current limit
control regardless of the output voltage
setting. With its current knob turned all
the way up, the bench supply enforces
a sharp current limit at just about 3.1A.
If the load is increased above this point,
its voltage appears to fall off a cliff. A
simple turn of the knob moves that sharp
current limit cliff down to any other value
all the way to 0A, as shown in Figure 4.
The most extreme overload condition is
a short-circuit, which not only pushes
the output over the cliff, but all the way
down to ground. The bench supply gracefully maintains its current limit in shortcircuit and regulates its LT8612 output
to 1.7V, sourcing the limited current
through the LT3081 and into the short.
The results of a transient short-circuit
are shown in Figure 8, demonstrating the
short-circuit regulation of the IC and the
Figure 9. Transient results for pricey XH100-10 mixed-mode bench supply, which exhibits slow transient and shortcircuit response compared with the DC bench supply described in this article with similar settings (Figure 8).
6ms
short-lived output capacitor discharge
spike. The < 10µs short-circuit spike is
1/500 the duration of a commonly used
high power mixed-mode laboratory bench
supply (with similar settings) as shown
in Figure 9. The long-lasting discharge
spike shown in Figure 9 can potentially
harm test equipment, a disadvantage of
expensive, commonly used universal bench
supplies, due to low power transistor
speed and/or higher output capacitance.
MONITORING THE OUTPUT
Connect a multimeter or a simple analog display to the output to produce an
accurate voltage readout. Add another
multimeter or display in series with the
output for an accurate current readout.
If you want to avoid adding additional
sensing equipment in series with the
output, the IMON terminal can also be
used as a voltage-to-current conversion.
Sorenson XHR100-10 laboratory bench
supply in short-circuit with 1.5A limit
> 4ms
3A SPIKE
1.5A
IOUT
1A/DIV
VOUT(DC)
5V/DIV
40A SPIKE = COUT DISCHARGING
INTO SHORT
VOUT(DC)
2V/DIV
ISHORT
10A/DIV
TO 1.5A
1ms/DIV
500µs/DIV
(a)
(b)
July 2014 : LT Journal of Analog Innovation | 19
This DC power supply is a handy tool for generating a constant voltage
or current on-the-fly in the lab. Simply power it up with 10V–40V DC, turn
on the switch, and turn the knobs. Since they are small and inexpensive,
several of these portable bench supplies can be powered from the same DC
input source when multiple circuit outputs and currents are needed.
Figure 10. DC bench supply has low output
ripple for a mixed-mode supply with small
60µF COUT.
VOUT
AC COUPLED
10mV/DIV
< 20mV
LT8612
VSW
20V/DIV
2µs/DIV
This DC power supply is a handy tool for
generating a constant voltage or current
on-the-fly in the lab. Simply power it up
with 10V–40V DC, turn on the switch, and
turn the knobs. Since they are small and
inexpensive, several of these portable
bench supplies can be powered from
the same DC input source when multiple
circuit outputs and currents are needed.
The rectifier bridge should have 3A or
higher rated Schottky diodes. If they run
too hot, you can still avoid adding a heat
sink by replacing the Schottkys with an
LT4320 ideal diode bridge controller and
four MOSFETs to reduce bridge heating.
The size of the 10mF output cap can
be changed to adjust for output ripple.
At full power, 10mF cap will produce
about ±1V ripple on the 34V DC input.
It’s just easy to create a completely
self-contained bench supply by adding a simple AC/DC converter on the
front end. Figure 11 shows a simple
120VAC to 24VAC (5:1) transformer,
a rectifier bridge and a 10mF output
capacitor, which combine to produce
34VDC with little ripple. This simple
AC/DC converter can be used to produce a
maximum bench supply output of 22V.
You can also piece together a universal
bench supply by connecting any universal AC/DC black box converter with a
12V–36V, 3A rating. Any AC/DC converter
lifted from an old laptop or purchased
from an electronics retailer should work.
The only restriction is that the maximum
output voltage of the bench supply should
remain about 5V below the minimum
rating of the input voltage source.
AC/DC INPUT
Figure 11. Simple combination
of a 24VAC(RMS) transformer,
rectifier bridge, and capacitor
provides AC/DC 34V front-end
for a complete solution.
20 | July 2014 : LT Journal of Analog Innovation
CONCLUSION
Build your own high performance
DC bench supply for 0V–24V and
0A–3A constant voltage and current control using a couple parallel LT3081 linear
regulators, a synchronous step-down
LT8612, an LT3092 current source and a
tiny LTC3632 negative supply. The bench
supply features low output ripple with
low output capacitance, excellent transient
response, regulates to 0V and 0A, remains
in regulation during short-circuit and
stays cool with no bulky heat sinks. It can
easily be coupled with an AC/DC converter
or it can be powered from a DC source.
The complete bench supply solution is
low cost, small in size, and easy to build,
despite its top shelf performance. n
+
ON/OFF
120VAC(RMS)
120:24
VAC(RMS)
4x 3A
SCHOTTKY DIODES
10mF
50V
34V DC
design features
80V Buck-Boost Lead-Acid and Lithium Battery Charging
Controller Actively Finds True Maximum Power Point in
Solar Power Applications
Tage Bjorklund
In solar power systems, the
bulk of the expense is in the
panel and batteries. Any
cost-effective solar power
solution maximizes the
capacity usage and lifetime
of these components.
For instance, a high
quality charger increases
battery run time, reducing
capacity requirements, and
extends battery lifetime,
minimizing maintenance
and replacement costs.
Likewise, using a DC/DC
controller that extracts the
maximum available energy
from the solar panel
reduces the size and cost
of the panels required.
The LT8490 is a charge controller for lead
acid and lithium batteries that can be
powered by a solar panel or a DC voltage
source. It includes true maximum power
point tracking (MPPT) for solar panels
and optimized built-in battery charging
algorithms for various battery types—no
firmware development required. 80V input
and output ratings enable the LT8490 to
be used with panels containing up to 96
cells in series. The power stage uses four
external N-channel MOSFETs and a single
inductor in a buck-boost configuration.
Unlike most charge controllers, the buckboost configuration allows the charger to
operate efficiently with panel voltages that
are below, above or equal to the battery
voltage. The minimum panel voltage is 6V.
Batteries live longer and run longer when
the charge algorithm is optimized for the
battery type. Likewise, a high performing MPPT charger, which tracks the solar
panel maximum power point during
partial shade conditions, allows the use
of a smaller and lower cost solar panel.
Creating a discrete-component charger
solution to perform all of these duties
would be costly and time consuming,
typically requiring a microcontroller, a
high performance switching regulator and
a lengthy firmware development cycle.
GATEVCC´
GATEVCC´
SOLAR PANEL
LOAD
TG1
BOOST1 SW1 BG1 CSP CSN
BG2 SW2 BOOST2 TG2
VBAT
CSPOUT
CSNOUT
EXTVCC
CSNIN
CSPIN
VIN
LT8490
GATEVCC´
AVDD
TEMPSENSE
+
–
RECHARGABLE
BATTERY
THERMISTOR
GATEVCC
INTVCC
STATUS
AVDD
FAULT
GND
AVDD
Figure 1. Simplified solar powered
battery charger schematic
July 2014 : LT Journal of Analog Innovation | 21
Dual local maximums are the downfall of the conventional
MPPT found in a number of controllers. In contrast, the
LT8490 finds the true MPP, yielding twice the charge
power—or even higher in other shade conditions.
250
FULL ILLUMINATION
PPANEL (W)
200
150
LOCAL
MPP
50
0
Since the power stage is external, it
can be optimized for the application.
Charge current limits (and input current limit when a DC voltage source is
used) can be configured as needed.
TRUE MPP
100
True Maximum Power Point Tracking
PARTIAL SHADE
0
10
20
voltage of 80V; a range corresponding
to 16 to 96 series-connected solar cells.
30
40
VPANEL (V)
Figure 2. The power curve of a 60-cell 250W solar
panel with entire panel illuminated and with a small
shadow partly covering one cell (Figure 3)
COMPLETE SINGLE-IC SOLAR
POWERED BATTERY CHARGER
SOLUTION
The LT8490 is an MPPT battery
charger controller with a long list
of features including:
•integrated MPPT algorithm (no firmware
development required) greatly reduces
time to market
•integrated buck-boost controller allows
VIN to be above, below or equal to VBAT
•supports lead-acid and lithium-ion
batteries
•6V–80V VIN and 1.3V–80V VBAT
The LT8490 can be powered by a solar
panel or any DC voltage source. For a
particular battery voltage, a wide range
of solar panel types can be used, as the
panel voltage can be lower or higher
than the battery voltage. The LT8490
accepts panel inputs from 6V to a maximum (cold temperature) open circuit
22 | July 2014 : LT Journal of Analog Innovation
When operating from a solar panel,
the LT8490 maintains the panel voltage
at the panel’s maximum power point.
Even during partial shade conditions,
when more than one local maximum
power point appears (an effect of bypass
diodes inside the solar panel), the LT8490
detects and tracks the true maximum.
Figure 2 shows the P-V curves for a common 60-cell 250W panel under two different lighting conditions. The maximum
power point (200W) occurs at 25V when
the panel is fully illuminated. In partial
shade (see Figure 3), the available power
at a 25V panel voltage drops to 50W, with
the new true maximum power point
(128W) appearing at 16V. Note that the
original 25V/200W power peak actually
moves to a local maximum ~32V/63W.
This dual local maximum effect is the
downfall of traditional MPPT functions
found in a number of controllers, for they
follow the initial 25V/200W peak as it
shifts to 32V/63W. In contrast, the LT8490
finds the true MPP at 16V/128W, yielding an additional 65W from the panel. It
does this by measuring the entire power
curve of the panel at regular intervals
and locating the true maximum power
Figure 3. The solar panel shaded in top right corner
peak at which to operate. In this case,
more than twice as much charge power
is extracted, with even greater gains
possible in other shade conditions.
Charge Control Functions
Charge algorithms can be configured
according to the requirements of each
application by adjusting the voltage on
two configuration pins. Lead-acid batteries
built with AGM, gel and wet cell technologies require slightly different charge
voltages for best lifetime, and Li-ion
and LiFePO4 cells have charge requirements that are different from lead-acid
batteries. Some of the built-in and configurable charge control functions are:
design features
½W
7mΩ
+
CIN3
2.2µF
×2
CIN2
2.2µF
×2
SOLAR
PANEL
VOC < 53V
–
10Ω
8.06k
110k GATEVCC ´
4Ω
3.24k
5.49k
2Ω
CSN
EXTVCC
CSPOUT
CSNOUT
3.01k
21k
100nF
LT8490
4.7nF
SYNC
8.45k
11.5k
4.7µF
+
FLOODED
LEAD
ACID
10k
AT 25°C
ß = 3380
NTC
100nF
SWEN
SWENO
CLKDET CLKOUT CHARGECFG2 STATUS FAULT CHARGECFG1
AVDD
1.3k
13k
AVDD
3.32k
68nF
10nF
DS
470pF
14.27V STAGE 2 (ABSORPTION) CHARGE VOLTAGE (VS2) AT 25°C
13.87V STAGE 3 (FLOAT) CHARGE VOLTAGE (VS3) AT 25°C
10A CHARGING CURRENT LIMIT
2.5A TRICKLE CURRENT LIMIT
7.2A INPUT CURRENT LIMIT
53V MAXIMUM PANEL VOLTAGE (VMAX)
NO TIMER LIMITS
TEMPERATURE COMPENSATION ENABLED
–20°C TO 50°C BATTERY TEMPERATURE RANGE
175kHz SWITCHING FREQUENCY
EXAMPLE SOLAR PANEL: SHARP NT-175UC1 175W
200k
90.9k
DF
549Ω
549Ω
M1, M2: INFINEON BSC028N06NS
M3, M4: INFINEON BSC042N03LSG
L1: 15µH COILCRAFT SER2915H-153KL
DB1, DB2: CENTRAL SEMI CMMR1U-02
CIN1: 33µF, 63V, SUNCON 63HVH33M
CIN2, CIN3, CIN4: 2.2µF, 100V, AVX 12101C225KAT2A
COUT1: 150µF, 35V NICHICON UPJ151MPD6TD
COUT2, COUT3: 10µF, 35V, MURATA GRM32ER7YA106KA12
COUT4: 1µF, 25V AVX 12063C105KAT2A
•charge voltage temperature
compensation (typically for lead-acid
batteries) using NTC sensor
•reduction of charge voltage to a lower
float voltage level when the battery is
fully charged
•over or under battery temperature stops
charge current to protect the battery
•charging time limits can be set when
operating from a DC voltage source
•dead battery detection stops the
charging, to avoid a hazard
CONCLUSION
•constant current charging that changes
to constant voltage charging as the
battery voltage reaches its final value
1µF
–
ECON
53.6k
•adjustable trickle charging of a deeply
discharged battery reduces risk of
damage
124k
23.2k
VDD
LDO33
SRVO_IIN
SRVO_FBIN
SRVO_FBOUT
SRVO_IOUT
IOR
IMON_OUT
VC
LOAD
0.082µF
26.1k
TEMPSENSE
AVDD
IOW
97.6k
8.2nF
274k
FBOR
FBOUT
FBOW
RT
SS
IIR
IMON_IN
32.4k
470nF
BOOST2 TG2
1.05k
249k
COUT4
1µF
220nF
GND BG2 SW2
COUT1
150µF
10Ω
DB2
MODE
93.1k
1µF
5mΩ
INTVCC
SHDN
VINR
FBIR
FBIN
FBIW
COUT2
10µF
×2
GATEVCC ´
3.3nF
TG1 BOOST1 SW1 BG1 CSP
CSNIN
CSPIN
VIN
GATEVCC
4.7µF
×2
35.7k
220nF
2Ω
CIN4
2.2µF
M3
10Ω
3.3nF
VBAT
COUT3
10µF
×2
10Ω
DB1
1W
5mΩ
M4
M2
GATEVCC ´
CIN1
33µF
×3
470nF
196k
L1
15µH
M1
Figure 4. Complete solar power system with
lead-acid battery charging/control
an inductor, allowing the charger to operate with VIN above, below or equal to the
battery voltage. All necessary functions are
included, with built-in battery charging
algorithms and MPPT control, requiring no
firmware development. n
The LT8490 is a full-featured true
MPPT charge controller that can operate
from a solar panel or a DC voltage source
with a voltage range from 6V to 80V,
charging lead-acid or lithium batteries
from 1.3V to 80V. The power stage is easily
configured by selecting four MOSFETs and
July 2014 : LT Journal of Analog Innovation | 23
What’s New with LTspice IV?
Gabino Alonso
New Video: “SAR ADC Driver Interface”
www.linear.com/solutions/4679
—Follow @LTspice at www.twitter.com/LTspice
—Like us at facebook.com/LTspice
BLOG
SELECTED DEMO CIRCUITS
Check out the LTspice blog
(www.linear.com/solutions/LTspice)
for tech news, insider tips and interesting points of view regarding LTspice.
For a complete list of example simulations utilizing Linear Technology devices,
visit www.linear.com/democircuits.
New Video on the Blog: “SAR ADC Driver
Interface”www.linear.com/solutions/4679
• LT3081: Wide safe operating area supply
High performance SAR ADCs offer
incredible dynamic range and linearity at increasingly faster sample rates,
but achieving top performance requires
careful attention to the amplifier and
interface at the analog inputs. This video
shows how to use LTspice to simulate
the analog input interface of high performance SAR ADCs. Linear Technology signal
chain applications expert Kris Lokere
discusses charge kickback, settling time,
noise and how to intelligently balance the
trade-offs inherent in achieving sometimes conflicting performance goals.
What is LTspice IV?
LTspice® IV is a high performance SPICE
simulator, schematic capture and waveform
viewer designed to speed the process of power
supply design. LTspice IV adds enhancements
and models to SPICE, significantly reducing
simulation time compared to typical SPICE
simulators, allowing one to view waveforms for
most switching regulators in minutes compared
to hours for other SPICE simulators.
LTspice IV is available free from Linear
Technology at www.linear.com/LTspice. Included
in the download is a complete working version of
LTspice IV, macro models for Linear Technology’s
power products, over 200 op amp models, as
well as models for resistors, transistors and
MOSFETs.
24 | July 2014 : LT Journal of Analog Innovation
Linear Regulators
using paralleling regulators (2.7–40V to
1.5V, 3A) www.linear.com/LT3081
• LT3086: USB supply with cable drop
compensation (1.55–40V to 5V, 2.1A)
www.linear.com/LT3086
Buck Switching Regulators
• LT8614: Ultralow EMI, µPower buck
converter (5.8–42V to 5V, 4A)
www.linear.com/LT8614
• LTC3624: High efficiency buck
regulator with ultralow quiescent
current (5.6–17V to 5V, 2A)
www.linear.com/LTC3624
• LTC3875: High efficiency dual output
step-down converter with ultralow
DCR sensing and fast transient
(4.5-14V to 1V, 30A & 1.5V, 30A)
www.linear.com/LTC3875
• LTM®4633: Triple
A step-down µModule® regulator
(4.5–16V to 1.0V, 1.2V & 3.3V, 10A)
10
www.linear.com/LTM4633
• LTM4676: Single 26A µModule buck
regulator with digital interface for
control & monitoring (4.5–16V to 1V,
26A) www.linear.com/LTM4676
Boost & Inverting Switching Regulators
• LT8710: Synchronous boost converter with
output current control (4.5–28V to 5V,
6A) www.linear.com/LT8710
• LT8710: Synchronous inverting converter
with output current control (4.5–28V to
−5V, 6A) www.linear.com/LT8710
Flyback, Forward and Isolated
Controllers
• LT8301: µPower isolated flyback
converter (10–32V to 5V, 0.7A)
www.linear.com/LT8301
• LT8309 & LT3748: 60W, 12V output, isolated
telecom supply (36–72V to 12V, 5A)
www.linear.com/LT8309
Overvoltage & Overcurrent Protection
• LTC4364: 4A, 12V overvoltage output
regulator with reverse current protection
www.linear.com/LTC4364-1
ADC Drivers
• LT1637/LT1468/LT5400: ±10V single-ended
to ±5V fully differential ADC driver for
LTC2378-20 using matched resistors
www.linear.com/LT1637
SELECT MODELS
To search the LTspice library for a
particular Linear Technology device
model, choose Edit > Component (or
press F2) and enter its part number in
the search box or browse to the device/
component needed. Since LTspice is often
updated with new features and models, it is good practice to update to the
current version via the menu command
Tools > Sync Release. LTspice’s changelog.
txt file (in the root installation directory)
lists the LTspice revision history.
design ideas
Linear Regulators
• LT3065: 45V input, 500m A low noise,
linear regulator with programmable
current limit and power good
www.linear.com/LT3065
Buck Switching Regulators
• LT3874: PolyPhase® step-down
synchronous slave controller
for LTC3866/LTC3875/LTC3774
with sub-milliohm DCR sensing
www.linear.com/LTC3874
• LTC3624: 17V, 2A synchronous step-down
regulator with 3.5µ A quiescent current
www.linear.com/LTC3624
• LTC3870: PolyPhase step-down slave
controller for LTC3880/LTC3883 with
digital power system management
www.linear.com/LTC3870
• LTM8058: 3.1V to 31V input isolated
µModule DC/DC converter with LDO post
regulator www.linear.com/LTM8058
Boost Switching Regulators
• LT3048-15: Low noise bias generator
www.linear.com/LT3048-15
• LTC3784: 60V PolyPhase
synchronous boost controller
www.linear.com/LTC3784
Multitopology Switching Regulators
• LT8471: Dual multitopology
DC/DC converters with 2A switches and
synchronization www.linear.com/LT8471
Flyback, Forward and Isolated
Controllers
• LT3752: Active clamp synchronous
forward controllers with
internal housekeeping controller
www.linear.com/LT3752
• LT8301: 42V input micropower no-opto
isolated flyback converter with
65V/1.2A switch www.linear.com/LT8301
• LT8309: Secondary-side synchronous
rectifier driver www.linear.com/LT8309
• LT8311: Synchronous rectifier controller
with opto-coupler driver for forward
converters www.linear.com/LT8311 n
• LT8710: Synchronous SEPIC/ inverting/
boost controller with output current
control www.linear.com/LT8710
Power User Tip
USE LTspice INTRINSIC SYMBOL FOR THIRD-PARTY MODEL
LTspice can automatically create a symbol for a third-party model, or you can
associate a third-party subcircuit with an LTspice intrinsic symbol, as long as the
third-party .SUBCKT model and the intrinsic symbol share an identical pin/port netlist
order.
3.Change Prefix: “MN” to “X”. The symbol now netlists as a subcircuit instead of an
intrinsic NMOS transistor.
4.Change “NMOS” to be “IRF_7401”, corresponding to the name on the .SUBCKT line.
For example, to add an N-channel MOSFET transistor symbol to a schematic and
define it with an IRF_7401 .SUBCKT statement:
1.Add an instance of the N-channel MOSFET transistor symbol to your schematic.
5.Click OK.
2.Move the cursor over the body of the MOSFET symbol and Ctrl + Right-Click. A
dialog box appears.
6.Either add the .SUBCKT IRF_7401 lines to your schematic or reference the library
containing it (.INCLUDE third_party.lib) as a SPICE directive.
Again, this assumes the third-party model you’re adding follows popular pin order
conventions. When in doubt, use the automatic symbol generation feature because
it takes care of any discrepancies with regard to pin and port netlist order. For more
about automatic symbol generation, see Help > Schematic Capture > Creating New
Symbols > Automatic Symbol Generation.
Happy simulations!
July 2014 : LT Journal of Analog Innovation | 25
Wireless Precision Temperature Sensor Powers Itself,
Forms Own Network, Enabling Easy Deployment
in Industrial Environments
Kris Lokere
While the Internet connects people via a worldwide computer network, the Internet of
Things (IoT) refers to a growing trend to create relatively simple devices that interconnect
and share data independent of computer or human intervention. The IoT has the potential
to increase efficiency, improve safety and enable entirely new business models in just about
any facet of life or industry. For example, to reliably and efficiently operate an industrial plant,
it helps to have as many monitoring (or control) points as possible—more sensors means
better monitoring. The device-to-device networking of the IoT simplifies distribution and
networking, making it easy to expand the number and reach of sensors throughout a plant.
Exponential increases in the number of
sensors can be achieved by eliminating
all cabling requirements through the use
of robust, wireless, micropower sensors
that run for years on a small battery.
Better yet, eliminate the need to replace
or recharge batteries. Instead, sensors
harvest energy from their immediate
environment, taking advantage of locally
available energy sources, such as light,
vibration or temperature gradients.
This article shows how to easily build
a high resolution temperature sensor that runs on light energy when
available and from a small battery
backup when light energy is low. The
design also includes a low power radio
module that automatically forms a reliable mesh network to wirelessly connect sensors to a central access point.
DESIGN OVERVIEW
Figure 1 shows a block diagram of the
self-powered wireless temperature sensor. The temperature sensor is based on a
thermistor biased by a low noise LT6654
voltage reference. The 24-bit delta-sigma
ADC LTC2484 reads the thermistor voltage
and reports the result via SPI interface.
The LTP™5901-IPM radio module takes
on a number of tasks: it automatically
forms an IP-based mesh network, its
built-in microprocessor reads the LTC2484
ADC SPI port and it manages the power
sequencing for signal chain components.
Figure 1. A wireless temperature sensor is formed by
connecting a wireless radio module to an ADC, reference and
thermistor. The circuit is powered by an energy harvester that
can convert power from a battery or solar panel.
BATTERY
EH_ON LDO_EN
GPIO
26 | July 2014 : LT Journal of Analog Innovation
The entire design has been implemented as
Linear Technology demonstration circuit
DC2126A. The complete solution, including battery and solar panel, fits inside
a small plastic case measuring less than
7 cubic inches as shown in Figure 2.
SOLAR
PANEL
LTC3330
WIRELESS
NETWORK
The LTC3330 is a low power dual switchmode power supply that derives power
from the solar panel when light is available, reverting to the battery backup
when needed to maintain output voltage
regulation. The LTC3330 also includes
an LDO, which is used to duty cycle
power to the temperature sensor.
LTC5901-IPM
LDO OUT
3V (DUTY CYCLED)
VOUT
3.6V
LTC6654-2.5
VSUPPLY
SPI
LTC2484
THERMISTOR
BRIDGE
design ideas
More sensors means better plant monitoring. The achievable number of industrial
sensors can be multiplied by eliminating all cabling requirements through the use
of robust, wireless, micropower sensors that run for years on a small battery.
Better yet, eliminate the need to replace or recharge batteries. Instead, sensors
harvest energy from their immediate environment, taking advantage of locally
available energy sources, such as light, vibration or temperature gradients.
(a)
(b)
(c)
Figure 2. Entire self-contained, self-powered temperature sensor system fits into an enclosure less than seven cubic inches in
volume. Battery, solar panel and wireless-networking controller are included. No external wires or connections are required.
Installation is easy: place it somewhere. (a) Front of board showing signal chain, power and control circuitry and wireless mesh
network module; (b) back of board with battery; (c) complete solution in enclosure with solar panel installed.
TEMPERATURE MEASUREMENT
SIGNAL CHAIN IS ACCURATE AND
DRAWS MINIMAL POWER
Figure 3 shows the signal chain—
temperature measurement—components of the design, including the
thermistor and ADC (with LT6654
precision voltage reference).
Thermistor
A thermistor can read temperatures over
a wide range—they are simply resistors with a strongly negative temperature coefficient. For instance, US Sensor
KS502J2 has a resistance of 5k at 25°C,
and ranges from 88k to 875Ω over the
–30°C to 70°C temperature range.
ADC and Accurate Voltage Reference
The thermistor is connected in series with
two accurate 49.9k resistors, and biased up
by the LT6654 precision voltage reference.
The LTC2484 delta-sigma ADC measures the
resistor divider ratio with 24-bit resolution. The ADC total unadjusted error is
15ppm, which for this thermistor slope
corresponds to a temperature uncertainty of less than 0.05°C. This thermistor
is specified with an accuracy of 0.1°C,
so we can measure the temperature to
that accuracy without any calibration.
The ADC noise is less than 4µVP–P, corresponding to less than a 0.005°C change in
temperature. Therefore, with a calibration
step, this system could be used to measure
temperature to extremely fine resolution.
Because the ADC measures the ratio of
thermistor voltage to a reference voltage, strictly speaking, an accurate reference is not required. Nevertheless, it
2.5V FROM LT6654
Figure 3. LTC2484 24-bit ADC reads the
thermistor voltage. Because the input
common mode voltage remains centered,
this Easy Drive™ ADC draws no input
current, which makes for an easy and
accurate ratiometric reading.
0.1µF
1µF
49.9k
IIN+ = 0
1k–100k
IIN– = 0
0.1µF
49.9k
IN+
IN–
REF
VCC
CS
SCK
LTC2484 SDO
SDI
GND GND fO
3-WIRE
SPI INTERFACE
July 2014 : LT Journal of Analog Innovation | 27
The LTC3330 manages all power for this application. It includes two switch-mode power
supplies and a linear regulator in a monolithic package. Here, a buck-boost converter
draws power from the battery; a buck converter draws from the solar panel. The LTC3330’s
internal prioritizer ensures that solar power is used when available, preserving battery charge
as much as possible. The LTC3330 also directly accepts AC energy harvesting sources,
such as piezo crystals, which generate an AC voltage proportional to vibrational energy.
must be low noise, because variations in
reference voltage during the ADC conversion period could produce errors.
The LTC2484 ADC features an Easy Drive™
input structure, meaning that net differential sampling currents during a conversion period are nearly zero. As a result,
no measurement errors are induced from
input sampling current flowing through
the resistive thermistor network, which
means no separate op amp buffer is
required. Bypass capacitors provide a
low impedance path at high frequency.
DUTY CYCLE POWER TO THE SIGNAL
CHAIN TO CONSERVE POWER
Few applications require constant temperature monitoring. If one measurement per second or once per minute is
enough, it makes sense in this micropower
application to minimize the power draw
during the mostly idle time. The resistor network draws up to 25µ A from
the 2.5V reference. To avoid this power
loss between measurements, the power
supply to the reference is duty cycled
to be on only during measurement.
Determine the Required Duty Cycle
The RC time constant at the input of the
ADC is about 5ms. By turning on the power
80ms prior to taking a measurement, full
settling at the ADC input is ensured. In
fact, since both input nodes turn on at
the same slope, readings are accurate well
before the theoretical settling time. The
LT6654 is powered from the 3V LDO output of the LTC3330. The LTP5901-IPM’s
onboard microprocessor drives the
LDO enable pin of the LTC3330 high and
low at the correct times before and after
performing a temperature reading.
The LTC2484 automatically enters
sleep mode when not converting. The
1µ A sleep current is low compared to
the already low power of the wireless
radio. Therefore, it is not necessary to
duty cycle the power supply to the ADC.
By keeping the ADC permanently powered from the same supply voltage as
the LTP5901-IPM, the logic levels at the
SPI interface are ensured to be the same.
Table 1. Signal chain current consumption
Refreshing the Temp Reading Each
Cycle
After providing a conversion result
through the SPI port, the LTC2484 automatically starts a new conversion, and
stores the result in its internal register until
requested to read it again. This simplifies
quick data turnaround in systems that
read temperature frequently, but could
make for a stale temperature reading in
ultralow power applications with a significantly long interval between readings.
To ensure that the communicated temperature reading is always fresh, this application first toggles the CS and SCK pins to
flush out any stale temperature reading
from the ADC register, and automatically
starts a new temperature conversion. The
microprocessor waits until the conversion is finished and then reads the result
through the SPI port. To save power, the
system immediately proceeds to shut down
the thermistor network (by turning off
the LDO ), even as the ADC automatically
commences to the next temperature reading. This next temperature result is of no
consequence, as it is flushed the next time
the microprocessor requests a reading.
Table 2. Average signal chain current consumption based on read frequency
CIRCUIT ELEMENT
CURRENT DRAW WHEN ACTIVE
TEMPERATURE READ FREQUENCY
AVERAGE CURRENT
LT6654 Reference
350µA
Once per second
170µA
Thermistor Network
25µA
Once per 10 seconds
17µA
LTC2484 ADC
160µA
Once per minute
2.9µA
TOTAL
535µA
28 | July 2014 : LT Journal of Analog Innovation
design ideas
The LTP5901-IPM performs two functions in this application: wireless networking and
housekeeping. It includes the radio transceiver, embedded microprocessor and networking
software. When multiple nodes of LTP5901-IPM are powered up in the vicinity of a network
manager, the nodes automatically recognize each other and start forming a highly reliable,
low power wireless mesh network. Each node can function as both a source of sensor
information and as a routing node to relay data from other nodes toward the manager.
+
Figure 4. The LTC3330 takes power from the solar
panel or battery, automatically prioritizing between
the two sources to maintain a regulated output
voltage. An additional LDO output is controlled by
a logic input pin, which is used to duty cycle power
to the temperature sensor. The LTC3330 generates
an output flag to indicate whether solar or battery
power is being used.
SOLAR
PANEL
–
800µF
AC1
AC2
VIN
SW
LTC3330
1µF
4.7µF
1µF
CAP
SWB
VIN2
VOUT
The overall power consumption of
the temperature sensor circuitry can
be estimated by determining the total
charge consumed and dividing by the
period of temp reading, as follows:
1.Sum the current of the reference
(350µ A), thermistor network (25µ A),
and ADC (160µ A when converting) for a total of 535µ A (Table 1).
2.Determine the total charge consumed
by considering how long this current is
present. The ADC takes about 140ms for
a conversion, with a precursor 80ms for
the reference and thermistors to settle.
Add some time for the SPI readout,
and we are at about 300ms on-time.
Consuming a current of 535µ A during 300ms corresponds to a charge of
160µC. We should add to this the charge
needed to charge up the 4.7µ F supply
bypass capacitor to the voltage reference, because this node is recharged
from 0V to 3V with every reading.
This 14µC of charge brings the total
22µH
3.6V
LDO_IN
100µF
+
EH_ON
BAT
BATTERY
22µF
LDO_EN
LDO_OUT
GND
Calculating Signal Chain Power
Consumption
SWA
22µH
to 174µC per temperature reading.
3.A rate of one temperature read-
ing every 10 seconds works out to
an average current consumption of
17µ A. Other examples of average
supply current are given in Table 2.
SINGLE POWER IC FOR SOLUTIONWIDE POWER MANAGEMENT
The LTC3330 manages all power
for this application, as shown in
Figure 4. It includes two switch-mode
power supplies and a linear regulator in a small monolithic package.
Two Switch-Mode Converters Handle
Battery and Solar Inputs
A buck-boost converter can take power
from the battery to maintain a regulated
output voltage (set to 3.6V for this application). A separate buck converter can take
power from the solar panel to regulate the
output voltage to the same level. An internal prioritizer ensures that solar power is
used when possible, drawing power from
the battery only when needed. For other
applications, the LTC3330 also supports
3V
4.7µF
AC energy harvesting sources, such as
piezo crystals, which generate an AC voltage proportional to vibrational energy.
The LTC3330 draws less than 1µ A quiescent
current, a good fit for this mostly idle, low
power wireless application. The power
loss in the operating power supply is a
small fraction of the total power—most of
the power is available for the work of the
temperature sensor and wireless network.
LDO Powers and Duty Cycles Signal
Chain
In addition to the two switch-mode power
supplies, the LTC3330 includes an LDO with
a separate LDO enable pin. This enable
feature is handy for this low duty cycle
application, where the voltage reference
and thermistor network are powered from
the LDO to minimize switching noise. The
LDO enable feature allows the application to simply toggle power to the signal
chain on and off, even as the switch-mode
power to the wireless radio is always on.
Even though the wireless radio does
not consume much power in between
July 2014 : LT Journal of Analog Innovation | 29
The LTP5901-IPM includes an ARM Cortex-M3 microprocessor
core, which runs the SmartMesh IP networking software. This
core is highly programmable via user-supplied application
firmware, making it possible to build a wide variety of
solutions without any additional microprocessors.
Figure 5. The LTP5901-IPM requires only a few
simple connections to manage networking
and housekeeping tasks for the application. All
wireless networking functions, including firmware
and RF circuitry, are built in. A 3-wire SPI master
communicates with the LTC2484 SPI port. A
GPIO pin (DP2) controls power sequencing to the
sensor. The built-in ADC acts as a convenient level
translator to read the energy harvesting status flag
EH_ON from the LTC3330.
transmissions, it is very important that it
always remains biased up, to keep timers running correctly so that the entire
network remains time-synchronized.
The microprocessor inside the wireless radio sequences the LDO enable pin
at the correct times to prepare the signal chain for a temperature reading.
Output Flag Indicates Battery or Solar
Panel Draw
The LTC3330 provides an output flag
(EH_ON), which tells the system whether
power is being drawn from the battery or
from the solar panel. It can be informative for the end user to have real-time
access to this information. Therefore,
we let the microprocessor inside the
wireless radio read this output flag and
transmit it through the network, along
with the temperature data itself.
The logic level for this EH_on output is
referred to an internal bias voltage of
the LTC3330, which varies depending on
operating mode and can be higher than 4V.
Rather than connecting that output pin
directly to the lower-voltage logic input of
the wireless radio, we divide it down and
feed it into a built-in 10-bit ADC (part of
the microprocessor). In this case, we just
30 | July 2014 : LT Journal of Analog Innovation
LTP5901-IPM
LTC3330
3.6V
LDO_EN
EH_ON
CS
SCK
SDO
3.3M
1.1M
SPIM_SS_0
SPIM_SCK
SPIM_MISO
CS
SCK
SDO
LTC2484
GND
0.1µF
use that ADC as a comparator to indicate
which power source the LTC3330 is using.
COMPLETE WIRELESS NETWORK
WITH A SINGLE MODULE
The LTP5901-IPM is a complete wireless radio module, including the radio
transceiver, embedded microprocessor,
and networking software. Only a few
connections are required to create a
self-forming wireless network and data
gathering/communication system with
this module, as shown in Figure 5.
Its physical format is a small printed
circuit board, which can be easily soldered onto the main board
containing the signal chain and
power management components.
The LTP5901-IPM performs two functions
in this application: wireless networking
and housekeeping via microprocessor.
When multiple nodes of LTP5901-IPM are
powered up in the vicinity of a network
manager, the nodes automatically recognize each other and begin forming a
wireless mesh network. The entire network
is automatically time synchronized, which
means that each radio is only powered on
during very short, specific time intervals.
As a result, each node can function not
only as a source of sensor information,
but also as a routing node to relay data
from other nodes toward the manager.
This creates a highly reliable, low power
mesh network, where multiple paths are
available from each node to the manager,
even though all nodes, including the routing nodes, operate on very low power. A
typical range for this radio technology is
100m between nodes, with broader ranges
possible in favorable outdoor conditions.
The LTP5901-IPM includes an
ARM Cortex-M3 microprocessor core,
which runs the SmartMesh IP™ networking software. This core is highly
programmable via user-supplied application firmware, making it possible to
build a wide variety of solutions without
any additional microprocessors. In this
example, the LTP5901-IPM’s microprocessor manages power sequencing to the
temperature sensor by turning the LDO of
the LTC3330 on and off to conserve power.
The LTP5901-IPM communicates directly
to the SPI port of the 24-bit ADC. Finally,
the LTP5901-IPM reads the power status
output flag (EH_on) from the LTC3330,
which indicates whether solar light or
battery is used to power the circuit.
design ideas
A combination of easy-to-use, high performance power management, and wireless
networking devices enable the design of self-contained, completely wireless sensor
products. The time-synchronized wireless mesh network ensures that minimal power
is used to reliably transmit data from node to node, and the on-chip microprocessor
can further save power by duty cycling power to the sensor circuitry.
Power consumption of the wireless radio can be estimated using the
“SmartMesh® Power and Performance
Estimator” spreadsheet found at
www.linear.com/products/smartmesh_ip.
For a typical network of 20 motes, where
10 motes have a direct wireless connection to the manager (1-hop), and 10
others have an indirect connection to the
manager (2-hop), average power consumption is about 20µ A for the 2-hop
nodes and 40µ A for the 1-hop nodes.
These numbers are for each node reporting temperature once per 10 seconds.
1-hop
nodes consume about twice as
much power as 2-hop nodes because they
transmit not only their own sensor data,
but also act as routing nodes to forward
the sensor data from some of the 2-hop
nodes. The above-mentioned power levels
can be reduced by about a factor of two if
the advertising feature is turned off. Once
advertising is turned off, the network no
longer recognizes new nodes that want to
join the network. Other than that, there
is no impact on network operation.
A small 2-inch by 2-inch solar panel
(such as the Amorton series) can generate 40µ A at relatively moderate
indoor lighting conditions (200-lux);
much more in bright light. This application could run entirely on solar
power in a variety of environments.
OVERALL POWER CONSUMPTION
Otherwise, if the circuit must run entirely
on battery power, a 2.4Ah AA battery (such
as the Tadiran XOL series) could power
this application for nearly seven years.
Total power consumption depends on a
number of factors, including how often
each sensor measures temperature, and
how the nodes are configured in the network. Typical power consumption for a
sensor node reporting once per 10 seconds
is less than 20µ A for the sensor portion
and can be 20µ A for the wireless radio, for
a total average load current of about 40µ A.
HOST APPLICATION
In low or variable light conditions, the
circuit automatically toggles back and
forth between solar power and battery
power, so that any available solar power
is used to extend the life of the battery.
CONCLUSION
Figure 6. Precision temperature sensor
easily drops into robust SmartMesh IP
wireless mesh network.
NETWORK MANAGER
802.15.4
MOTES
A combination of easy-to-use, high performance power management, and wireless
networking devices enable the design of
self-contained, completely wireless sensor
products. The time-synchronized wireless mesh network ensures that minimal
power is used to reliably transmit data
from node to node, and the on-chip
microprocessor can further save power by
duty cycling power to the sensor circuitry. Efficient, highly integrated power
management ICs can power the application entirely from a small solar panel, or
for many years from a small battery. n
DC2126 WIRELESS
TEMPERATURE SENSOR
July 2014 : LT Journal of Analog Innovation | 31
Dual Phase Buck Controller Drives High Density 1.2V/60A
Supply with Sub-Milliohm DCR Sensing
Mike Shriver
Designers of low output voltage rails for communication, networking, server and
industrial systems are challenged to achieve greater load currents and higher
efficiency in diminishing board space. The LTC3774 dual output buck controller
eases this burden by interfacing easily with DrMOS devices, providing high efficiency
and small size by integrating MOSFET and gate driver in the same package. The
LTC3774 can sense current across the inductor’s DCR, with values as low as
0.2mΩ, improving efficiency by eliminating the need for a discrete sense resistor.
The LTC3774’s peak current mode architecture provides cycle-by-cycle current limit,
inherent cycle-by-cycle current sharing and easy to design type II compensation.
HIGH EFFICIENCY CONVERTER WITH
A SMALL FOOTPRINT
Figure 1 shows a dual phase
1.2V/60A LTC3774 converter operating
at a switching frequency of 400kHz.
The power stage for each phase is the
FDMF6820A DrMOS, which comes in
a 6mm × 6mm QFN package, and a
0.3µ H single winding ferrite inductor with
a typical DCR of 0.325mΩ. The resulting
full load efficiency is 89.8%, as shown
in Figure 2. The core of the converter
has a current density of 50A /in2.
DrMOS INTERFACE
The PWM outputs of the LTC3774 are
designed to drive DrMOS devices with a
3-state PWM input. When the PWM signal is high, the top FET is on, and when
the PWM signal is low, the bottom
FET is on. When the PWM signal is floating, both the top FET and bottom FET are
off. This state is used to block inductor reverse current when the LTC3774 is
set up for either pulse-skipping mode
or Burst Mode operation, providing a
smooth turn-on into a prebiased output.
The PWM outputs of the LTC3774 can
32 | July 2014 : LT Journal of Analog Innovation
interface with power block devices and
gate drivers with external MOSFETs.
produces less than a 1°C temperature
difference between the two phases.
DCR SENSING
The LTC3774 provides accurate output
voltage regulation. The output of each
phase is sensed with a differential amplifier placed after the feedback divider to
compensate for any PCB IR drops. The total
regulated feedback voltage accuracy is
±0.75% over temperature. The output voltage range of the LTC3774 is 0.6V to 3.5V.
The ultralow DCR sensing capability is a
result of an innovative current sensing
technique that improves the signal-tonoise ratio of the current sense signal.
The external filter tied to the SNSA+ pin
amplifies the AC portion of the DCRsensed current; the DC current is sensed
via the SNSD+ pin, internally amplified
and summed with the AC portion. This
reconstructed current sense signal seen
by the LTC3774’s current comparator is
effectively amplified by a factor of five,
allowing the converter to remain stable
and retain current limit accuracy for
inductor DCR values as low as 0.2mΩ.
The LTC3774 offers five current limit
settings between 10mV and 30mV with
a worst-case error over temperature
of ±1.25mV. With current mode contol, current sharing between phases
is tightly balanced, as shown by the
thermal image shown in Figure 3. The
1.2V/60A converter operating at full load
PolyPhase OPERATION AND
IMPROVING ROBUSTNESS
The LTC3774 features CLKIN and
CLKOUT pins for PolyPhase operation up
to 12 phases. PolyPhase operation reduces
ripple current for the input capacitors
and in cases where the phases are tied
together, reduces output voltage ripple
and provides faster load step response.
Further improvements in the reliability of single output, redundant (N + 1),
PolyPhase converters can be achieved by
placing Hot Swap™ circuits on the input
and ideal diode circuits on the output of
each phase. If a MOSFET failure occurs, the
fault is isolated and the output is protected
and continues to regulate. Reliability
design ideas
10k
22pF
VCIN
10k
INTVCC
330pF
931Ω
+
ITEMP1
ITH1
VOSNS1–
VOSNS1+
TK/SS1
HIZB1
PWMEN1
PWM1
RUN1
GND
0.22µF
COUT1
100µF
4×
0.22µF
0.22µF
10k
1µF
5V BIAS
1Ω
10k
2.2µF
VIN
22µF
CGND
22µF
Figure 1. Dual phase, 1.2V/60A LTC3774 converter
operating at fSW = 400kHz, 7V ≤ VIN ≤ 14V
PGND
VIN
The LTC3774 is a high performance dual
output buck controller intended for low
output voltage, high output current supplies with DrMOS and ultralow DCR inductors. It yields high efficiency, an accurate
current limit, a precise 0.6V ±0.75%
feedback voltage and fault isolation. n
EFFICIENCY (%)
20
90
15
POWER STAGE:
DrMOS = FDMF6820A
RBOOST = 2.2Ω
L = WÜRTH 744301033
(0.33µH, 0.32mΩ)
80
12
8
75
70
POWER LOSS (W)
CONCLUSION
95
85
L2
0.33µH
L1, L2: WÜRTH 744301033
COUT1: MURATA GRM31CR60J107ME39L
COUT2: SANYO 2R5TPE330M9
10k
Other features include soft recovery
from an output overload, optional
NTC compensated DCR sensing, a
phase-lockable switching frequency
range of 200kHz to 1.2MHz and an
input voltage range of 4.5V to 38V.
COUT2
330µF
6×
931Ω
0.22µF
PHASE
VSWH
10k
is further improved with the LTC3774’s
HIZB pin, which floats the PWM output
when a fault is detected, allowing for a
more predictable shutdown of the DrMOS.
1.2V/60A
VOUT
2.2Ω
PWM
BOOT
FDMF6820A
VIN
4.64k
2.2µF
VCIN
INTVCC
VDRV
2.2Ω
180µF
LTC3774
DISB
VIN
0.22µF
SNSD1+
SNS1–
SNSA1+
PGOOD1
PGOOD2
SNSA2+
SNS2–
SNSD2+
ITEMP2
ITH2
VOSNS2–
VOSNS2+
TK/SS2
HIZB2
PWMEN2
PWM2
RUN2
GND
4.7µF
10k
SMOD
INTVCC
ILIM1
PHSMD
FREQ
MODE/PLLIN
CLKOUT
INTVCC
VIN
ILIM2
L1
0.33µH
4.64k
10k
10k
37.4k
0.22µF
PHASE
VSWH
DISB
22µF
CGND
22µF
PGND
VIN
3.01k
3.3nF
2.2Ω
PWM
BOOT
FDMF6820A
VIN
7V TO 14V
RUN1
2.2µF
VDRV
2.2µF
0.01µF
VIN
5V BIAS
1Ω
SMOD
10k
4
0
10
20
30
40
50
LOAD CURRENT (A)
60
70
0
Figure 2. Efficiency and power loss curves for circuit
shown in Figure 1. VIN = 12V, VOUT = 1.2V
Figure 3. Thermal image of the circuit shown in
Figure 1. fSW = 400kHz, VIN = 12V, VOUT = 1.2V,
IOUT = 60A, no airflow and 21°C ambient
July 2014 : LT Journal of Analog Innovation | 33
DC Accurate Driver for 20-Bit SAR ADC Achieves 2ppm
Linearity
Guy Hoover
As resolution and sample rates continue to rise for analogto-digital converters (ADCs), the driver circuitry for the ADC
analog input, not the ADC itself, has increasingly become the
limiting factor in determining overall circuit accuracy. First,
the driver circuitry must buffer the input signal and provide
gain. In addition, it must level shift or convert a single-ended
signal to a fully differential signal to satisfy the input voltage
range and common mode requirements of the ADC. All must
be done without adding distortion to the original signal.
turn drives the U5 resistor string, acting as
a precision divider. U3 operates in a gain
of minus one-half and drives the center
of the U5 resistor string to maintain the
ADC common mode voltage at VREF/2.
U3 and U4 are LT1468A low offset highly
linear op amps. U5 is a LT5400A quad
matched resistor network with a guaranteed maximum mismatch of 0.01%.
Matched resistor values in U5 are important because any mismatch contributes
to both offset and full-scale error in
this circuit. For this reason and because
of their extremely low voltage coefficient, do not use discrete resistors
instead of the LT5400A. R4 provides a
quarter-scale shift to the output of U3.
R1 and R2 form a divider that biases the
noninverting input of U3 at VREF/2.
CIRCUIT DESCRIPTION
This article presents a simple ADC driver
circuit that converts a ±10V single-ended
input signal into a fully differential
signal capable of driving the LTC2377-20
20-bit SAR ADC with a combined linearity
error of only 2ppm. Options for providing higher input impedance and a lower
overall supply current are also examined.
The circuit of Figure 1 converts a ±10V single-ended signal into the ±5V fully differential signal required by the LTC2377-20
(U1). The LTC2377-20 is a 20-bit, 500ksps,
low power SAR ADC with a typical integral nonlinearity (INL) of ±0.5ppm. The
voltage at AIN is buffered by U4, which in
U2
LTC6655AHMS8-5
10V
C13
47µF
10V
X7R
1210
3.3V
C3
10µF
–IN
V+
OUT
V–
R2
10k
–15V
C2
10µF
R5
10k
C4
10nF
C0G
1
1k
8
2
1k
7
3
4
1k
1k
9
6
5
C9
10µF
C10
220pF
C0G
IN+
C12
220pF
C0G
REF
+IN
C1
10µF
U1
LTC2377-20
IN–
CHAIN
R4
20k
U3
LT1468A
REF/DGCL
R1
10k
C7
2.5V 0.1µF
U5
LT5400A-4
15V
GND
V+
OUT
V–
R6
20k
34 | July 2014 : LT Journal of Analog Innovation
GND
C6
10µF
–15V
C5
10µF
Figure 1. ±10V input range, 20-bit, 500ksps
data acquisition system with 2ppm INL
OUTS
GND
GND
–IN
GND
VDD
+IN
VREF
OVDD
C8
3300pF
C0G
15V
OUTF
GND
R3
49.9Ω
U4
LT1468A
GND
VIN
GND
J1
AIN
±10V
SHDN
C11
0.1µF
C14
0.1µF
CNV
CNV
SCK
SCK
SDO
SDO
BUSY
BUSY
RDL/SDI
design ideas
The ADC driver circuit shown here converts a singleended ±10V signal into a ±5V fully differential signal
for the LTC2377-20 500ksps SAR ADC. Combined
circuit performance achieves 50µV offset, 2ppm
INL, 102.7dBFS SNR and –123.5dB THD.
0
–40
Typical linearity performance for the combined circuit over the entire ±10V input
signal range, as shown in Figure 3, is
+2ppm, –1.3ppm at a sample rate of
500ksps. Linearity is limited by the INL of
the ADC and the CMRR of op amp U4.
The combined offset at the ADC input,
including the contributions of U4, U5
and U1, is measured at +50µV. The offset
of U3 has no effect on the offset of this
driver. A worst case analysis of offset at
the ADC input is calculated by adding
the maximum offsets of U1, U4 and U5:
4
3
2
INL (ppm)
–60
–80
–100
–120
0
–1
–3
–160
–180
1
–2
–140
–4
0
50
150
100
FREQUENCY (kHz)
200
–5
–10
250
Figure 2. Combined circuit FFT
–5
0
AIN (V)
5
10
Figure 3. Linearity vs input voltage
CIRCUIT PERFORMANCE
Typical AC performance for this circuit
includes THD of –123.5dB and SNR of
102.7d BFS at a sample rate of 500ksps with
a 100Hz input signal. This performance
can be seen in the FFT of Figure 2. The
THD and SNR performance are close to the
typical numbers found in the LTC2377-20
data sheet, indicating minimal performance degradation when using this driver.
5
fS = 500ksps
fIN = 99.182Hz
SNR = 102.7dBFS
THD = –123.5dB
–20
AMPLITUDE (dB)
R5 and R6 set the gain of inverting amplifier U3 at –0.5. C10 and C12, in combination with the resistors of U5, form 1.4MHz
filters on the ADC inputs. Additionally,
the resistor between pins 1 and 8 of U5
helps to isolate the output of U4 from
the charge spike that occurs when the
ADC goes from hold mode to sample mode.
The LTC6655A-5 (U2) is selected as the
reference for this circuit due to its ability to settle quickly from the transients
that occur on the REF pin during conversions and because of its low noise.
VOS(MAX) = BZE(MAX)U1+



VOS(MAX)U4  VREF
V
REF

+
−
∆R
2

 2
2+


R(MAX)U5 

VOS(MAX) = 13ppm • 10µV/ppm + 75µV/2 +
(5/2 – 5/(2.0001)) • 1E6µV
VOS(MAX) = 292µV = 29.2ppm
The LT1468A has a maximum input bias
current of ±40n A. For applications that
require higher input impedance, U4 can be
replaced with the LT1122A. The LT1122A is
a fast settling, JFET input op amp with
a maximum input bias current of 75pA.
Using the LT1122A in this circuit, the INL is
+6ppm, –1.1ppm, as shown in the op amp
performance comparison in Table 1.
The LTC2377-20 ADC has a typical supply current of 4.2m A at its full sample
rate of 500ksps. The LTC2377‑20 automatically powers down after a conversion and does not power up until the
next conversion is started. This auto
power-down feature reduces the power
dissipation of the ADC as the sample
rate is reduced to as little as 1µ A for
very low sample rate applications.
For low sample rate applications
where supply current is important,
the 5.2m A maximum supply current
of the LT1468A may be too high. The
LT1012A picoamp input current, microvolt offset, low noise op amp with a
maximum supply current of 500µ A at
(continued on page 38)
Table 1. Op amp performance comparison
MAX V OS (µV)
MAX I B (pA)
TYP I SY (mA)
MAX f S (ksps)
TYP INL (ppm)
LT1468A
75
40,000
5.2
500
+2, –1.3
LT1122A
600
75
10
500
+6, –1.1
LT1012A
90
150
0.6
125
+0.9, –0.5
July 2014 : LT Journal of Analog Innovation | 35
Complete Single IC Power Management Battery
Maintenance/Backup System for 48V Supplies
Jay Celani
A common trend for electronic devices is increased portability; it is no longer
universally acceptable for a device to turn off simply because somebody “pulled
the plug.” In order to implement portable functionality, devices must include
advanced power management systems that can control the path of power from
available sources to appropriate system outputs, keep a backup element charged
and ready, and ensure that a system has adequate power at all times.
Elegant, single-IC power management
solutions are readily available for many
portable devices, such as smart phones
or tablets, which operate at low voltages
and low power levels. Power management solutions for high power and high
voltage systems, such as those required
for many industrial or medical devices,
generally require cumbersome and
complex specialized discrete component
solutions. The LTC4020 simplifies power
management in these environments by
incorporating advanced power management functions into a high voltage
and high power single-IC solution.
The LTC4020 features an advanced
4-switch buck/boost DC/DC power converter, support for optimized battery
charging, and Linear Technology’s proprietary PowerPath™ system/battery power
management functionality. The LTC4020
manages power distribution between the
system input supply, the backup battery,
and the converter output in response to
load variations, battery charge requirements and input power limitations.
The single-inductor DC/DC buck/boost
controller can accept input voltages up to
55V and produce voltages that are lower,
higher, or the same as the input voltage. The onboard battery charger can be
36 | July 2014 : LT Journal of Analog Innovation
VIN
36V TO 55V
D1, D2: PMEG6010AED
D3: BZX84C6V2L
L1: COILCRAFT XAL1010
M1, M2, M3, M4: SiS862DN
RSENSEA
0.006Ω
(CSNL2512)
33µF
L1
15µH
M1
VOUT
53.75V
5A
M4
68µF
M3
M2
RSENSEB
0.006Ω
(CSNL2512)
(CORE LIMIT = 8.3A)
2.2µF
D1
INTVCC
PGND
D2
PVIN
BG2
BG1
SW2
SW1
TG2
TG1
LTC4020
BST1
SGND
SENSGND
RSHDN1
536k
(35V)
RSHDN2
20k
Figure 1. 36V to 55V to 24-cell leadacid (48V) float charger/system
supply with 265W converter output
capability, 5A battery charge current
and 53.75V system/float charge
voltage output
BST2
SGND
0.047µF
RT, 100k
1µF
D3
1µF
VC
SENSBOT
ITH
SENSTOP
VFBMAX
SENSVIN
RT
330pF
43k
51k
1nF
ILIMIT
CSOUT
100Ω
CSP
VIN_REG
0.33µF
CSN
SHDN
BGATE
MODE
STAT1
BAT
STAT2
VFBMIN
TIMER
FBG
RNG_SS
VFB
SGNDBACK
NTC
100Ω
RCS
0.01Ω
(CSNL2512)
5A MAX
100pF
RFB1
205k
RFB2 10k
24-CELL LEAD-ACID
(48V SYSTEM BATTERY)
design ideas
The LTC4020 features an advanced 4-switch buck/boost DC/DC power converter, support
for optimized battery charging, and Linear Technology’s proprietary PowerPath system/
battery power management functionality. The LTC4020 manages power distribution
between the system input supply, the backup battery, and the converter output in
response to load variations, battery charge requirements and input power limitations.
9
AVAILABLE TOTAL OUTPUT CURRENT (A)
6
5
ICHARGE (A)
4
3
2
1
0
48
49
50
51
52
53
54
VBATTERY (V)
Figure 2. Maximum battery charge current for the
circuit shown in Figure 1
configured to provide a constant-current/
constant-voltage (CC/CV) charge profile
optimized for lithium-based batteries, a 3-stage lead-acid battery charge
profile, or a modified timer-terminated
constant-current algorithm (CC), which
is similar to the lithium profile but does
not incorporate low voltage precondition and charge cycle restart functions.
USING CC MODE CHARGING TO
BEND THE RULES FOR A 48V
LEAD-ACID CHARGER
When the LTC4020 is configured in the
charge mode optimized for lead-acid
batteries, the regulation voltage during
absorption charging is 120% of the typical battery system voltage, or 14.4V for a
“12V” lead-acid battery. Unfortunately,
the built-in lead-acid charge algorithm
cannot be used for a 48V system battery, since the absorption charge voltage
would exceed the operating maximum
voltage for the LTC4020. This can be
easily addressed by implementing a
8
7
6
5
36 38 40 42 44 46 48 50 52 54 56
VIN (V)
Figure 3. Available converter output current (system
load current + battery charge current) vs input
voltage
high current float charger using the
constant-current (CC) charge algorithm.
The CC charge algorithm is enabled by
leaving the LTC4020’s MODE pin unconnected. A feedback resistor divider
programs the desired battery float charge
voltage, corresponding to VFB = 2.5V.
The CC charge algorithm enables the
full programmed charge current until
the float regulation voltage is achieved.
While maintaining the float regulation
voltage, a lead-acid float charger must
be able to continuously source current
into the battery, so the charge function
cannot terminate. CC charge mode can
accommodate this by setting TIMER = 0V,
which disables the timer function and
thus disables charge termination, so the
charge cycle will continue indefinitely.
48V SYSTEM POWER SUPPLY WITH
LEAD-ACID BATTERY BACKUP
Figure 1 shows an LTC4020 configured as
a 48V system supply with an integrated
backup battery float charger. The central
component of this supply is an average
current-mode buck/boost DC/DC controller, employing four external NFETs
as switching elements, which provides
265W of available output system power.
The converter operates from a
36V–55V input supply, with the converter limited to 8.3A of average inductor current. The converter current
limit is programmed by two 6mΩ sense
resistors (RSENSE1 and RSENSE2) placed
in series with SiS862DN switching FETs
M1 and M2. The DC/DC converter supports at least 5A at its output over
the entire operating voltage range.
RSHDN1 and RSHDN2 form a divider at the
SHDN pin, which sets the input shutdown voltage at VIN = 35V, disabling
July 2014 : LT Journal of Analog Innovation | 37
The LTC4020 preferentially provides power to the system load and battery
charging functions—the system load is always prioritized over charging
power—so battery charge current is reduced when necessary during periods
of heavy loads. Should the system load exceed the capabilities of the LTC4020
DC/DC converter, battery current will change direction, and load current will
be sourced from the battery to supplement the converter output.
the DC/DC converter and battery charger functions when the input is below
35V, so full load current is available
whenever the supply is enabled. The
SiS862DN switch FETs used here have a
typical QG of about 10nC each, so with
the operating frequency set to 250kHz
by resistor RT, the QG(TOTAL) • fO at
VIN = 55V falls within the LTC4020’s specified INTVCC pass element SOA guidelines.
The IC charges and maintains a 24-cell
(48V) lead-acid backup battery using
a constant-current/constant-voltage
charge profile as previously described.
The maximum battery charge current is
programmed by RCS to 5A, which is available until the full-charge float voltage of
53.75V is achieved. The battery voltage
is monitored by a resistor divider (RFB1
and RFB2), which programs the full-charge
float voltage of 53.75V (or 2.24V/cell).
This divider is referenced through the
FBG pin, which is shorted to ground when
the LTC4020 is operating, but becomes
high impedance when the IC is disabled,
reducing the parasitic load on the battery.
The LTC4020 preferentially provides power
to the system load and battery charging
functions—the system load is always prioritized over charging power—so battery
charge current is reduced when necessary
during periods of heavy loads. Should
the system load exceed the capabilities
of the LTC4020 DC/DC converter, battery
current will change direction, and load
current will be sourced from the battery
to supplement the converter output.
When the VIN supply is disconnected, all
LTC4020 functions cease and the battery
supplies required power to the output.
Reverse conduction from the battery
through the converter is blocked by
the switch FET M4, the battery voltage
monitor resistor divider is disconnected
via pin FBG, and total battery current
into the IC is reduced to less than 10µ A,
maximizing battery life should a noload storage condition be required.
CONCLUSION
The LTC4020 is a single-IC power management solution for any high power device
that requires battery backup or batterypowered remote operation. The integrated
buck/boost DC/DC controller can provide
power to a voltage rail that is above,
below or equivalent to the input voltage.
The IC employs an intelligent PowerPath
topology, merging the controller output
to a full-featured multi-chemistry battery
charger. The charger includes an internal
onboard timer for charge cycle control and
real-time charge cycle monitoring using
binary-coded status pins. Three pin-selectable charging profiles provide versatility to
accommodate most common battery types
with optimized charging characteristics. n
(LT1468A) continued from page 35)
±15V can replace the LT1468A for these
applications. With sample rates up to
125ksps, the LT1012A achieved a linearity of +0.9ppm, –0.5ppm, as shown
in the op amp performance comparison in Table 1. At sample rates above
125ksps, the INL performance begins to
degrade, as the op amp cannot settle fast
enough to accurately drive the ADC.
38 | July 2014 : LT Journal of Analog Innovation
CONCLUSION
The ADC driver circuit shown here converts
a single-ended ±10V signal to a ±5V fully
differential signal for the LTC2377-20
500ksps SAR ADC. Combined circuit
performance achieves 50µV offset, 2ppm
INL, 102.7dBFS SNR and –123.5dB THD.
The driver consists primarily of two
LT1468A op amps and a LT5400A matched
resistor array. Alternative versions of
this circuit use the LT1122A op amp to
provide 75pA max input current or the
LT1012A op amp at reduced sampling
rates to reduce supply current. DC2135,
a demo board version of this circuit, is
available from Linear Technology. n
new product briefs
New Product Briefs
SLAVE CURRENT-MODE STEP-DOWN
PHASE EXTENDER FOR UP TO 300A
WITH SUB-MILLIOHM DCR SENSING
The LTC3874 is a dual phase synchronous
step-down slave controller that generates
currents up to 300A when paired with a
companion master controller by extending the phase count in multiphase applications. Compatible master controllers
include the LTC3866, LTC3875 and LTC3774,
which all have true current-mode control
and enable the use of low (0.2mΩ) DC resistance (DCR) power inductors without
any sense resistor to maximize converter
efficiency and increase power density.
The LTC3874 complements Linear
Technology’s low DCR peak current mode
controllers and provides all functions
needed for multiphase slave designs,
including accurate phase-to-phase current
sharing even for dynamic loads. It operates over an input voltage range of 4.5V to
38V and produces a fixed output voltage
up to 5.5V. Up to 12 phases can be paralleled and clocked out-of-phase to minimize filtering. Applications include power
distribution, redundant (n+1) supplies,
industrial systems, DSP and ASIC power.
The LTC3874 operates at a fixed operating frequency from 250kHz to 1MHz,
or it can be synchronized to an external clock. The powerful 1.1Ω onboard
gate drivers minimize MOSFET switching
losses. Precise programmable current
sense threshold limits from 16mV to
72mV minimize power loss and accurately set the overcurrent trip point.
17V, 2.25MHz, SYNCHRONOUS
STEP-DOWN REGULATOR DELIVERS
2A AND REQUIRES ONLY 3.5µA OF
QUIESCENT CURRENT
The LTC3624 is a high efficiency, 17V inputcapable synchronous buck regulator
from Linear Technology that delivers
up to 2A of continuous output current
to outputs as low as 0.6V. Synchronous
rectification delivers efficiencies as high
as 95% while Burst Mode operation
requires only 3.5µ A of no load quiescent current. The LTC3624 switches
at a fixed 1MHz frequency, whereas
the LTC3624-2 switches at 2.25MHz.
Their constant frequency, current-mode
architecture minimizes switching noise
while offering very fast line and load transient response. The LTC3624/-2 operates
from an input voltage range of 2.7V to 17V,
making it ideal for single cell or multicell
Li-ion stack inputs as well as 12V intermediate bus-powered systems. The combination of its 3mm × 3mm DFN package,
high switching frequency and tiny, low
cost capacitors and inductors ensures
a highly compact solution footprint.
The LTC3624EDD and LTC3624EDD-2
are available in a 3mm × 3mm DFN-8
package. Industrial grade versions,
the LTC3624IDD and the LTC3624IDD-2
are guaranteed to operate over
the −40°C to 125°C operating junction temperature range.
DUAL MULTITOPOLOGY
DC/DC CONVERTERS WITH 50V, 2A
INTERNAL SWITCHES
The LT8471 is a dual DC/DC converter that
utilizes two internal 2A, 50V switches and
an additional 500m A switch to facilitate
step-down, step-up and inverting conversions. Each 2A channel can be independently configured as a buck, boost, SEPIC,
flyback, ZETA or inverting DC/DC converter.
This broad range of topologies and
output configurations makes it ideal for
a wide range of industrial and automotive applications. The LT8471 operates
from an input voltage range of 2.6V to
50V, making it suitable for applications
with input sources ranging from a singlecell Li-ion to automotive batteries.
The LT8471’s 50V internal switches can
accommodate applications with inputs
and outputs as high as 45V. The device is
capable of generating both positive and
negative outputs from a single converter, making it ideal for a wide array
of biasing applications. A small, integrated 500m A boost converter facilitates
both buck and single inductor inverting
applications at optimal efficiencies. The
LT8471’s switching frequency is programmable and synchronizable from 100kHz to
2MHz, which keeps externals very small.
The combination of a TSSOP package and
tiny externals ensures a very compact
footprint while minimizing solution cost.
The LT8471’s high efficiency 50V switches
deliver overall efficiencies up to 85% for
buck and inverting applications. From
a 6V to 32V input, the LT8471 delivers
up to 1.5A at 5V and 650m A at −5V. n
July 2014 : LT Journal of Analog Innovation | 39
highlights from circuits.linear.com
VIN
VIN
4.3V TO 29V
VOUT
VOUT
5V
•
RUN
•
LTM8057 2KV AC ISOLATED 5V µModule REGULATOR
The LTM®8057 is a 2kV AC isolated flyback μModule® (micromodule) DC/DC
converter. Included in the package are the switching controller, power switches,
transformer and all support components. Operating over an input voltage range of
3.1V to 31V, the LTM8057 supports an output voltage range of 2.5V to 12V, set by a
single resistor. Only input and output capacitors are needed to complete the design.
Other components may be used to control the soft-start control and biasing.
www.linear.com/solutions/5104
22µF
2.2µF
VOUT–
GND
BIAS
4.7µF
6.98k
SS
ADJ
LTM8057
2kV AC ISOLATION
LT8620 1.8V 2MHz STEP-DOWN CONVERTER
The LT8620 is a compact, high efficiency, high speed synchronous monolithic
step-down switching regulator that accepts a wide input voltage range
up to 65V and consumes only 2.5μA of quiescent current. Top and bottom
power switches are included with all necessary circuitry to minimize the
need for external components. Low ripple Burst Mode operation enables
high efficiency down to very low output currents while keeping the output
ripple below 10mVP-P. A SYNC pin allows synchronization to an external
clock. Internal compensation with peak current mode topology allows
the use of small inductors and results in fast transient response and good
loop stability. The EN/UV pin has an accurate 1V threshold and can be
used to program VIN undervoltage lockout or to shut down the LT8620,
reducing the input supply current to 1μA. A capacitor on the TR/SS pin
programs the output voltage ramp rate during start-up. The PG flag signals
when VOUT is within ±9% of the programmed output voltage as well as
fault conditions. The LT8620 is available in small 16-lead MSOP and 3mm
× 5mm QFN packages with exposed pads for low thermal resistance.
http://www.linear.com/solutions/5108
VIN
12V
0.091Ω
10µF
10µF
VIN
1µF
SW1
VINM5
VINS
PFO
2.49M
200k
6.8µH
402k
ICHG
VOUT
4V
47µF 1A (MAX)
3.3µH
665k
CFB
MODE
INTVCC
100µF
866k
10pF
GND
1M
2.4V
SCAP
1F TO 50F
LTC3355 SUPERCAPACITOR CHARGER
AND RIDE-THROUGH POWER SUPPLY
The LTC3355 is a complete input power interrupt
ride-through DC/DC system. The part charges a
supercapacitor while delivering load current to
VOUT, and uses energy from the supercapacitor
to provide continuous VOUT backup power
when VIN power is lost. The LTC3355 contains
a nonsynchronous constant frequency current
mode monolithic 1A buck switching regulator
to provide a 2.7V to 5V regulated output
voltage from an input supply of up to 20V.
www.linear.com/solutions/5112
332k
VCBST
IBSTPK
EXTERNAL SOURCE
>3.1V OR GND
1µF
VOUT
1.8V
2A
fSW = 2MHz
L: XFL4020
BOOST
EN_CHG
FB
18.2k
100k
SW2
CPGOOD
INTVCC
RT
VCAP
RSTB
BIAS
TR/SS
1µF
0.1µF
1µH
SW
LT8620
SYNC
4.7pF
PFOB
BST
EN/UV
10nF
FB
LTC3355
VIN
4.7µF
PG
BUCK VOUT
1A
PFI
VIN
3.4V TO 22V
(65V TRANSIENT)
154k
220pF
1µF
60.4k
200k
L, LT, LTC, LTM, Linear Technology, the Linear logo, Burst Mode, LTspice, µModule, PolyPhase and SmartMesh are registered trademarks, and Easy Drive, FracNWizard, Hot Swap, LTP, PowerPath, Silent Switcher and SmartMesh IP are trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective owners.
© 2014 Linear Technology Corporation/Printed in U.S.A./66K
Linear Technology Corporation
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(408) 432-1900
www.linear.com
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