VS-ST1230C..K Series www.vishay.com Vishay Semiconductors Phase Control Thyristors (Hockey PUK Version), 1745 A FEATURES • Center amplifying gate • Metal case with ceramic insulator • International standard case A-24 (K-PUK) • High profile hockey PUK • Designed and qualified for industrial level • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 TYPICAL APPLICATIONS • DC motor controls A-24 (K-PUK) • Controlled DC power supplies • AC controllers PRODUCT SUMMARY Package A-24 (K-PUK) Diode variation Single SCR IT(AV) 1745 A VDRM/VRRM 800 V, 1200 V, 1400 V, 1600 V VTM 1.62 V IGT 100 mA TJ -40 °C to 125 °C MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS IT(AV) Ths IT(RMS) Ths ITSM I2t A 55 °C 3200 A 25 °C 33 500 60 Hz 35 100 50 Hz 5615 60 Hz 5126 Typical TJ UNITS 1745 50 Hz VDRM/VRRM tq VALUES A kA2s 800 to 1600 V 200 μs -40 to 125 °C ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS TYPE NUMBER VOLTAGE CODE VS-ST1230C..K VRSM, MAXIMUM IDRM/IRRM MAXIMUM VDRM/VRRM, MAXIMUM REPETITIVE PEAK AND OFF-STATE VOLTAGE NON-REPETITIVE PEAK VOLTAGE AT TJ = TJ MAXIMUM V V mA 08 800 900 12 1200 1300 14 1400 1500 16 1600 1700 100 Document Number: 94395 1 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 16-Dec-13 VS-ST1230C..K Series www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER Maximum average on-state current at heatsink temperature Maximum RMS on-state current SYMBOL IT(AV) IT(RMS) TEST CONDITIONS 180° conduction, half sine wave double side (single side) cooled DC at 25 °C heatsink temperature double side cooled t = 10 ms Maximum peak, one-cycle non-repetitive surge current ITSM t = 8.3 ms t = 10 ms t = 8.3 ms t = 10 ms Maximum I2t for fusing I2t t = 8.3 ms t = 10 ms t = 8.3 ms Maximum I2√t for fusing I2√t VALUES UNITS 1745 (700) A 55 (85) °C 3200 No voltage reapplied 33 500 100 % VRRM reapplied 28 200 No voltage reapplied 35 100 Sinusoidal half wave, initial TJ = TJ maximum 100 % VRRM reapplied t = 0.1 to 10 ms, no voltage reapplied 29 500 5615 5126 3971 VT(TO)1 (16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum 0.93 High level value of threshold voltage VT(TO)2 (I > π x IT(AV)), TJ = TJ maximum 1.02 Low level value of on-state slope resistance rt1 (16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum 0.17 High level value of on-state slope resistance rt2 (I > π x IT(AV)), TJ = TJ maximum 0.16 Ipk = 4000 A, TJ = TJ maximum, tp = 10 ms sine pulse 1.62 VTM Maximum holding current IH Typical latching current IL TJ = 25 °C, anode supply 12 V resistive load kA2s 3625 56 150 Low level value of threshold voltage Maximum on-state voltage A 600 1000 kA2√s V mΩ V mA SWITCHING PARAMETER Maximum non-repetitive rate of rise of turned-on current SYMBOL dI/dt TEST CONDITIONS Gate drive 20 V, 20 Ω, tr ≤ 1 μs TJ = TJ maximum, anode voltage ≤ 80 % VDRM VALUES UNITS 1000 A/μs Typical delay time td Gate current 1 A, dIg/dt = 1 A/μs Vd = 0.67 % VDRM, TJ = 25 °C 1.9 Typical turn-off time tq ITM = 550 A, TJ = TJ maximum, dI/dt = 40 A/μs, VR = 50 V, dV/dt = 20 V/μs, gate 0 V 100 Ω, tp = 500 μs 200 SYMBOL TEST CONDITIONS VALUES UNIT S μs BLOCKING PARAMETER Maximum critical rate of rise of off-state voltage dV/dt TJ = TJ maximum linear to 80 % rated VDRM 500 V/μs Maximum peak reverse and off-state leakage current IRRM, IDRM TJ = TJ maximum, rated VDRM/VRRM applied 100 mA Document Number: 94395 2 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 16-Dec-13 VS-ST1230C..K Series www.vishay.com Vishay Semiconductors TRIGGERING PARAMETER SYMBOL Maximum peak gate power PGM Maximum average gate power VALUES TEST CONDITIONS PG(AV) typ. TJ = TJ maximum, tp ≤ 5 ms 16 TJ = TJ maximum, f = 50 Hz, d% = 50 3 IGM Maximum peak positive gate voltage + VGM Maximum peak negative gate voltage - VGM TJ = TJ maximum, tp ≤ 5 ms TJ = 25 °C Maximum required gate trigger/ current/voltage are the lowest value which will trigger all units 12 V anode to cathode applied TJ = 125 °C TJ = -40 °C VGT IGD DC gate voltage not to trigger VGD A V 5.0 IGT DC gate current not to trigger W 20 TJ = -40 °C DC gate voltage required to trigger UNITS 3.0 Maximum peak positive gate current DC gate current required to trigger Max. 200 - 100 200 50 - 1.4 - TJ = 25 °C 1.1 3.0 TJ = 125 °C 0.9 - TJ = TJ maximum Maximum gate current/ voltage not to trigger is the maximum value which will not trigger any unit with rated VDRM anode to cathode applied mA V 10 mA 0.25 V VALUES UNITS THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL Maximum operating junction temperature range Maximum storage temperature range Maximum thermal resistance, junction to heatsink TEST CONDITIONS TJ -40 to 125 TStg -40 to 150 RthJ-hs Maximum thermal resistance, case to heatsink RthC-hs DC operation single side cooled 0.042 DC operation double side cooled 0.021 DC operation single side cooled 0.006 DC operation double side cooled 0.003 Mounting force, ± 10 % Approximate weight Case style See dimensions - link at the end of datasheet °C K/W 24 500 (2500) N (kg) 425 g A-24 (K-PUK) ΔRthJC CONDUCTION CONDUCTION ANGLE 180° SINUSOIDAL CONDUCTION RECTANGULAR CONDUCTION SINGLE SIDE DOUBLE SIDE SINGLE SIDE DOUBLE SIDE 0.003 0.003 0.002 0.002 120° 0.004 0.004 0.004 0.004 90° 0.005 0.005 0.005 0.005 60° 0.007 0.007 0.007 0.007 30° 0.012 0.012 0.012 0.012 TEST CONDITIONS UNITS TJ = TJ maximum K/W Note • The table above shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC Document Number: 94395 3 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 16-Dec-13 VS-ST1230C..K Series 130 Vishay Semiconductors ST1230C..K Series (Single Side Cooled) R thJ-hs (DC) = 0.042 K/W 120 110 100 90 Conduction Angle 30˚ 80 60˚ 70 90˚ 60 120˚ 180˚ 50 40 0 200 400 600 800 1000 1200 1400 Maximum Allowable Heatsink Temperature (°C) Maximum Allowable Heatsink Temperature (°C) www.vishay.com 130 ST1230C..K Series (Double Side Cooled) R thJ-hs (DC) = 0.021 K/W 120 110 100 90 Conduction Period 80 30˚ 70 60˚ 60 90˚ 50 40 120˚ 30 180˚ 0 ST1230C..K Series (Single Side Cooled) R thJ-hs (DC) = 0.042 K/W 110 100 90 Conduction Period 80 70 60 30˚ 50 60˚ 90˚ 40 120˚ 30 180˚ DC 20 0 400 800 1200 1600 2000 Fig. 4 - Current Ratings Characteristics Maximum Average On-state Power Loss (W) Maximum Allowable Heatsink Temperature (°C) Fig. 1 - Current Ratings Characteristics 120 4000 180˚ 120˚ 90˚ 60˚ 30˚ 3500 3000 2500 RMS Limit 2000 1500 Conduction Angle 1000 ST1230C..K Series T J = 125˚C 500 0 0 ST1230C..K Series (Double Side Cooled) R thJ-hs (DC) = 0.021 K/W 110 100 90 Conduction Angle 80 70 30˚ 60˚ 60 90˚ 120˚ 50 180˚ 40 30 0 500 1000 1500 2000 800 1200 1600 2000 2400 2500 Average On-state Current (A) Fig. 3 - Current Ratings Characteristics Fig. 5 - On-State Power Loss Characteristics Maximum Average On-state Power Loss (W) Maximum Allowable Heatsink Temperature (°C) Fig. 2 - Current Ratings Characteristics 120 400 Average On-state Current (A) Average On-state Current (A) 130 500 1000 1500 2000 2500 3000 3500 Average On-state Current (A) Average On-state Current (A) 130 DC 20 5000 DC 180˚ 120˚ 90˚ 60˚ 30˚ 4000 3000 RMS Limit 2000 Conduction Period 1000 ST1230C..K Series T J = 125˚C 0 0 500 1000 1500 2000 2500 3000 3500 Average On-state Current (A) Fig. 6 - On-State Power Loss Characteristics Document Number: 94395 4 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 16-Dec-13 VS-ST1230C..K Series 30000 Vishay Semiconductors Peak Half Sine Wave On-state Current (A) Peak Half Sine Wave On-state Current (A) www.vishay.com At Any Rated Load Condition And With Rated VRRM Applied Following Surge. Initial TJ = 125˚C 28000 @ 60 Hz 0.0083 s @ 50 Hz 0.0100 s 26000 24000 22000 20000 18000 16000 ST1230C..K Series 14000 1 10 100 34000 32000 30000 Maximum Non Repetitive Surge Current Versus Pulse Train Duration. Control Of Conduction May Not Be Maintained. Initial TJ = 125˚C No Voltage Reapplied Rated VRRM Reapplied 28000 26000 24000 22000 20000 18000 16000 ST1230C..K Series 14000 12000 0.01 0.1 1 Pulse Train Duration (s) Number Of Equal Amplitude Half Cycle Current Pulses (N) Fig. 7 - Maximum Non-Repetitive Surge Current Single and Double Side Cooled Fig. 8 - Maximum Non-Repetitive Surge Current Single and Double Side Cooled Instantaneous On-state Current (A) 10000 TJ = 25˚C 1000 TJ = 125˚C ST1230C..K Series 100 0.5 1 1.5 2 2.5 3 Instantaneous On-state Voltage (V) (K/W) Fig. 9 - On-State Voltage Drop Characteristics 0.1 Transient Thermal Impedance Z thJ-hs Steady State Value R thJ-hs = 0.042 K/W (Single Side Cooled) R thJ-hs = 0.021 K/W (Double Side Cooled) 0.01 (DC Operation) ST1230C..K Series 0.001 0.001 0.01 0.1 1 10 100 Square Wave Pulse Duration (s) Fig. 10 - Thermal Impedance ZthJ-hs Characteristics Document Number: 94395 5 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 16-Dec-13 VS-ST1230C..K Series www.vishay.com 10 Rectangular gate pulse a) Recommended load line for rated di/dt : 20V, 10ohms; tr<=1 µs b) Recommended load line for <=30% rated di/dt : 10V, 10ohms tr<=1 µs (1) PGM = 16W, tp = 4ms (2) PGM = 30W, tp = 2ms (3) PGM = 60W, tp = 1ms (a) (b) IGD 0.1 0.001 Tj=-40 ˚ C VGD Tj=25 ˚ C 1 Tj=125 ˚ C Instantaneous Gate Voltage (V) 100 Vishay Semiconductors (1) (2) (3) Device: ST1230C..K Series 0.01 0.1 Frequency Limited by PG(AV) 1 10 100 Instantaneous Gate Current (A) Fig. 11 - Gate Characteristics ORDERING INFORMATION TABLE Device code VS- ST 123 0 C 16 K 1 - 1 2 3 4 5 6 7 8 9 1 - Vishay Semiconductors product 2 - Thyristor 3 - Essential part number 4 - 0 = Converter grade 5 - C = Ceramic PUK 6 - Voltage code x 100 = VRRM (see Voltage Ratings table) 7 - K = PUK case A-24 (K-PUK) 8 - 0 = Eyelet terminals (gate and auxiliary cathode unsoldered leads) 1 = Fast-on terminals (gate and auxiliary cathode unsoldered leads) 2 = Eyelet terminals (gate and auxiliary cathode soldered leads) 3 = Fast-on terminals (gate and auxiliary cathode soldered leads) 9 - Critical dV/dt: None = 500 V/µs (standard selection) L = 1000 V/µs (special selection) LINKS TO RELATED DOCUMENTS Dimensions www.vishay.com/doc?95081 Document Number: 94395 6 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Revision: 16-Dec-13 Outline Dimensions Vishay Semiconductors A-24 (K-PUK) DIMENSIONS in millimeters (inches) Creepage distance: 28.88 (1.137) minimum Strike distance: 17.99 (0.708) minimum 1 (0.04) MIN. 2 places 47.5 (1.87) DIA. MAX. 2 places Pin receptable AMP. 60598-1 27.5 (1.08) MAX. 67 (2.6) DIA. MAX. 20° ± 5° 74.5 (2.9) DIA. MAX. 4.75 (0.2) NOM. 44 (1.73) 2 holes DIA. 3.5 (0.14) x 2.1 (0.1) deep Quote between upper and lower pole pieces has to be considered after application of mounting force (see thermal and mechanical specification) Document Number: 95081 Revision: 02-Aug-07 For technical questions, contact: [email protected] www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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