DESIGN FEATURES High Efficiency Synchronous PWM Controller Boosts 1V to 3.3V or 5V by San-Hwa Chee Introduction CPU power supplies continue to fall toward the 1V level, although other circuits still require the traditional 3.3V or 5V rails. Since the LTC1700 is capable of operating at an input voltage as low as 0.9V, it can boost the latest CPU power supply voltages to provide the missing 3.3V or 5V rail. The LTC1700 uses a constant frequency, current mode PWM architecture but does not require a current sense resistor; instead, it senses the VDS across the external N-channel MOSFET. This reduces component count and improves high load current efficiency. Efficiency is further increased at high load currents through the use of a synchronous P-channel MOSFET. With Burst Mode operation selected, efficiency at low load currents is enhanced, thereby providing high efficiency over the C1 22µF L1 1.8µH 2 R3 220Ω C3 220pF C5 220pF C4 0.1µF 4 1 3 5 R2 100k ITH LTC1700 RUN/SS SGND VFB SYNC/MODE SW BG PGND TG VOUT C2 68µF 6.3V VIN 3.3V TO 4.2V M2 10 8 + C6 10µF M1 + 9 6 7 R1 316k C1: TAIYO YUDEN LMK432BJ226MM CERAMIC C2: AVX TAJB686K006R C6: TAIYO YUDEN JMK316BJ106ML CERAMIC C7: SANYO POSCAP 6TPB330M L1: TOKO 919AS–1R8N (D104C TYPE) M1: SILICONIX Si9804 M2: SILICONIX Si9803 (408) 573-4150 (207) 282-5111 (619) 661-6835 (800) 554-5565 VOUT 5V/2A C7 330µF 6V entire load current range. The LTC1700 operates at 530kHz but can be externally synchronized to frequencies between 400kHz and 750kHz. During continuous mode operation, the LTC1700 consumes 540µA; it drops to 180µA in Sleep mode. In shutdown, the quiescent current is just 10µA. The LTC1700 is available in the 10-lead MSOP package. 3.3V to 4.2V Input, 5V/2A Output Regulator Figure 1 shows a 10W output application circuit. Since the LTC1700 is operating at 530kHz, a small valued inductor is sufficient for this circuit. The input capacitors consist of a small 22µF ceramic capacitor in parallel with a B-case size tantalum capacitor. The ceramic capacitor provides a low overall ESR while the tantalum provides the bulk capacitance. In applications where the input is connected very close to a low impedance supply, the input tantalum capacitor may not be needed. A Sanyo POSCAP capacitor is used for the output capacitor because of its high ripple Figure 1. 3.3 to 4.2V input, 5V/2A output converter OUTPUT VOLTAGE RIPPLE (AC COUPLED) 100mV/DIV 100 EFFICIENCY (%) 90 VIN = 4.2V 80 VIN = 3.3V 70 INDUCTOR CURRENT 2A/DIV 60 50 0.001 1.000 0.100 0.010 LOAD CURRENT (A) Figure 2. Efficiency of Figure 1’s circuit 24 VIN = 3.7V LOAD STEP = 100mA TO 1.75A 0.2ms/DIV Figure 3. Load-step response of Figure 1’s circuit Linear Technology Magazine • February 2001 DESIGN FEATURES VOUT 1.205V REFERENCE 7 VIN + C1 PARASITIC DIODE OF MOSFET C2 L1 + – SC VOUT SW = 1 WHEN VOUT = <2.3V 10 + C6 C7 SHDN TO TG START-UP OSCILLATOR S QB L1 R M1 Q + ICMP 60mV 1Ω – LTC1700 Figure 4. Start-up components of the LTC1700 Start-Up and MOSFET Selection When the voltage at the VOUT pin is below 2.3V, the LTC1700 operates in the start-up mode. In this mode, only the start-up circuitry in the LTC1700 is active and both of the external MOSFETs are turned off. Figure 4 shows the components that control start-up. In this mode, the current limit is set at 60mA and the internal MOSFET is used to bring the output voltage up. The start-up oscillator, C1 10µF L1 4.6µH 220pF 2.2k 1 2 270pF 470pF 4 3 R2 100k R1 95.3k 5 SGND LTC1700 SW BG ITH PGND RUN/SS TG VFB VOUT SYNC/MODE M1 9 6 7 150pF C1: TAIYO YUDEN JMK316BJ106ML CERAMIC C2: AVX TAJB686K006R C3: TAIYO YUDEN JMK325BJ226M CERAMIC C4: SANYO POSCAP 6TPA150M L1: SUMIDA CEP1234R6 M1: SILICONIX Si6466 M2: FAIRCHILD FDS6375 C2 68µF 6.3V VIN 3.3V M2 10 8 + C3 22µF + which is different from the main oscillator, runs at 210kHz at a duty cycle of 50%. Due to the low current limit, the output should not be heavily loaded during the start-up phase, as this will cause the output to “hang.” Once the output rises above 2.3V, the rest of the internal circuitry of the LTC1700 comes alive and the external MOSFETs begin switching. The start-up circuitry will then be shut down. In some applications, the input voltage is high enough that start-up mode is not needed, resulting in the VOUT 5V/3A C4 150µF 6.3V ×3 100 90 EFFICIENCY (%) current rating. Once again, a ceramic capacitor is used in parallel with the POSCAP for reduced ESR and high frequency decoupling. Figure 2 shows the efficiency curves for input voltages of 3.3V and 4.2V. Note that the maximum efficiency reaches 95% at a load current of 2A. A load step from 100mA to 1.75A was applied and its response is shown in Figure 3. 80 70 (408) 573-4150 (207) 282-5111 60 (619) 661-6835 (847) 956-0667 (800) 554-5565 (408) 822-2126 50 0.001 Figure 5. 3.3V input to 5V/3A output regulator Linear Technology Magazine • February 2001 1.000 0.100 0.010 LOAD CURRENT (A) Figure 6. Efficiency of Figure 5’s circuit 25 DESIGN FEATURES OUTPUT VOLTAGE RIPPLE (AC COUPLED) 100mV/DIV INDUCTOR CURRENT 2A/DIV VIN = 3.3V LOAD STEP = 300mA TO 2.6A 0.2ms/DIV Figure 7. Load-step response of Figure 5’s circuit circuit being able to power up at full load current. Figure 1 shows an example of this. The required input voltage to power up with full load current is: VIN > 2.3 + VF where VF is the forward voltage of the parasitic diode across the external P-channel MOSFET, which is dependent on the load current. For a load current less than 3A, a VF of 0.75V can be used. Since the switchover from the internal MOSFET to the external MOSFETs occurs at VOUT = 2.3V, the MOSFETs selected should have a Figure 5 shows a 3.3V input to 5V output circuit that can provide a maximum of 3A output current. Like the circuit in Figure 1, this circuit will bypass the start-up mode and therefore is capable of starting up at full load. Figure 6 shows that its efficiency reaches 88% at load currents of 2A to 3A. Figure 7 shows the load step response. 1 2 200pF 0.1µF 4 3 100k The circuit shown in Figure 8 is capable of supplying 4A of load current. To obtain this output current capability, two IRF7811A N-channel MOSFETs are paralleled to obtain the required peak inductor current. Two Si9803DY are used for the synchronous P-channel MOSFET because of the amount of RMS current through these devices. The Si9803DYs are mounted on an area of copper adequate to effectively remove the maximum amount of heat. Due to the 3.3V Input, 5V/3A Output Regulator C1 22µF L1 0.68µH 220pF 2.2k 3.3V Input, 5V/4A Output Regulator threshold of 2.5V or lower. This will guarantee a smooth transition out of the start-up mode. 5 SGND LTC1700 SW BG ITH RUN/SS PGND TG VFB SYNC/MODE VOUT 9 6 C2 68µF 6.3V VIN 3.3V M2 10 8 + M1 C5 4.7µF C3 22µF + VOUT 5V/4A C4 150µF 6.3V ×2 7 316k C1: TAIYO YUDEN JMK316BJ226ML CERAMIC C2: AVX TAJB686K006R C3: TAIYO YUDEN JMK325BJ226M CERAMIC C4: PANASONIC EEUEOJ151R L1: SUMIDA CDEP134-0R6NC-H M1: SILICONIX Si9803 ×2 M2: INTERNATIONAL RECTIFIER IR7811 ×2 (408) 573-4150 (207) 282-5111 (714) 373-7334 (847) 956-0667 (800) 554-5565 (408) 822-2126 Figure 8. 3.3V input, 5V/4A output regulator 26 Linear Technology Magazine • February 2001 DESIGN FEATURES L1 2.2µH 470pF 33k 1 2 300pF 470pF 4 3 30k 5 SGND LTC1700 SW BG ITH PGND RUN/SS TG VFB SYNC/MODE VOUT C2 68µF 6.3V C3 22µF M1 9 6 100 90 M2 10 8 + + EFFICIENCY (%) C1 10µF VIN 2.5V VOUT 3.3V/1.8A C4 220µF 6.3V Burst Mode OPERATION ENABLED 80 70 Burst Mode OPERATION DISABLED 60 7 50 53.6k 40 0.001 C1: TAIYO YUDEN JMK316BJ106ML CERAMIC C2: AVX TAJB686K006R C3: TAIYO YUDEN JMK325BJ226M CERAMIC C4: KEMET T520D227M00AS L1: MURATA LQN6C M1: SILICONIX Si9802 M2: SILICONIX Si9803 0.100 0.010 LOAD CURRENT (A) 1.000 (408) 573-4150 (207) 282-5111 (408) 986-0424 (814) 237-1431 (800) 554-5565 Figure 10. Efficiency of Figure 9’s circuit Figure 9. 2.5V input, 3.3V/1.8A output regulator 2.5V Input, 3.3V/1.8A Output Regulator high RMS ripple current going into the output capacitors, two Panasonic SP capacitors are required. The maximum efficiency of 92% occurs at load currents between 2A to 3A. This circuit has no problem starting up into a load that exhibits a resistive characteristic. Figure 9 shows a circuit that takes an input of 2.5V and steps it up to 3.3V. Both MOSFETs are selected with a guaranteed threshold voltage of 3V. Its efficiency and load step response are shown in Figures 10 and 11, respectively. Due to its low input voltage, this circuit cannot start up into a heavy load. Conclusion Through the use of VDS sensing and a synchronous topology, the LTC1700 provides high efficiency at high load currents. Selectable Burst Mode operation allows high efficiency to be obtained at low load currents. With its low operating voltage, the LTC1700 can easily be used to step up low voltages to the traditional 3.3V or 5V supply rails. OUTPUT VOLTAGE RIPPLE (AC COUPLED) 100mV/DIV INDUCTOR CURRENT 2A/DIV VIN = 2.5V LOAD STEP = 100mA TO 1.6A 100µs/DIV Figure 11. Load-step response of Figure 9’s circuit Linear Technology Magazine • February 2001 27