LTC1700 No RSENSE Synchronous Step-Up DC/DC Controller U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC®1700 is a current mode synchronous step-up DC/DC controller that drives external N-channel and P-channel power MOSFETs using a constant frequency PWM architecture. Current limiting is provided by sensing the voltage drop across the main MOSFET, eliminating the need of a sense resistor. This No RSENSETM technique helps the LTC1700 maintain high efficiency at heavy loads while Burst Mode operation ensures high efficiency at light loads, thus providing high efficiencies over a wide range of load currents. High Efficiency: Up to 95% No Current Sense Resistor Required Constant Frequency 530kHz Operation Allows Small Size, Surface Mount Inductors OPTI-LOOPTM Compensation Minimizes COUT Selectable Burst ModeTM Operation Minimum Start-Up Voltage as low as 0.9V Synchronizable Between 400kHz and 750kHz Micropower Shutdown: 10µA Current Mode Operation for Excellent Line and Load Transient Response Soft-Start Reduces Supply Current Transients 1.5% Output Voltage Accuracy Uses Low Value, Small Size, Surface Mount Inductors Available in 10-Lead MSOP Package The LTC1700 operates at a minimum input voltage as low as 0.9V. The device boasts a ±1.5% output voltage accuracy and consumes only 200µA of quiescent current. In shutdown, it only draws 10µA. U APPLICATIO S ■ ■ ■ ■ ■ ■ To prevent inductor current runaway, the duty cycle is limited to 90%. Overvoltage protection is also provided which shuts both the external MOSFETs off when tripped. Cellular Telephones Wireless Modems RF Communications 2.5V to 3.3V, 2.5V to 5V Converters Battery-Powered Equipment Telecom/Network Systems High constant operating frequency of 530kHz allows the use of small inductors and output capacitors. The LTC1700 can also be synchronized between 400kHz to 750kHz. Burst Mode operation is inhibited when the device is externally clocked or when the SYNC/MODE pin is pulled low to reduce noise and RF interference. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode, OPTI-LOOP and No RSENSE are trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO L1 1.8µH 2 C5 220pF R3 2200Ω 4 C3 220pF C4 0.1µF 1 3 R2 100k 5 R1 316k ITH SW RUN/SS BG M1 VFB 5V 2A TG SYNC/MODE VOUT 9 C7 330µF 6V 6 80 VIN = 4.2V VIN = 3.3V 70 60 7 50 1700 • F01a C1: CERAMIC TAIYO YUDEN LMK432BJ226MM C2: AVX TAJB686K006R L1: TOKO 919AS-IR8N (D104C TYPE) 90 C6 10µF + PGND Efficiency vs Load Current 100 LTC1700 SGND VIN 3.3V to 4.2V C2 68µF 6.3V M2 10 8 C1 22µF + EFFICIENCY (%) ■ DESCRIPTIO C6: CERAMIC TAIYO YUDEN JMK316BJ106ML C7: SANYO POSCAP 6TPB330M M1: SILICONIX Si9804 M2: SILICONIX Si9803 40 0.001 0.01 0.1 LOAD CURRENT (A) 1.0 1700 F01b Figure 1. High Efficiency Step-Up Converter 1 LTC1700 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) Output Supply Voltage (VOUT) .....................– 0.3V to 6V RUN/SS, VFB Voltages ..............................– 0.3V to 2.4V SYNC/MODE, ITH Voltages ...........................– 0.3V to 6V SWITCH Voltage (SW) ..............................– 0.3V to 6.5V TG, BG Peak Output Current (<10µs) ......................... 1A Operating Temperature Range (Note 2) ...–40°C to 85°C Junction Temperature (Note 3) ............................. 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW SGND ITH VFB RUN/SS SYNC/MODE 10 9 8 7 6 1 2 3 4 5 SW PGND BG VOUT TG LTC1700EMS MS10 PART MARKING MS10 PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 150°C/W LTLC Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VOUT = 3V unless otherwise specified. SYMBOL PARAMETER CONDITIONS TYP MAX VSOP Start-Up Minimum Operating Voltage (Note 4) 0.9 1.8 V VOP Minimum Operating Voltage Hysteresis (Note 5) VOUT Ramping Up 2.34 90 2.6 V mV IS Input DC Supply Current Normal Mode Sleep Mode Start-Up Mode Shutdown (Note 6) VFB = 1.6V, VMODE = 0V, VRUN/SS = 3V VFB = 1.6V, VMODE = 3V, VRUN/SS = 3V VFB = 0V, VMODE, VRUN/SS, VOUT = 1.8V VFB = 0V, VMODE = 3V, VRUN/SS = 0V 536 179 35 10 620 210 45 14 µA µA µA µA IVFB Feedback Current VFB = 1.20V 1 50 nA VFB Regulated Output Voltage (Note 7) 1.205 1.223 V ∆VOSENS Reference Voltage Line Regulation VIN = 2.7V to 5V (Note 7) 0.0106 0.080 %/V VLOADREG Output Voltage Load Regulation Measured in Servo Loop; VITH = 0.3V to 0.9V 0.036 0.065 % VOVL Output Overvoltage Lockout Reference to Nominal VFB VRUN/SS Shutdown Threshold VRUN/SS Ramping Up IRUN/SS Soft-Start Current Source VRUN/SS = 0V fOSC Oscillator Frequency Start-Up Oscillator Frequency VOUT = 4.2V VOUT = 1.8V, VRUN/SS = 1.8V, VSW = 1.1V VSYNC/MODE SYNC/MODE Threshold VSYNC/MODE Ramping Down from 1.2V DC MAX Maximum Duty Cycle fOSC = 550kHz ∆VSENSE(MAX) Maximum Current Sense Voltage ILIMIT Current Limit At Start-Up VOUT = 1.8V gm Transconductance of Error Amplifier VFB = VREF ± 10mV ● ● ● ● 1.187 UNITS 2.5 4.8 9 % 0.7 1.09 1.2 V 2 3.79 6 µA 460 150 530 225 630 kHz kHz 1.03 1.13 1.25 V 84 88 92 % 55 63 78 100 mV mV 40 60 0.65 0.9 mA 1.30 m Ω 2 MIN LTC1700 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VOUT = 3V unless otherwise specified. SYMBOL PARAMETER CONDITIONS TG tr TG tf TG Transition Time TG Gate Drive Rise Time TG Gate Drive Fall Time BG tr BG tf tdll tdhh TYP MAX UNITS CLOAD = 3000pF, 10% to 90% CLOAD = 3000pF, 90% to 10% 60 60 100 100 ns ns BG Transition Time BG Gate Drive Rise Time BG Gate Drive Fall Time CLOAD = 3000pF, 10% to 90% CLOAD = 3000pF, 90% to 10% 80 50 100 70 ns ns Dead Time BG and TG Gates Go Low BG and TG Gates Go High CLOAD = 3000pF on BG and TG CLOAD = 3000pF on TG and BG 88 66 110 90 ns ns Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1700E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • 150°C/W) MIN Note 4: At an input supply less than 2.3V, only the start-up circuitry of the LTC1700 is active. This test ensures the start-up circuitry is working. Note 5: An input supply at or above this minimum operating voltage activates the main control loop. Start-up circuitry of the LTC1700 is shut off. Note 6: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 7: The LTC1700 is tested in a feedback loop that servos VFB to the feedback point for the error amplifier (VITH = 0.6V) U W TYPICAL PERFORMANCE CHARACTERISTICS Shutdown Current vs Supply Voltage 20 1.208 18 1.206 16 1.204 1.202 1.200 1.198 1.196 1.194 250 14 12 10 8 6 4 200 150 100 50 2 1.192 1.190 – 55 –35 –15 Quiescent Current vs Supply Voltage QUIESCENT CURRENT (µA) 1.210 SHUTDOWN CURRENT (µA) REFERENCE VOLTAGE (V) Reference Voltage vs Temperature 0 0 5 25 45 65 85 105 125 TEMPERATURE (°C) 1700 G01 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) 1700 G02 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) 1700 G03 3 LTC1700 U W TYPICAL PERFORMANCE CHARACTERISTICS Normalized Oscillator Frequency vs Temperature Minimum Operating Voltage vs Temperature 1.08 1.4 5 1.06 1.2 4 3 2 1 START-UP VOLTAGE (V) 6 NORMALIZED FREQUENCY RUN/SS CURRENT (µA) RUN/SS Current vs Temperature 1.04 1.02 1.00 0.98 5 25 45 65 85 105 125 TEMPERATURE (°C) 0.94 – 55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 1.0 Maximum Current Sense Voltage vs Temperature 0.8 2.22 0.6 2.20 Efficiency vs Load Current (Burst Mode Operation Disabled) 100 EFFICIENCY (%) START-UP CURRENT LIMIT (A) SENSE VOLTAGE (mV) 90 0.10 0.08 0.06 60 5 25 45 65 85 105 125 TEMPERATURE (°C) 40 0.001 0.1 0.01 LOAD CURRENT (A) 1.0 1700 G09 3.3V Output Efficiency, Circuit of Figure 1 With Burst Mode Operation Inhibited 100 Load Step Transient Response Burst Mode Operation Enabled 100 VIN = 2.7V A/C COUPLED OUTPUT VOLTAGE (0.2V/DIV) 90 80 VIN = 2V EFFICIENCY (%) EFFICIENCY (%) VIN = 3.3V 1700 G8 3.3V Output Efficiency, Circuit of Figure 1 With Burst Mode Operation 70 60 40 40 1.0 1700 G10 VIN = 2V INDUCTOR CURRENT (2A/DIV) 60 50 0.01 0.1 LOAD CURRENT (A) VIN = 2.7V 70 50 4 70 50 1700 G7 30 0.001 80 0.04 0 – 55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) VIN = 4.2V 0.12 0.02 80 2.14 5 25 45 65 85 105 125 TEMPERATURE (°C) 1700 G6 0.14 90 2.18 2.16 0 – 55 –35 –15 0.16 60 – 55 –35 –15 MAIN CONTROLLER 0.4 Start-Up Current Limit vs Temperature 90 70 2.24 1700 G5 1700 G04 80 2.26 START-UP CIRCUIT 0.2 0.96 0 – 55 –35 –15 2.28 30 0.001 VIN = 3.3V VOUT = 5V 0.1 0.01 LOAD CURRENT (A) 1.0 1700 F16 2A/DIV VSYNC = VIN LOAD STEP = 100mA TO 1.7A 1700 G12 LTC1700 U W TYPICAL PERFORMANCE CHARACTERISTICS Load Step Transient Response Burst Mode Operation Inhibited Load Step Transient Response Burst Mode Operation Enabled Load Step Transient Response Burst Mode Operation Inhibited A/C COUPLED OUTPUT VOLTAGE (0.2V/DIV) A/C COUPLED OUTPUT VOLTAGE (0.2V/DIV) A/C COUPLED OUTPUT VOLTAGE (0.2V/DIV) INDUCTOR CURRENT (2A/DIV) INDUCTOR CURRENT (2A/DIV) INDUCTOR CURRENT (2A/DIV) 1700 G13 VIN = 4.2V VOUT = 5V 2A/DIV VSYNC = VIN LOAD STEP = 100mA TO 1.7A 1700 G15 1700 G14 VIN = 4.2V VOUT = 5V 2A/DIV VSYNC = 0V LOAD STEP = 100mA TO 1.7A U VIN = 3.3V VOUT = 5V 2A/DIV VSYNC = 0V LOAD STEP = 100mA TO 1.7A U U PIN FUNCTIONS SGND (Pin 1): Small-Signal Ground. Must be routed separately from other grounds to the (–) terminal of COUT. ITH (Pin 2): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is 0V to 1.18V. VFB (Pin 3): Receives the feedback voltage from an external resistive divider across the output capacitor. RUN/SS (Pin 4): Combination of Soft-Start and Run Control Inputs. A capacitor to ground at this pin sets the ramp time to full output current. The time is approximately 0.45s/µF. Forcing this pin below 1.08V causes all circuitry to be shut down. SYNC/MODE (Pin 5): This pin performs three functions. A voltage greater than 1.2V on this pin allows Burst Mode operation at low load currents, while grounding or applying a clock signal on this pin defeats Burst Mode operation. An external clock between 400kHz and 750kHz applied to this pin forces the LTC1700 to operate at the external clock frequency. Do not attempt to synchronize below 400kHz or above 750kHz. TG (Pin 6): Top Gate Drive. Drives the external synchronous P-channel MOSFET with a voltage swing between 0V to VOUT. VOUT (Pin 7): This pin performs two functions. It serves as the supply pin and also as one of the inputs to the current reversal comparator. BG (Pin 8): Bottom Gate Drive. Drives the external main N-channel MOSFET with a voltage swing between 0V to VOUT. PGND (Pin 9): Top and Bottom Gate Drivers Ground. Connects to the (–) terminal of COUT. Source of the main N-channel MOSFET must be connected close to this pin since this pin is also one of the inputs to the VDS sense amplifier. SW (Pin 10): This pin connects to the inputs of two comparators: The VDS sense amplifier and the current reversal comparator. The drain of an internal N-channel start-up MOSFET (M1) is also connected to this pin. 5 LTC1700 W FUNCTIONAL DIAGRA U U VCC Y = “0” ONLY WHEN X IS A CONSTANT “1”, OTHERWISE Y = “1” Y BURST INHIBIT X SYNC/ MODE SLOPE COMP 5 MAIN OSC ITH 0.36V 90% DUTY CYCLE LIMIT 2 – VFB 3 + – EA 1.205V + – Ω gm = 0.9m SLEEP VOUT BURST 0.12V + 6 TG VOUT VOUT 7 1.205V REFERENCE VREF + 58mV RUN/ SOFT-START – OV VFB 3.8µA RUN/SS 4 + SWITCHING LOGIC AND BLANKING CIRCUIT VOUT 8 BG SGND 1 – + SC 9 PGND VOUT = “1” WHEN VOUT < 2.3V + IRCMP 9mV SHDN START-UP OSCILLATOR – SW 10 S QB L1 R Q M1 + VDS + – ICMP 1Ω – 60mV 1700 • FD U OPERATIO (Refer to Functional Diagram) Main Control Loop The LTC1700 is a constant frequency, current mode controller for DC/DC step-up converters. In normal operation, the main external N-channel power MOSFET is turned on when the oscillator sets a latch and turned off either when the VDS sense amplifier (VDS) resets the latch or the duty cycle has reached 90%. When the main MOSFET is turned off, the synchronous rectifier P-channel MOSFET is 6 turned on until either the inductor current is about to reverse, as determined by the current reversal comparator (IRCMP), or the next cycle begins. Inductor current is measured by sensing the VDS potential across the conducting MOSFET. The peak inductor current is controlled by the voltage on the ITH pin, which is the output of the error amplifier (EA). An external resistive divider connected between VOUT and GND allows EA to receive an LTC1700 U OPERATIO output feedback voltage VFB. When the load current increases, it causes a slight decreases in VFB relative to the 1.205V reference, which in turn causes the ITH voltage to increase until the average inductor current matches the new load current. The internal oscillator can be synchronized to an external clock applied to the SYNC/MODE pin and can lock to a frequency between 400kHz to 750kHz. When not synchronized, the oscillator runs at 530kHz. The main control loop is shut down by pulling the RUN/SS pin low. Releasing the RUN/SS pin allows an internal 3.8µA current source to charge up an external soft-start capacitor (CSS). When this voltage reaches 0.8V, the main control loop is enabled with the ITH voltage clamped at approximately 5% of its maximum value. As CSS continues to charge, ITH is gradually released allowing normal operation to resume. An overvoltage comparator 0V guards against transient overshoots greater than 5% above regulated voltage by turning off both the external MOSFETs and keeping them off until the fault is removed. To prevent excessive inductor current buildup, the main N-channel MOSFET is only allowed to turn on for a maximum duty cycle of 90%. Burst Mode Operation The LTC1700 can be enabled to go into Burst Mode operation at low load currents simply by connecting the SYNC/MODE pin to a voltage of at least 1.2V. In this mode, the peak current of the inductor is set as if VITH = 0.36V (at low duty cycles) even though the voltage at the ITH pin is actually at a lower value. If the inductor’s average current is greater than the load requirement, the voltage at the ITH pin will drop. When the ITH voltage goes below 0.12V, the internal sleep signal goes low, turning off both external MOSFETs. Now the load current will solely be supplied by the output capacitor and the output voltage begins to droop. This drooping of the output voltage results in the rise of ITH voltage and once it has risen above 0.22V, switching will then be resumed on the next oscillator cycle. Frequency Synchronization The LTC1700 can be externally driven by a CMOS (0V to 1.2V) compatible clock signal between 400kHz and 750kHz. Do not synchronize the LTC1700 below 400kHz or above 750kHz as this may cause abnormal operation. During synchronization, Burst Mode operation is inhibited. Low Input Operation When the voltage at VOUT is less than 2.3V, the LTC1700 operates in the “start-up” mode. In this mode, most internal circuitry is turned off except the start-up oscillator, current comparator (ICMP) and the start-up comparator (SC). The voltage at pins TG and BG are forced to ensure both the external MOSFETs are off. The start-up oscillator runs at about 210kHz at 50% duty cycle and is used to set the latch (L1) which turns on the internal MOSFET M1 (see Functional Diagram). When the inductor’s current reaches 60mA, the current comparator (ICMP) is tripped and resets the latch. This turns M1 off and the parasitic diode of the external P-channel MOSFET is used to transfer the energy from the inductor to the output capacitor. The above cycle repeats again on the next oscillator pulse. When the output voltage rises above 2.3V, the start-up comparator will trip, powering up the rest of the LTC1700. All start-up circuitry will then be turned off. Now the LTC1700 has successfully transitioned out of its start-up mode and commences normal operation as described under the section “Main Control Loop.” Protection Circuitry Two protection circuits are incorporated into the LTC1700. To prevent the inductor from saturating the maximum duty cycle of the regulator is limited to 90%. This is done to ensure that at least 10% of the time energy is being transferred from the inductor to the output capacitor. Output overvoltage protection is also provided. Should the output rises about 5% above the regulated value, both the external MOSFETs will be forced off. 7 LTC1700 U W U U APPLICATIONS INFORMATION The LTC1700 requires two external power MOSFETs, one for the main switch (N-channel) and one for the synchronous rectifier (P-channel). Since the voltage operating range of the LTC1700 is limited to less than 6V, the breakdown voltage of the MOSFETs is not a concern. Therefore the MOSFETs parameters that should be used for selecting the power MOSFETs are threshold voltage VGS(TH), on-resistance RDS(ON), reverse transfer capacitance CRSS and maximum current ID(MAX). The gate drive voltage is set by the output voltage, VOUT. Since the LTC1700 exits the start-up mode at 2.3V, sublogic level threshold MOSFETs should be used in LTC1700 applications. Newer MOSFETs with guaranteed RDSON at gate voltage of 1.8V are now available and will work very well with the LTC1700. The MOSFETs on-resistance is chosen based on the required load current. The maximum average output current IO(MAX) is : IO(MAX) = (IPK – 0.5∆I)(1 – DC) For 25°C operating condition, set ∆VSENSE = 65mV. For conditions that vary over the full temperature range, set ∆VSENSE = 55mV. The ρT is a normalized term accounting for the significant variation in RDS(ON) with temperature, typically about 0.375%/°C as shown in Figure 2. Junction to case temperature TJC is around 10°C in most applications. For a maximum ambient temperature of 70°C, using ρ80°C ≅ 1.2 in the above equation is a reasonable choice. This equation is plotted in Figure 3 to illustrate the dependence of maximum output current on R DS(ON) , assuming ∆I = 0.4IO(MAX). 1.5 ρT NORMALIZED ON RESISTANCE Power MOSFET Selection where: 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 –55 –35 –15 IPK = Peak Inductor Current ∆I = Inductor Ripple Current 5 25 45 65 85 105 125 TEMPERATURE (°C) 1700 F02 Figure 2. RDS(ON) vs Temperature DC = Duty Cycle RDS(ON)(MAX) ≅ 5.0 4.5 MAXIMUM OUTPUT CURRENT (A) The peak inductor current is inherently limited in a current mode controller. The maximum VDS sense voltage of the main MOSFET is limited to 78mV. The LTC1700 will not allow peak inductor current to exceed 78mV/ RDS(ON)(N-CHANNEL). The following equation is a good guide for determining the required RDS(ON)(MAX), allowing some margin for ripple current, current limit and variations in the LTC1700 and external component values: 4.0 3.5 DUTY CYCLE = 10% 3.0 2.5 DUTY CYCLE = 50% 2.0 1.5 DUTY CYCLE = 80% 1.0 0.5 0 ∆VSENSE 0 IO(MAX) 1 + ∆IL ρT 1 – DC 2 ( ) 10 20 30 40 50 60 70 80 90 100 RDS(ON) (mΩ) 1700 F03 Figure 3. Maximum Current vs RDS(ON) Power dissipated by the main and synchronous MOSFETs depends upon their respective duty cycles and 8 LTC1700 U U W U APPLICATIONS INFORMATION load current. When the LTC1700 is operating in continuous mode, the duty cycles for the MOSFETs are: Main MOSFET Duty Cycle = 1 – VIN/VOUT then there is a net positive amount of energy stored in the output capacitor for every cycle. The output voltage then rises and once it exceeds 2.3V, the LTC1700 will successfully exit out of its start-up mode. Synchronous MOSFET Duty Cycle = VIN/VOUT The MOSFET power dissipations at maximum output current are: PMAIN = (1 – VIN/VOUT)(IO(MAX)2)(ρT(MAIN))(RDS(ON)) + (k)(V0UT2)(IO(MAX))CRSS(f) PSYNC = (VIN/VOUT)(IO(MAX)2)(ρT(BOT))(RDS(ON)) Both MOSFETs have I2R losses and the PMAIN equation includes an additional term for transition losses, which are largest at high output voltages. The constant k = 2.5 can be used to estimate the amount of transition loss. The synchronous MOSFET losses are greatest at high input voltage and low output voltage. Start-Up Load Current In start-up mode, the current limit is set at 60mA and the oscillator runs at 210kHz with 50% duty cycle at VIN = 1.8V. Since the current limit is low, the amount of energy that is stored in the inductor during the on time is small. Therefore the LTC1700 is incapable of supplying the full load current. Figure 4 shows the amount of load current the LTC1700 can provide while successfully exiting out of the start-up mode. If the load current exceeds the amount shown in Figure 4 during start-up, the output voltage will not increase but will “hang” at a value below the regulated voltage. However, if the load current is lower, START-UP LOAD CURRENT (mA) A = 15µH B = 10µH C = 6.2µH D = 4.2µH E = 2.2µH 30 25 Slope Compensation and Peak Inductor Current D E 5 0 1.0 1.2 1.4 1.6 1.8 2.0 The LTC1700 will lock on at the leading edge of the external clock and the minimum pulse width required is 200ns. B C 10 The internal oscillator runs at a nominal 530kHz frequency when the SYNC/MODE pin is either connected to GND or VIN. When a CMOS compatible clock is applied to the SYNC/MODE pin, the internal oscillator will lock on to the external clock. The LTC1700 uses a novel technique to phase lock to the external clock without the requirement of an external PLL filter, hence minimizing components. The capture range is between 400kHz to 750kHz. Do not synchronize below or above the capture range as this will cause abnormal operation. During synchronization, Burst Mode operation is inhibited. A 20 15 The choice of operating frequency and inductor value is a trade-off between efficiency and component size. Low frequency operation improves efficiency by reducing MOSFET switching losses, both gate charge loss and transition loss. However, lower frequency operation requires more inductance for a given amount of ripple current. Remember just because you can operate at a high switching frequency doesn’t always mean you should. At higher frequencies the switching loss increases, so the CRSS of the N-channel MOSFET becomes very critical to keep efficiencies high. 40 35 Operating Frequency and Synchronization 2.2 2.4 VIN (V) 1700 • G04 Current mode switching regulators that operate with a duty cycles greater than 50% with continuous inductor current can exhibit duty cycle instability. While the regulator will not be damaged and may even continue to function acceptably, a look at its frequency spectrum will indicate harmonics. These harmonics may interfere with other sensitive devices and will cause non-optimal performance. Figure 4. Start-Up Load Current 9 LTC1700 U W U U APPLICATIONS INFORMATION To eliminate this subharmonic oscillations, a compensating ramp is added internally to the LTC1700 on the inductor current waveform when the duty cycle exceeds 5%. This scheme, known as slope compensation, makes the loop perceive that there is more inductor current than it actually has. As a result, the maximum current capability of the regulator is reduced. This reduction is proportional to the duty cycle and is shown in Figure 5. Hence for applications that operate at high duty cycles, the N-channel MOSFET chosen should have a lower RDS(ON) to make up for this reduction (See Design Example). NORMALIZED PEAK CURRENT REDUCTION 1.2 DC L MIN ≥ VIN(MAX) f∆IL With Burst Mode operation enabled on the LTC1700, the ripple current is normally set such that the inductor current is continuous during burst periods. Remember that during bursting, the peak current is clamped at approximately: IBURST(PEAK) ≅ 36mV/RDS(ON) Hence the peak-to-peak ripple selected for optimal burst mode operation should not exceed IBURST(PEAK). This implies a minimum inductance of: 1.0 L MINBURST = 0.8 0.6 ( ) VIN(MAX) DC IOMAX (f)(0.66) 1 – DC 0.4 0.2 0 0 10 20 40 30 50 DUTY CYCLE (%) 60 70 1700 F05 Figure 5. Maximum Output Current vs Duty Cycle Inductor Value Selection Given the input voltage, inductor value and operating frequency, the ripple current can be calculated: DC ∆IL = VIN fL In applications that invoke Burst Mode operation, the inductor should be chosen so it has low ripple (0.4IOMAX) current during heavy load and continuous operation during bursting. The criteria for selecting which equation to use is: Use LMIN for Duty Cycle > 36% Use LMINBURST for Duty Cycle ≤ 36% A smaller value than LMIN could be used in the circuit; however, the inductor current will not be continuous during burst periods. The advantage of using a smaller inductance than LMIN is primarily size. The disadvantage is higher output ripple. Inductor Core Selection Lower ripple current reduces core losses in the inductor, ESR losses in the output capacitors and output voltage ripple. Thus, highest efficiency operation is obtained at low frequency with small ripple current. To achieve this, however, requires a larger inductor. A reasonable starting point is to choose a ripple current that is about 40% of IO(MAX). Note that the largest ripple current occurs at the highest VIN. To guarantee that ripple current does not exceed a specified maximum, the inductor should be chosen according to: 10 Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy, or Kool Mµ® cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will Kool Mµ is a registered trademark of Magnetics, Inc. LTC1700 U U W U APPLICATIONS INFORMATION increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard”, which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and output voltage ripple. Do not allow the core to saturate! Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manufacturer is Kool Mµ. Toroids are very space efficient, especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. However, new designs for surface mount are available which do not increase the height significantly. COUT Selection During continuous operation, the output capacitor has a trapezoidal current profile. The RMS current into the capacitor is then given by: V ICOUT (RMS) ≅ IOUT OUT – 1 VIN The RMS current is greatest at IOUT(MAX) and minimum input working voltage. Therefore the output capacitor should be chosen with a rating at least ICOUT(RMS). Several capacitors can also be paralleled to meet this requirement. Besides RMS current rating, the selection of COUT is also driven by the required effective series resistance (ESR). The ESR of the capacitor together with its capacitance determines the output ripple voltage and can be expressed as: ( ) ∆VOUT ≈ IPK ESR + 2IOUT C OUT tON where COUT = output capacitance, tON = on time of main MOSFET and IPK = peak inductor current. A common technique to lower the total ESR at the output is to parallel the output capacitor with a 10µF ceramic capacitor. The choice of using a smaller output capacitance increases the output ripple voltage due to the frequency dependent term but can be compensated for by using capacitors of very low ESR to maintain low ripple voltage. The ITH pin OPTI-LOOP compensation components can be optimized to provide stable, high performance transient response regardless of the output capacitors selected. Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of any aluminum electrolytic at a somewhat higher price. Multiple capacitors may have to be paralleled to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum, available in case heights ranging from 2mm to 4mm. Other capacitor types include Sanyo OS-CON, Nichicon PL series and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Setting Output Voltage The LTC1700 develops a 1.205V reference voltage between the feedback (Pin 3) terminal and ground (see Figure 6). By selecting resistor R1, a constant current is caused to flow through R1 and R2 to set the overall output voltage. The regulated output voltage is determined by: VOUT = 1.205(1 + R2/R1) For most applications, a 30k resistor is suggested for R1. To prevent stray pickup, a 100pF capacitor is suggested across R1 located close to LTC1700. VOUT LTC1700 R2 VFB R1 1700 • F06 Figure 6. Setting Output Voltage 11 LTC1700 U W U U APPLICATIONS INFORMATION Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power (× 100%). Percent efficiency can be expressed as: % Efficiency = 100%–(L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC1700 circuits: 1. LTC1700 supply current. This DC supply current, given in the electrical characteristics, excludes MOSFET drivers and control current. This supply current results in a small loss which increases with VOUT. 2. MOSFETs gate charge current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched on and then off, a packet of gate charge Qg moves from VOUT to ground. The resulting current out from VOUT is typically much larger than the control circuit current. In continuous mode, IGATECHG = f(Qg(TOP) + Qg(BOT)). At high switching frequencies, this loss becomes increasing important. 3. DC I2R Losses. Since there is no sense resistor needed, DC I2R losses arise only from the resistances of the MOSFETs and inductor. In continuous mode, the average current flows through the inductor but is “chopped” between the synchronous P-channel MOSFET and the main N-channel MOSFET. If the two MOSFETs have approximately the same RDS(ON), then the resistance of one MOSFET can simply be summed with the resistance of the inductor to obtain the DC I2R loss. For example, if each RDS(ON) = 0.05Ω and RL = 0.15Ω, then the total resistance is 0.2Ω. This results in losses ranging from 2% to 8% as the output current increases from 0.5A to 2A for a 5V output. I2R losses cause the efficiency to drop at high output currents. 12 4. Transition losses apply to the main external MOSFET and increase at higher operating frequencies and output voltages. Transition losses can be estimated from: Transition Loss = 2.5(VOUT)2IO(MAX)CRSS(f) Other losses including CIN and COUT ESR dissipative losses, and inductor core losses, generally account for less than 2% total loss. Run/Soft Start Function The RUN/SS pin is a dual purpose pin that provides the soft-start function and a means to shut down the LTC1700. Soft-start reduces input surge current from VIN by gradually increasing the internal current limit. Power supply sequencing can also be accomplished using this pin. An internal 3.8µA current source charges up an external capacitor CSS. When the voltage on the RUN/SS pin reaches 0.7V, the LTC1700 begins operating. As the voltage on RUN/SS continues to ramp from 0.7V to 1V, the internal current limit is also ramped at a proportional linear rate. The current limit begins near 0A (at VRUN/SS = 0.7V) and ends at 0.078/RDS(ON) (VRUN/SS ≈ 2.2V). The output current thus ramps up slowly, reducing the starting surge current required from the input power supply. If the RUN/ SS has been pulled all the way to ground, there will be a delay before the current limit starts increasing and is given by: tDELAY = 1.13CSS/ICHG For input voltages less than 2.3V during the start-up duration, the soft-start function has no effect on the internal 60mA current limit. Therefore to fully take advantage of this feature, the soft-start capacitor has to be sized accordingly to account for the time it takes VOUT to reach 2.3V. An approximate mathematical representation for the time it takes VOUT to reach 2.3V upon powering up is given by: tPOWER−UP = C OUT (2.3 – VIN – VD ) 260(L) – IOUT 2.3 – VIN LTC1700 U U W U APPLICATIONS INFORMATION where: VD = Voltage drop of P-channel parasitic diode IOUT = Initial load current during start-up COUT = Output capacitance RDS(ON) = (13.2)(0.9) = 11.9mΩ Hence you would select the start-up capacitor, CSS, to ensure tDELAY > tPOWERUP. Remember that the above equation is only valid for VIN < 2.3V. If VIN is greater than 2.3V, then tPOWERUP = 0ns. Design Example Assume the LTC1700 is used to convert a 3.3V input to 5V output. Load current requirement is a maximum 3A and a minimum of 100mA. Efficiency at both low and high load currents is important. Ambient temperature = 25°C. Since low load current efficiency is important, Burst Mode operation is enabled by connecting pin 5 to VOUT. Duty Cycle = 1 – VIN/VOUT = 0.34 Since the duty cycle is less than 36%, the value of the inductor is chosen based on the LMINBURST equation. LMINBURST = 0.8µH. In the application, (Figure 7) a 4.6µH inductor is used to further reduce ripple current. The actual ripple current is now: 0.34 ∆IL = 3.3V = 0.46A 530kHz(4.6µH) For the main N-channel MOSFET, the RDS(ON) should be: RDS(ON)(N−CHANNEL) = Accounting for the peak current reduction due to slope compensation (see Figure 5), the RDS(ON) of the N-channel should be: 63mV IO(MAX) 1– D + 0.5(∆IL ) = 13.2mΩ The factor, 0.9, is obtained from Figure 5 using a duty cycle of 34%. The peak current of the inductor is 5A. Select an inductor that does not saturate at this current level. The average current through the N-channel MOSFET is 1.62A while the average current through the synchronous Pchannel MOSFET is 3A. The FDS6670A and FDS6375 are chosen for the N-channel and P-channel MOSFET respectively. We can now calculate the temperature rise in the FDS6670A. RMS current flowing through the FDS6670A is 2.78A. Hence power dissipated is: PDISS = (2.78)2 (8 × 10–3) = 61.82mW The θJA of the FDS6670A is 50°C/W. Therefore temperature rise is: TRISE = 61.82mW × 50 = 3.1°C This is an insignificant temperature rise and therefore the omission of the ρT in calculating the required RDS(ON) does not generate a large error. At 3A load, the RMS current into the output capacitor is given by: ICOUT(RMS) = 3(5/3.3 – 1)0.5 = 2.15A To meet the RMS current requirement, two SANYO POSCAP 100µF capacitors are paralleled. These capacitors have low ESR (55mΩ) and to futher reduce the overall ESR, a 10µF ceramic capacitor is placed in parallel with the POSCAP capacitor. Figure 7 shows the complete circuit. 13 LTC1700 U U W U APPLICATIONS INFORMATION L1 4.6µH 1 220pF 2.2k 2 270pF SGND ITH 8 BG + C2 68µF 6.3V M2 FDS6375 10 SW C1 10µF C3 22µF M1 FDS6670A VOUT 5V/3A C4 150µF 6.3V ×2 + LTC1700 470pF 4 30k 3 5 95k RUN/SS 9 PGND VFB 6 TG 7 SYNC/MODE VOUT C1: TAIYO YUDEN CERAMIC JMK316BJ106ML C2: AVX TAJB68K006R C3: TAIYO YUDEN CERAMIC JMK325BJ226M VIN 3.3V C4: SANYO POSCAP 6TPA150M L1: SUMIDA CEP1234R6 1700 • F07 Figure 7. Design Example Schematic PC Board Layout Checklist 3. Connect the (+) plate of C2 to the source of the P-channel MOSFET. This capacitor supports the load current when the inductor is being “recharged”. When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1700. These items are illustrated graphically in the layout diagram in Figure 8. Check the following in your layout: 4. Connect the (–) plate of C2 to the source of the N-channel MOSFET. Connect the power and signal ground to this node. 1. Are all the components connected close to the SW node (Pin 10)? The SW pin is the input to the VDS sense amplifier and the current reverse comparator. 5. Does the VFB pin connects directly to the feedback resistors? The resistive divider R1 and R2 must be connected between the (+) plate of C2 and signal ground. 2. Connect the VOUT lead directly to the source of the P-channel MOSFET. Besides supplying current to the LTC1700, it also serves as the other input to the current reverse comparator. 6. Keep the switching node SW away from sensitive small signal nodes. 7. Switched currents flow in M1, M2 and C2, keep the loop formed by these components as small as possible. VIN L1 C1 1 C3 R3 2 SGND ITH SW PGND M2 10 VOUT 9 + LTC1700 R1 3 C4 4 R2 5 VFB RUN/SS SYNC/MODE C2 BG VOUT TG 8 M1 7 6 1700 • F08 Figure 8. LTC1700 Layout Diagram (See PC Board Layout Checklist) 14 LTC1700 U TYPICAL APPLICATIO LTC1700 3.3V/1A Regulator with External Frequency Synchronization L1 1.5µH 1 100pF SGND 10 2 470pF 4 30k 3 5 53.6k ITH C4 22µF BG RUN/SS PGND VFB TG SYNC/MODE VOUT 8 + C1 68µF 6.3V + C3 220µF 6.3V M1 LTC1700 180pF 2.2k SW C2 10µF VIN 2V TO 2.4V 3.3V/1A M1 9 6 7 650kHz 1700 • TA01 C1: AVX TAJB686K006R C2: TAIYO YUDEN CERAMIC JMK316BJ106ML C3: AVX TPSD227M006R0100 U PACKAGE DESCRIPTIO C4: TAIYO YUDEN CERAMIC JMK325BJ226MM L1: MURATA LQN6C M1: SILICONIX Si6562DQ Dimensions in inches (millimeters) unless otherwise noted. MS10 Package 10-Lead Plastic MSOP (LTC DWG # 05-08-1661) 0.034 (0.86) REF 0.043 (1.10) MAX 0.007 (0.18) 0.118 ± 0.004* (3.00 ± 0.102) 10 9 8 7 6 0° – 6° TYP 0.021 ± 0.006 (0.53 ± 0.015) SEATING PLANE 0.007 – 0.011 (0.17 – 0.27) 0.0197 (0.50) BSC 0.005 ± 0.002 (0.13 ± 0.05) 0.118 ± 0.004** (3.00 ± 0.102) 0.193 ± 0.006 (4.90 ± 0.15) * DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1 2 3 4 5 MSOP (MS10) 1100 15 LTC1700 U TYPICAL APPLICATIO LTC1700 2.5V VIN 3.3V/1.8A Output Regulator L1 2.2µH 1 300pF SGND 2 470pF 4 30k 3 5 53.6k ITH C3 22µF RUN/SS BG PGND VFB TG SYNC/MODE VOUT C1: TAIYO YUDEN CERAMIC JMK316BJ106ML C2: AVX TAJB68K006R C3: TAIYO YUDEN CERAMIC JMK325BJ226M C4: KEMET T520D227M006AS 8 + M2 10 LTC1700 470pF 33k SW C1 10µF + C2 68µF 6.3V VIN 2.5V VOUT 3.3V/1.8A C4 220µF 6.3V M1 9 6 7 L1: MURATA LQN6C M1: Si9802 M2: Si9803 1700 • TA02 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1302 Micropower Step-Up Regulator 5V/600mA from 2V, 2A Internal Switch, 200µA IQ LT1304 Series 2-Cell Micropower Step-Up Regulator Low-Battery Detector Active in Shutdown LT1307/LT1307B Single Cell Micropower Step-Up Regulator 3.3V/75mA From 1V; 600kHz Fixed Frequency LT1316 Burst Mode Operation DC/DC with Programmable Current Limit 1.5V Minimum VIN; Precise Control of Peak Switch Current LT1317 2-Cell Micropower Step-Up Regulator 3.3V/200mA From Two Cells; 600kHz Fixed Frequency LT1517-5 Micropower, Regulated Charge Pump 3-Cells to 5V at 20mA, SOT-23 Package, 6µA IQ LT1610 1.7MHz Single Cell Micropower Step-Up Regulator 30µA IQ, MSOP Package, Internal Compensation LT1611 Inverting 1.4MHz Switching Regulator 5V to -5V at 150mA, Low Output Noise LT1613 1.4MHz Single Cell Micropower Regulator 5-Lead SOT-23 Package LT1619 Micropower Step-Up Regulator Controller Drives External NMOS; 3.3V to 5V at up to 8A LTC1625 No RSENSE Synchronous Step-Down Controller Up to 97% Efficiency; 3.7V ≤ VIN ≤ 36V; 1.19V ≤ VOUT ≤ VIN; IOUT up to 15A LTC1871 Boost, Flyback and SEPIC Controller 5V ≤ VIN ≤ 30V; No RSENSE, Programmable Frequency 50kHz to 1MHz; 10-Lead MSOP LTC1872 SOT-23, 550kHz Step-Up Controller Minimum Board Area; Drives External NMOS LTC3401/LTC3402 Integrated 1A and 2A Synchronous Step-Up Regulators Up to 97% Efficiency; up to 3MHz Operation; No External Diode; 0.85V Start-Up Voltage 16 Linear Technology Corporation 1700f LT/TP 0801 2K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2000