DESIGN IDEAS Synchronous, Phase Modulated, Full Bridge Converter Targets Isolated High by Kurk Mathews Power Applications Introduction In networking and telecom equipment, power supplies provide isolated low voltage outputs from the 48V input supply rail, with the added requirements of high efficiency (to reduce heat dissipation) and low component height. These requirements become even more difficult to meet with increased power levels, because of the corresponding component power dissipation and increased transformer size. Simple power supply topologies give way to more complex single and two-stage approaches that focus on transformer and semiconductor utilization. One such approach, the phase modulated full bridge converter, is a popular choice for high power supplies. Unfortunately, until now, there has not been a controller that offers both the flexibility in timing control and features (such as synchronous rectifier outputs) to manage a variety of high power applications. The new LTC3722-1 current-mode controller DESIGN IDEAS Synchronous, Phase Modulated, Full Bridge Converter Targets Isolated High Power Applications ..............30 Kurk Mathews Monolithic Buck-Boost Converter Provides 1A at 3.3V without Schottky Diodes ...........................32 Mark Jordan Inductorless, Efficient Step-Down DC/DC Converter Provides Dual Low Noise Outputs in Space-Constrained Designs.......33 Bill Walter Using Current Sensing Resistors with Hot Swap Controllers and Current Mode Voltage Regulators..34 Eric Trelewicz Complete USB Solution Provides PowerPath Control and Input Current Limiting while Charging a Li-Ion Battery ............................36 Trevor Barcelo 30 Figure 1. LTC3722-1 36–72V input to 12V/35A isolated power supply is designed specifically with these issues in mind, providing a full-featured controller for high power, phase modulated, full bridge converters. 12V Isolated Converter Figures 1 and 2 show a 36V–72V input to isolated 12V at 35A supply using the LTC3722EGN-1 (24-lead SSOP) and LTC4440 high side drivers. The low profile design features surface mount power MOSFETs and planar transformers (less than 0.4” high) configured in a parallel/series configuration. With a 48V input, this circuit has a typical full load (35A) efficiency of 93%. The PCB board shown in Figure 1 is 3"× 5", and with 200 linear feet per minute of airflow provides full load operation from 48V input to 50°C ambient without the use of a heat sink. The actual PCB area can be reduced further (depending on airflow and ambient temperature) when used as part of a large system board. Even with 12V output, the synchronous rectifiers reduce the power dissipation in the secondary rectifiers. The output of 12V is chosen here because it is a good intermediate bus voltage, but the circuit is easily modi- fied to meet other input or output voltages. For example, applications not requiring the full input voltage range or tight regulation could further optimize transformer and semiconductor utilization resulting in increased efficiency. Operation The start-up of the circuit in Figure 2 begins with C14 trickle charging via R29 and Q41's base-collector junction until U2’s VIN pin reaches 10.2V (the internal shunt regulator voltage). Assuming the undervoltage lockout pin (UVLO) is above a 5V threshold, switching begins. C14 keeps the U2’s VIN pin above its 6.0V shutdown threshold until a bias winding on T4 (along with D12, D14 and L4) takes over. U4 and U5 provide the level translation for the two high side switches. U2’s OUTE and OUTF pins provide synchronous timing signals to the output rectifiers gate drive transformer T5 and the LTC1693 gate driver. The loop is closed by U3, the LT1431 programmable reference, and optocoupler ISO1. Operation of the phase modulated full bridge converter is similar to a conventional full bridge converter in continued on page 35 Linear Technology Magazine • September 2003 Linear Technology Magazine • September 2003 30.1k C2 0.82µF 100V 0.1µF 1.5nF 12V D27 12V 1µF 10 100Ω 11 2 9 5VREF Q10 Q7 12V 220pF 8 20 C 19 0.02Ω 1.5W 499Ω D 17 ISNS 4 15 180pF + D 8 CS OUTE 16 24 10k 13 33k 5 6 22 D26 120k 68nF 23 7 Q35 4 3 2.2nF 330pF 750Ω 5VREF 75k 8 • 1 7 6 5 6 •4 •3 D22 8 3 C30 2.2nF 250V 4 ISO1 MOC207 330pF 4.7k 100k 2 330Ω 1 D12 Si7852DP ×2 D14 5 0.33µF Si7852DP ×2 51Ω 2W T5 1(1.5mH):0.5:0.5 L4 1mH Q16 Q9 12V 0.22µF 0.1µF ISNS 22Ω C14 68µF 20V 12V 2 CT SPRG RLEB FB GND PGND SS COMP U2 LTC3722-1 5.1k 1 D24 0.33µF 51Ω 2W • 11 220pF 100Ω 1/4W D20 5.1V 6 5 7 GNDF GNDS RMID + 2.49k 9.53k 0.1µF D5 D1 –VOUT +VOUT Q26 1µF C13, C36 180µF 16V ×2 C1 0.82µF 100V 13k 1/2W –VOUT 22nF 10k D16 4.3V Q18 +VOUT Si7852DP ×4 VHIGH 820pF 200V 15Ω 1.5W +VOUT 4440 TA03 4 2 V+ COMP RTOP LT1431 8 1 COLL U3 REF 3 2.7k 470Ω 1/4W 7 5 OUT2 OUT1 3 LTC1693-1 6 IN2 VCC2 1 8 IN1 VCC1 2 4 GND2 GND1 –VOUT Q25 • L1 0.85µH VHIGH Si7852DP ×4 T4 5:5(105µH):1:1 Q17 •7 8 • 10 11 •7 8 • 10 0.047µF D17 D15 1 6 2• 4 2• 4 T1 5:5(105µH):1:1 D21 Figure 2. LTC3722-1 36–72V input to 12V/35A isolated synchronous full bridge power supply 2 21 L2 150nH Si7852DP ×2 0.02Ω 1.5W B 3 12V VCC LTC4440EMS8E 6 BOOST 1 Si7852DP 7 U5 IN C TG ×2 GND GND TS OUTA OUTB OUTC OUTD OUTF A 0.22µF DPRG NC SYNC 150k 14 UVLO VREF VIN B 8 TS SBUS ADLY PDLY 220pF 4 GND GND 0.47µF 12 18 4.99k Q41 MMBT3904 20k D23 VCC LTC4440EMS8E 6 BOOST 1 7 U4 IN A TG 3 C3, C4, C5 0.82µF 100V ×3 12V VIN C1-C5: VITRAMON VJ1812Y824KXBAT C13, C36: SANYO 16SP180M C14: AVX TPSE686M020R0150 C30: MURATA DE2E3KH222MB3B D1, D5, D21, D22: MURS120T3 D12, D14, D23, D24: BAS21 D15, D17, D26: BAT54 D16: MMBZ5229B D20: MMBZ5231B D27: MMBZ5242B L1: PA1294.910 L2: PULSE PA0651 L4: COILCRAFT DO1608C-105 L5: SUMIDA CDEP105-1R3MC-50 Q7, Q9, Q25, Q26: ZETEX FMMT619 Q10, Q16-Q18: ZETEX FMMT718 Q35: MMBT3906 T1, T4: PULSE PA0526 T5: PULSE PA0297 R29 20k 1/4W 182k VIN +VIN 36V TO 72V –VIN L5 1.3µH +VOUT –VOUT 12V 35A +VOUT +VOUT DESIGN IDEAS 31 DESIGN IDEAS EXCESSIVELY LONG SENSE PATH CREATES SIGNIFICANT VOLTAGE DROP THAT CAUSES FAULTY OPERATION LARGE SENSE LOOP AREA SUSCEPTIBLE TO EMI Rx Cx GND RSENSE GND Setting the Proper Constraints in an Auto-Router Z1 POOR HEAT SINKING POWER IN Q1 LTC4210 EXCESS VOLTAGE DROP CAUSES FAULTY OPERATION RC CTIMER that can inductively couple with the sense loop and also cause malfunction. To minimize inductive coupling, the Kelvin sense circuit must exhibit minimal loop area. RG Q1 GATE CC EXCESS VOLTAGE DROP CAUSES FAULTY OPERATION CON RON1 GND CLOAD GND RON2 ON Figure 3. Example of layout that can reduce the accuracy of Kelvin sensing. The problems shown here include: excess length of thin high resistance track in series with sense resistor, inadequate heat sinking on Q1, and an insufficient number of vias for input power and output load connections. resistors. The use of a 4-terminal resistor forces the auto router to make a correct Kelvin connection to the curLTC3722, continued from page 30 that power is delivered when diagonal switches are on. It differs in that during the free-wheeling portion of the switching cycle, either the top or bottom switches of the bridge remain on. This provides for recovery of parasitic energy and zero-voltage turn-on transitions for the primary switches. The LTC3722-1 can be configured to provide adaptive (with programmable time-out) or fixed delay control for zero voltage switching operation. In adaptive DirectSense™ mode, the rent sense resistor. But this alone is not enough. High speed switch mode power supplies have a high dI/dt path Set the auto-router constraints to route the Kelvin sense connections as a differential pair to keep the connections side by side and close together. Use maximum length constraints to prevent the connections from wandering too far from the direct path. Constrain the connection to the component layer on a multi-layer PC board to prevent unwanted vias in this critical connection path. Although the proper choice of sense resistor and layout constraints can mitigate many of the PCB layout pitfalls, in the end it’s up to the designer to carefully check the layout. Notes 1 Some sources of 4-terminal Kelvin sensed resistors include: • www.Caddock.com • www.IMS-Resistors.com • www.IRCtt.com • www.Vishay.com turn-on timing adjusts automatically by sensing the transition voltages on the bridge legs, eliminating external trims. This provides accurate zero voltage transition timing with changes in input voltage, output load and circuit parasitics. Fixed (or manual) delay control is also available, which allows for fixed transition delays or even custom dynamic timing schemes. The LTC3722-1 also features adjustable synchronous rectifier timing. Conclusion into live systems and break one large capacitive bus into several smaller ones, while still passing the SDA and SCL signals to every device in the system. They can also connect and disconnect different bus segments at different times, providing nested addressing capability and easing the debugging process during stuck low situations. The new LTC3722-1 current-mode controller provides a wealth of features targeted at high power isolated full bridge applications, including flexible timing control, synchronous rectifier outputs, under -voltage lockout, programmable slope compensation and current mode leading edge blanking. LTC4302, continued from page 16 Summary The LTC4302-1/LTC4302-2 addressable 2-wire bus buffers ease the practical issues associated with complex 2-wire bus systems. They allow I/O cards to be hot-plugged Linear Technology Magazine • September 2003 35