L DESIGN FEATURES High Power, Single Inductor, Surface Mount Buck-Boost µModule Regulators Handle 36VIN, 10A Loads by Manjing Xie Introduction VIN 5V TO 36V One of the most daunting tasks for a power supply designer is producing a high power density supply where the output voltage sits within the input voltage range. High power density buck-boost converters usually require complex and bulky magnetics, run at low efficiency, and place high electrical and thermal stresses on devices. The LTM4605 and LTM4607 µModule regulators can cure these buck-boost headaches. The secret is in reducing the component selection to an inductor, a sense resistor and bulk input and output capacitors. The resulting solution is as close to a plug-and-play buck-boost converter you can get in an IC form factor. The LTM4605 and LTM4607 incorporate most of the components needed for a complete buck-boost solution in their 15mm × 15mm × 2.8mm low profile packages, including the switching controller, power FETs and support components. CLOCK SYNC 10µF 50V VIN PLLIN V OUT 22µF 25V ×2 FCB ON/OFF RUN LTM4607 4.7µH + 330µF 25V SW1 SW2 RSENSE SENSE+ 0.1µF 7.5mΩ SS SGND SENSE– PGND VFB 7.15k Figure 1. Remarkable simplicity in the face of an otherwise daunting task. Only a few components are required to provide an efficient 12V, 5A output from a 5V-to-36V input. VIN EXTVCC C1 16 4.5V TO 36V CIN M1 SW2 INTVCC M2 PGOOD L SW1 RUN ON/OFF VOUT 100k STBYMD 12V 5A CO1 M3 COUT 0.1µF 100k COMP VFB M4 The LTM4605 and LTM4607 incorporate most of the components needed for a complete buck-boost solution in their 15mm × 15mm × 2.8mm low profile packages, including the switching controller, power FETs and support components. Their synchronous 4switch architecture can achieve up to 92% efficiency in boost mode and 97.7% efficiency in buck mode. The LTM4605 has a 4.5V to 20V input range and a 0.8V to 20V output range, while the LTM4607 takes a 4.5V to 36V input to a 0.8V to 24V output. Such wide voltage ranges save signifi- VOUT 12V 5A INT COMP CONTROLLER RFB 7.15k RSENSE SENSE+ SS SS 0.1µF PLLIN INT FILTER PLLFLTR RSENSE SENSE– PGND INT FILTER FCB SGND 1000pF Figure 2. Simplified block diagram of the LTM4607 Linear Technology Magazine • March 2008 DESIGN FEATURES L SW1 10V/DIV SW1 10V/DIV SW1 10V/DIV SW2 10V/DIV SW2 10V/DIV SW2 10V/DIV VOUT(AC) 200mV/DIV VOUT(AC) 200mV/DIV VOUT(AC) 200mV/DIV VIN = 32V VOUT = 12V IOUT = 5A 2µs/DIV VIN = 5V VOUT = 12V IOUT = 5A Figure 3. Buck mode waveforms Figure 1 shows the LTM4607 providing a 12V, 5A output from a 5V–36V input. The LTM4607 operates as a buck converter at input voltages above the output, as a boost converter at input voltages well below the output, and a combination of the two in the transition region where the input voltage is close to the output. VIN = 6V VOUT = 12V ILOAD = 5A CURSOR 1 = INDUCTOR CURSORS 2, 3, 4, 5 = LTM4607 Inside the LTM4605 and LTM4607 Figure 2 is a simplified internal diagram of the LTM4607, showing the two switching legs: the boost leg connected to the output, and the buck leg to the 100 VIN = 12V VIN = 6V 90 VIN = 32V 8 7 6 5 4 80 3 70 60 VOUT = 12V 0 2 POWER LOSS VIN = 6V VIN = 12V VIN = 32V 6 4 LOAD CURRENT (A) 8 POWER LOSS (W) 12V, 5A Supply from a 5V–36V Input VIN = 12V VOUT = 12V IOUT = 5A 2 1 0 10 Figure 6. Efficiency and power loss for the LTM4607 at different input voltages 2µs/DIV Figure 5. Transition mode waveforms Figure 4. Boost mode waveforms EFFICIENCY (%) cant design time as one part can serve a wide variety of applications—reducing the need to certify and stock different parts for different applications. To round out these devices as complete power supplies, both include important safety features including true soft-start, output overvoltage protection (OVP) and foldback protection in buck, boost and buck-boost modes. 2µs/DIV input. Each synchronous switching leg is formed by two MOSFETs. SW1 and SW2 tap the middle of the internal boost leg and buck leg respectively. Operation of the LTM4607 buck, boost and transition regions can be seen in Figures 3 to 5. In buck mode, SW1 is connected to the output and the internal buck leg switches to regulate the output voltage. In boost mode, SW2 is connected to the input and the boost leg is in action. During the transition mode, when the input voltage is close to the output, both buck leg and boost legs are in action. To keep the internal bootstrap circuits constantly alive for both legs, the “inactive” leg refreshes every tenth cycle of the “active” leg. That is, the boost leg switches once for every ten switching cycles in buck mode while the buck leg switches similarly in boost mode. VIN = 32V VOUT = 12V ILOAD = 10A CURSOR 1 = INDUCTOR CURSORS 2, 3, 4, 5 = LTM4607 7a 7b Figure 7. Thermal images with VOUT = 12V and 25°C ambient temperature. Linear Technology Magazine • March 2008 17 L DESIGN FEATURES VIN 5V TO 36V CLOCK SYNC 0° PHASE 10µF 50V R5 100k PGOOD VIN PLLIN V OUT RUN FCB LTM4607 COMP R4 324k SW1 INTVCC LTC6908-1 C1 0.1µF 5.1V OUT1 EXTVCC GND OUT2 SS SET MOD RSENSE SENSE+ R2 7mΩ STBYMD C3 0.1µF SGND 330µF 25V VOUT 12V 10A SW2 PLLFLTR V+ C2 22µF 25V ×2 L1 3.3µH + SENSE– VFB PGND RFB 3.57k 2-PHASE OSCILLATOR CLOCK SYNC 180° PHASE 10µF 50V PGOOD VIN RUN PLLIN V OUT FCB LTM4607 COMP SW1 INTVCC + 330µF 25V SW2 PLLFLTR RSENSE SENSE+ EXTVCC STBYMD SS SGND C4 22µF 25V ×2 L2 3.3µH SENSE– PGND R3 7mΩ VFB Figure 8. Schematic of two LTM4607 in parallel to provide 12V at 10A output from 6V to 36V source Efficiency Considerations The internal MOSFETs are optimized and able to deliver up to 12A output current for the LTM4605 and 10A for the LTM4607 in buck mode. The LTM4607’s maximum output current in boost mode is rated at 5A DC (typical). Either part can be easily paralleled for higher current applications (see next section). The current limitations are imposed by power losses from the internal MOSFETs. Figure 6 shows the typical efficiency of the LTM4607 at various input voltages. Worst-case efficiency usually occurs at minimum and maximum VIN. At minimum VIN, increased inductor current and related conduction losses take the biggest bite out of efficiency, while at maximum VIN, switching losses dominate. Derating is necessary under certain input, output and thermal conditions. Thermal images of the circuit shown in Figure 1 are shown in Figure 7. Note that Figure 7b shows a single µModule regulator supplying 10A in buck mode. PolyPhase® Paralleling for High Output Current If an application requires higher current than a single LTM4605 or LTM4607 can supply, two or more µModule regulators can be connected in parallel (Figure 8) to increase the available output current. The current VOUT(AC) 200mV/DIV IL1 5A/DIV ILOAD 20A/DIV IL2 5A/DIV IL1 10A/DIV IL2 10A/DIV VOUT 5V/DIV VIN = 5V VOUT = 12V IOUT = 10A 5ms/DIV 9a VIN = 20V VOUT = 12V LOAD STEP = 15A 100µs/DIV 9b Figure 9. Inductor current waveforms at start-up and load transient with two LTM4607s in parallel 18 Linear Technology Magazine • March 2008 DESIGN FEATURES L VIN COUT COUT SW1 L1 RS SW2 CIN GND CIN VOUT CIN 10a 10b Figure 10. Recommended parts placement and layout mode architecture of the LTM4607 facilitates efficient PolyPhase operation (interleaved switch operation) of the parallel regulators. In a parallel setup, a single VOUT set resistor is shared by the regulators. The current control signal and COMP pins are tied together, thus resulting in balanced current sharing, as shown in Figure 9 The 200kHz to 400kHz phase lock loop of LTM4607 enables interleaved switch operation, which reduces input and output ripple current. Figure 8 shows two LTM4607s connected in parallel to provide a 12V, 10A output. Interleaved clock signals are generated by the LTC6908-1. PCB Layout Considerations With over 12A of inductor current and four switching MOSFETs, care must be taken during the PCB layout to minimize EMI and thermal stress. Figure 10 shows the recommended component placement of components on both the top and bottom of the board. There are two critical loops. One is formed by input capacitors, the SW2 pins, the sense resistor and GND; the other is formed by output capacitor, the SW1 pins, the sense resistor and GND. Because of the high dI/dt pulsing current in both loops, their area should be minimized. Thus, the sense resistor should be put directly beneath the module with as many vias as possible on RSENSE and GND. When components are restricted to one layer, place the sense resistor as close as possible to the module. Low ESR Linear Technology Magazine • March 2008 and ESL ceramic capacitors should be used at the input and output and be placed as close to the module as possible. The second layer should be a solid ground plane. Because both the LTM4605 and LTM4607 use a versatile and responsive current mode control architecture, an external sense resistor is required. Accurate sensing of the inductor current is required for both system stability and an accurate current limit. Because the sensed current is pulsating, parasitic inductance along the current path should be minimized. A Kelvin connection is recommended as shown in Figure 11, and the current sense traces should be close to each other.1 Layout with the LTM4605 and LTM4607 couldn’t be easier—there are SW1 so few components—but it is important to carefully consider thermal design. SW1 and SW2 nodes should be connected to a large sized copper conductor utilizing the inner and bottom layers to help dissipate heat. Thermal vias should be placed beneath the module and on the copper planes as shown in Figure 10. Since both the SW1 and SW2 nodes produce high dV/dt values, it is better to keep control signal traces away from these nodes. To improve reliability and thermal performance, the thermal profile should be tuned to minimize voids. Also try to place control signals in inner layers to free the thicker top and bottom layers for current conduction and thermal dissipation. continued on page 36 SW2 VIN L1 RSENSE VOUT CIN COUT + – SGND PGND PGND RSENSE KELVIN CONNECTIONS TO RSENSE Figure 11. Kelvin connection used to sense current. 19 L DESIGN IDEAS the differential and common mode input voltage are VIN(DM) and VIN(CM) respectively, the output voltages of op amp A and B are then VIN(CM) – (2R1/ R0)VIN(DM) and VIN(CM) + (2R1/R0)VIN(DM) respectively. So 2R V – < VIN(CM) ± 1 VIN(DM) < V + R0 2R V – + 1 VIN(DM) < VIN(CM) < R0 2R V + − 1 VIN(DM) R0 where V+ and V– are the positive and negative supply voltage respectively. The larger the first stage gain or input differential signal is, the narrower the input common mode range is. To widen the input common mode range, the first stage gain can be reduced, but this will compromise CMRR performance. Figure 3 is a reduced circuit of Figure 2 with a unity gain buffer at the front stage. This circuit can achieve rail-to-rail input range. As mentioned previously, it won’t have the high CMRR of the circuit in Figure 2 since we reduced the front stage gain to unity. If the input resistance requirement can be eased, Figure 3 can be reduced to Figure 4, a single stage difference amplifier. The impedance of the non-inverting and inverting inputs are R3 and R5 + R6, respectively. An obvious advantage of the LTC6081 is its super low input bias current. Even with a 1MΩ input resistor R3 or R5, the less than 1pA input bias current of LTC6081 will add less than 1µV to VOS. The above discussion assumes a perfect matching of R4/R3 and R6/R5. If R6 R4 = 1+ ε R5 R3 ( ) AV ε where AV is the differential gain of the instrumentation amplifier. For example, at gain of 10, to achieve 80dB 5V 0.1µF + – 1M + 1µF 1M 1/2 LTC6081 VOUT = 10mV/°C 0°C TO 500°C – 5V LT1025 2.49M K R– R3 R4 – LTC6081/2 VOUT + VIN2 R5 R6 Figure 4. Difference amplifier with no input buffers CMRR, mismatch of R4/R3 and R6/R5 should be less than 0.1%. This is true for all the above three circuits. The advantage of the circuit in Figure 2 is that gain can be put at the front stage to ease the matching requirements of the second stage. Matching of R1 and R2 in Figure 2 is not important. Thermocouple Amplifier then the CMRR degrades to 20log VIN1 10k 100pF SENSOR: OMEGA 5TC-TT-K-30-36 K-TYPE THERMOCOUPLE 1M RESISTORS PROTECT CIRCUIT TO ±350V WITH NO PHASE REVERSAL OF AMPLIFIER OUTPUT 1pA MAX IBIAS TRANSLATES TO 0.05°C ERROR 90µV VOS → 2°C OFFSET Figure 5. Thermocouple amplifier Figure 5 shows the LTC6081 in a thermocouple amplifier. The 1MΩ resistors protect the circuit up to ±350V with no phase reversal to amplifier output. The 1pA maximum IBIAS of the LTC6081 translates to a miniscule 0.05°C temperature error with the 1MΩ input protection resistor. The ±90µV offset over the entire operating temperature range ensures a less than 2°C temperature offset. Conclusion The LTC6081 and LTC6082 are high performance dual and quad op amps combining excellent noise, offset drift, CMRR, PSRR and input bias current specifications. They perform in a variety of topologies without compromising performance. LTC6081 is available in 8-lead MSOP and 10-lead DFN packages. LTC6082 is available in 16-lead SSOP and DFN packages. L LTM4605/07, continued from page 19 Conclusion The LTM4605 and LTM4607 µModule regulators simplify the design of buckboost power supplies. Their low profile 15mm × 15mm × 2.8mm packages and minimal component count help free up valuable PCB area. High input and high output ratings suit these 36 regulators to networking, industrial, automotive systems and high power battery-operated devices. Their optimized internal 4-switch architecture provides high efficiency and high performance. Overall, the LTM4605 and LTM4607 reduce product design and test time with a mix of high per- formance features, flexible settings and ease-of-use. L Notes 1For more about layout with Kelvin sense resistors, see “Using Current Sensing Resistors with Hot Swap Controllers and Current Mode Voltage Regulators” by Eric Trelewicz in Linear Technology Magazine, September 2003, page 34 Linear Technology Magazine • March 2008