5 4 3 2 1 LAN7500 Customer Evaluation Board Assy 6635 D D PCB Revision A Schematic Revision 1.0 Design Details Board: Assy 6635 Chip: SMSC LAN7500 56 Lead QFN w/ Exposed GND Pad C Circuit Diagrams utilizing SMSC Products Are Included As A Means Of Illustrating Typical Semiconductor Applications: Consequently Complete Information Sufficient For Construction Purposes Is Not Necessarily Given. The Information Has Been Carefully Checked And Is Believed To Be Entirely Reliable. However, No Responsibility Is Assumed For Inaccuracies. Furthermore, Such Information Does Not Convey To The Purchaser Of The Semiconductor Devices Described Any License Under The Patent Rights Of SMSC Or Others. SMSC Reserves The Right To Make Changes At Any Time In Order To Improve Design And Supply The Best Product Possible. Board Form Factor: USB / Ethernet Dongle 1.00" x 2.50" Revision History ITEM BLOCK DIAGRAM Page(s) 1 Title Page LAN7500, Ethernet, USB, Magnetics Rev 1.0: C 2 Initial release, Rev A B B A A Title LAN7500 USB-to-10/100/1000 Ethernet Customer EVB Size C Date: 5 4 3 2 Engineer Assembly No. R. W. 6635 Wednesday, November 03, 2010 1 PCB Rev Schematic Rev A Sheet 1.0 1 of 2 5 4 +2.5V +2.5VA_PHY C1 0.1uF 16V 10% C2 0.01uF 25V 10% 26 27 28 29 EECLK EEDI EEDO EECS 39 4 3 2 1 TEST TDO TMS TCK TDI 2 2 T1 THIS SIDE PHY 11 TR1N TR2P TR2N TR3P VBUS_DET 14 USBDP USBDM 13 12 TR3N R15 1 2 12.0K 1% 16 +2.5V J2 10 CT 12 - 7 + 9 CT 8 5 TD0P 14 CT 15 - 13 TD0N TD1P GREEN + 18 CT 16 - - 17 TD1N + + 20 TD2P CT 21 4 CT 6 - - 19 TD2N 1 + + 24 TD3P CT 22 - 23 3 CT 2 - R16 TG111-S12NYNRL 13 1 2 3 4 5 6 7 8 15 - RJ1 RJ2 RJ3 RJ4 RJ5 RJ6 RJ7 RJ8 11 12 HOLE2 HOLE1 SHIELD1 SHIELD2 10 9 + 16 - SPEED 14 + LED0 LED1 No Link OFF OFF 10 ON OFF 100 OFF ON 1000 ON ON YELLOW SPD1 TD3N GPIO1/LED1 0 USBDP USBDM Amphenol - RJHSE-5381 SPD0 + + D R14 154 R6 154 GPIO0/LED0 R13 0 1 R4 49.9 1/16W 1% R33 75.0 1/10W 1% R34 75.0 1/10W 1% R35 75.0 1/10W 1% R36 75.0 1/10W 1% R18 1 2 2 2 0 GND_CHASSIS 1 2 LAN7500 6 5 XO XI Y1 25.000MHz 1 2 1 2 SW_MODE C C33 1000pF 2kV -20% +80% C4 30pF 50V 5% POR Monitor USB Connector Graphic illustration only. POR Monitor not present on 6635A 2 2 C3 30pF 50V 5% VCC_USB +2.5V +1.2V +5V FB2 1 +3.3V 2 1 SW_MODE_R +2.5VA_PHY 1 9 2 154 1 1 R12 49.9 1/16W 1% 2 1 R11 49.9 1/16W 1% 2 1 2 1 2 1 2 1 2 R10 49.9 1/16W 1% TR1P 3 R19 0 1 2 2 2 R9 49.9 1/16W 1% TR0N 55 54 TR3P TR3N R3 49.9 1/16W 1% 1 52 51 R8 49.9 1/16W 1% 1 TR2P TR2N 1 1 47 46 TR0P 2 1 VDD33A TR1P TR1N USBRBIAS nRESET/PME_CLEAR 2 15 7 19 24 37 45 48 53 56 VDD12A VDD12A VDD12A VDD12A VDD12BIAS VDD12PLL VDDVARIO VDDVARIO VDDVARIO VDDVARIO TR0P TR0N 44 43 GND/EP 2 1 R17 10.0K 1/16W 1% 41 R1 8.06K 1/16W 1% R2 49.9 1/16W 1% 1 EECLK EEDI EEDO EECS ETHRBIAS GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6/PME_MODE_SEL GPIO5/PME GPIO4/LED4 GPIO3/LED3 GPIO2/LED2 GPIO1/LED1 GPIO0/LED0 42 R5 LED1 Green LED LED_0805 2 nRESET/PME_CLEAR +2.5V C GPIO1/LED1 GPIO0/LED0 GPIO4/LED4 1 1 R7 10.0K 1/16W 1% GPIO4/LED4 49 50 17 2 VDD33A 57 2 1 +2.5V 25 22 21 18 10 40 38 35 34 33 32 31 VDD12USBPLL VDD12CORE VDD12CORE VDD12CORE VDD12CORE VDD12CORE VDD12CORE U1 8 11 20 23 30 36 D FDUPLEX 1 2.0amp 120 Ohm 100MHz VDD12PLL VDD12A +2.5V 1 2 +1.2V +1.2V 2 +2.5VA_PHY FB1 1 VDD12USBPLL 1 LAN7500 / Ethernet 3 C38 0.1uF 16V 10% U3 1 6 4 5 3 Thresholds: VCC1 (V33) = 2.925V VCC2 (V12) = 1.050V RSTIN = 0.625V R42 20.0K 1/10W 1% 2 +2.5V EN1 0 9 0 EN2 0 DEF1 5 SW2 10 MODE ADJ2 1 GND GND_EPAD 1 L1 2.2uH 2 1 L2 2.2uH 8 11 C14 22pF 50V 5% 2 1 R29 0 6 4 2 5 VIN VEN NC NC LP5900SD-3.3 LLP-6 150mA VOUT 1 2 R27 360K 1/16W 1% C15 10uF 6.3V 20% 348K 1/16W 1% EEDO 3 DI EECS 5 CS 4 CLK EECLK 1 R28 DO 1 GND 2 C5 0.1uF 16V 10% EEDI 2 R21 10.0K 93AA66AT-I/OT 1/16W SOT23-6 1% A 115K 1/16W 1% Title 2 2 +3.3V 1 U2 C13 10uF 6.3V 20% C32 0.47uF 6.3V 10% 3 7 C31 0.47uF 6.3V 10% 2 R24 360K 1/16W 1% R26 1 1 C27 0.1uF 16V 10% 2 C26 0.1uF 16V 10% 2 C25 0.1uF 16V 10% 2 C24 0.1uF 16V 10% 1 1 1 2.0amp 120 Ohm 100MHz C30 10uF 6.3V 20% VR2 GND PAD +5V 2 2 2 C23 0.1uF 16V 10% 2 2 C22 0.1uF 16V 10% 1 1 1 1 C21 0.1uF 16V 10% 2 C20 0.1uF 16V 10% 2 C19 0.1uF 16V 10% 2 2 1 1 1 1 2 C18 0.1uF 16V 10% 6 VDD12A FB3 C17 0.1uF 16V 10% SW1 1 2 DNP 1 4 R22 SW_MODE_R +1.2V +2.5V FB1 1 7 R23 +1.2V 2 VIN R25 A GND_USB 1 1 C29 0.1uF 16V 10% C6 4.7uF 16V 10% 0805 2 800ma/0.20DCR C28 220 ohms@100MHz 0.1uF 16V 10% 1 2 3 2 800ma/0.20DCR 220 ohms@100MHz 1 2 C12 0.1uF 16V 10% 2 2 C8 0.1uF 16V 10% 2 1 1 1 1 C11 0.1uF 16V 10% 2 C10 0.1uF 16V 10% 2 800ma/0.20DCR 220 ohms@100MHz C9 0.1uF 16V 10% VR1 VDD12PLL FB6 1 1 2 2 1 1 B 2 +1.2V R30 10M 1/16W 5% 1 VDD12USBPLL FB5 SHLD1 SHLD2 1 +1.2V GND 5 6 USB Type-A RA Plug TPS62410 SON10_EP 1 +2.5V +3.3V 4 uWire EEPROM Power +5V FB4 2 NOTE: POR Monitor circuit not implemented in assembly 6635A. A power-on reset circuit, or equivalent, is recomended for new designs. Refer to the data sheet for detailed power-on reset requirements. Refer to the LAN7500 reference schematic and BOM for complete details of illustrated circuit. 1 Power Supply Filtering VDD33A 1 MTG4 1 DD+ 6 MTG3 1 2 2 MTG2 1 1 MTG1 1 2 1 1 C16 4700pF 25V 10% 0402 2 TP3 TP2 SW_MODE_R 2 3 2 STM6719SFWB6F 140ms 2 TP1 nRESET/PME_CLEAR 1 VCC VCC Test Points USBDM USBDP nRESET/PME_CLEAR 1 V33 nRST V12 RSTIN(0.714) nMR VSS 1 2 P1 2 2 C39 0.1uF 16V 10% 2 R32 49.9K 1/10W 1% B C7 2.2uF 6.3V 20% 1 1 1 2.0amp 120 Ohm 100MHz LAN7500, Ethernet, USB, Magnetics, Power Size C Date: 5 4 3 2 Engineer Assembly No. R.W. 6635 Wednesday, November 03, 2010 1 PCB Rev Schematic Rev A Sheet 1.0 2 of 2