AOT12N40 400V,11A N-Channel MOSFET General Description Product Summary The AOT12N40 is fabricated using an advanced high voltage MOSFET process that is designed to deliver high levels of performance and robustness in popular AC-DC applications.By providing low RDS(on), Ciss and Crss along with guaranteed avalanche capability this part can be adopted quickly into new and existing offline power supply designs. VDS ID (at VGS=10V) 500V@150℃ 11A RDS(ON) (at VGS=10V) <0.59Ω 100% UIS Tested 100% Rg Tested For Halogen Free add "L" suffix to part number: AOT12N40L Top View D TO-220 D S G G S AOT12N40 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage Continuous Drain Current VGS TC=25°C TC=100°C Maximum 400 Units V ±30 V 11 ID 7 A Pulsed Drain Current C IDM 28 Avalanche Current C IAR 3.5 A Repetitive avalanche energy C EAR 184 mJ Single pulsed avalanche energy G Peak diode recovery dv/dt TC=25°C Power Dissipation B Derate above 25oC Junction and Storage Temperature Range EAS dv/dt 368 5 184 mJ V/ns W 1.5 -55 to 150 W/ oC °C 300 °C Maximum lead temperature for soldering purpose, 1/8" from case for 5 seconds Thermal Characteristics Parameter Maximum Junction-to-Ambient A,D Maximum Case-to-sink A Maximum Junction-to-Case Rev0: Sep 2012 PD TJ, TSTG TL Symbol RθJA RθCS Typical 54 Maximum 65 Units °C/W 0.56 0.5 0.68 °C/W °C/W RθJC www.aosmd.com Page 1 of 5 AOT12N40 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter Conditions Min ID=250µA, VGS=0V, TJ=25°C 400 Typ Max Units STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage BVDSS /∆TJ Zero Gate Voltage Drain Current IDSS Zero Gate Voltage Drain Current ID=250µA, VGS=0V, TJ=150°C 500 ID=250µA, VGS=0V 0.4 V V/ oC VDS=400V, VGS=0V 1 VDS=320V, TJ=125°C 10 IGSS Gate-Body leakage current VDS=0V, VGS=±30V VGS(th) Gate Threshold Voltage VDS=5V, ID=250µA RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=6A gFS Forward Transconductance VDS=40V, ID=6A VSD Diode Forward Voltage IS=1A,VGS=0V ±100 3.3 µA 3.9 4.5 nΑ V 0.49 0.59 Ω 1 V 10 S 0.72 IS Maximum Body-Diode Continuous Current 11 A ISM Maximum Body-Diode Pulsed Current 28 A DYNAMIC PARAMETERS Input Capacitance Ciss Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=25V, f=1MHz VGS=0V, VDS=0V, f=1MHz SWITCHING PARAMETERS Qg Total Gate Charge 740 925 1110 pF 70 100 130 pF 3.5 6.4 9.0 pF 1.4 2.9 4.5 Ω 17 21 nC 13 VGS=10V, VDS=320V, ID=12A Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time IF=12A,dI/dt=100A/µs,VDS=100V 180 235 290 Qrr Body Diode Reverse Recovery Charge IF=12A,dI/dt=100A/µs,VDS=100V 1.9 2.4 2.9 Body Diode Reverse Recovery Time VGS=10V, VDS=200V, ID=12A, RG=25Ω 5.4 nC 5.7 nC 25 ns 57 ns 41 ns 32 ns ns µC A. The value of R θJA is measured with the device in a still air environment with T A =25°C. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating. G. L=60mH, IAS=3.5A, VDD=150V, RG=25Ω, Starting TJ=25°C THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev0: Sep 2012 www.aosmd.com Page 2 of 5 AOT12N40 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 100 25 8V 20 -55°C VDS=40V 10V 10 15 ID(A) ID (A) 7V 6.5V 125°C 10 1 6V 25°C 5 VGS=5.5V 0 0.1 0 5 10 15 20 25 30 2 4 VDS (Volts) Fig 1: On-Region Characteristics 1.6 RDS(ON) (Ω) 8 10 3.0 Normalized On-Resistance 2.0 1.2 VGS=10V 0.8 0.4 0.0 2.4 VGS=10V ID=6A 1.8 1.2 0.6 0.0 0 5 10 15 20 25 -100 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage -50 0 50 100 150 200 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature 1E+01 1.3 1E+00 1.2 1E-01 1.1 IS (A) BVDSS (Normalized) 6 VGS(Volts) Figure 2: Transfer Characteristics 40 125°C 1E-02 25°C 1 1E-03 0.9 1E-04 0.8 -100 1E-05 -50 0 50 100 150 200 TJ (°C) Figure 5: Break Down vs. Junction Temperature Rev0: Sep 2012 www.aosmd.com 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) Page 3 of 5 AOT12N40 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 15 10000 VDS=320V ID=12A Ciss 1000 Capacitance (pF) VGS (Volts) 12 9 6 Coss 100 Crss 10 3 1 0 0 6 12 18 24 0.1 30 100 10 100 15 10µs 100µs 1 1ms DC 10ms 0.1 TJ(Max)=150°C TC=25°C 12 Current rating ID(A) RDS(ON) limited 10 ID (Amps) 1 VDS (Volts) Figure 8: Capacitance Characteristics Qg (nC) Figure 7: Gate-Charge Characteristics 9 6 3 0.01 1 10 100 1000 0 0 VDS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area for AOT12N40 (Note F) 25 50 75 100 125 150 TCASE (°C) Figure 10: Current De-rating (Note B) ZθJC Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC RθJC=0.68°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse PD 0.1 Single Pulse 0.01 1E-05 0.0001 0.001 Ton 0.01 0.1 T 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance for AOT12N40(Note F) Rev0: Sep 2012 www.aosmd.com Page 4 of 5 AOT12N40 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + VDC - VDC DUT Qgs Vds Qgd - Vgs Ig Charge Res istive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs + VDC 90% Vdd - Rg 10% Vgs Vgs t d(on) tr t d(off) t on tf t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L EAR= 1/2 LI Vds 2 AR BVDSS Vds Id + Vgs Vgs VDC - Rg Vdd I AR Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Qrr = - Idt Vds + DUT Vgs Vds - Isd Vgs Ig Rev0: Sep 2012 L Isd + VDC - IF trr dI/dt IRM Vdd Vdd Vds www.aosmd.com Page 5 of 5