DN311 - Dual Output Supply Powers FPGAs from 3.3V and 5V Inputs

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Dual Output Supply Powers FPGAs from 3.3V and 5V Inputs
Design Note 311
Haresh Patel
Introduction
FPGAs often require multiple power supplies: one for
the core voltage (usually 1.8V, but sometimes as low as
1.2V) and at least one more for the I/O circuitry (often
2.5V). The available input supply is either 3.3V or 5V.
One way to provide the multiple step-down conversions
is via multiple switcher-based power supplies; however,
this may be more complicated and cumbersome than
is warranted, especially if the I/O does not draw much
current. In such instances, the dual output LTC ®1704
is a simple and space-saving option. It can supply two
voltages with its versatile high frequency switcher and
its space-saving LDO controller.
Circuit Description
With a 5V input, the switcher channel can generate core
voltages from 0.8V to 3.3V at currents up to 15A. This
550kHz switcher reduces required LC filter size while
VIN
5V
+
C6 1μF
1
R2
18.7k
C7
1μF
R4 11k
C8
C9
4700pF 68pF
R8
1k
R9
10k
R10
8.06k
The LDO uses an external pass transistor to regulate
the I/O voltage. The LTC1704 provides base currents
up to 30mA to control the output voltage under varying
load conditions. The circuit shown in Figure 1 provides
2.5V at 2A from a 3.3V supply.
The uncommitted collector and emitter of the external
pass transistor gives the LDO versatility. It can convert
1.8V to 1.5V or 1.2V. At lower power levels, the input
voltage can be as high as 5V. Output current would
then be limited by thermal considerations.
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and No RSENSE is a trademark of Linear Technology Corporation. All other
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D1
MBRO520LT1
C4
10μF
6.3V
C1-C3
150μF
10V
providing fast response to dynamic loads. Efficiency
of the switcher is very high and features No RSENSE ™
technology, where the output current is sensed via the
MOSFET’s on resistance, to improve efficiency compared with regulators using a sense resistor.
2
TG
R12
6.8Ω
BOOST
16
15
PVCC
3
14
LTC1704
IMAX
BG
4
13
RUN/SS PGND
5
12
COMP
PGOOD
6
11
VCC
FB
7
10
REGDR REGLIM
8
9
GND
REGFB
SW
L1
0.80μH
CDEP105-0R8MC-88
Q1
FDS6670A
R3
10Ω
+
Q2
FDS6670A
C14-C16
180μF
4V
D2
MBRS320T3
C17
1μF
R5 4.99k
R7 680k
C11
1000pF
R6
1.74k
C12
2.2μF
10V
+
R11
806Ω
VOUT2
2.5V
2A
3.3V
INPUT
Q3
D44H11
C10
100μF
4V
C13
180pF
C5
10μF
6.3V
PGOOD
DN311 F01
Figure 1. Dual Power Supply Using the LTC1704
05/03/311_conv
VOUT1
1.8V
10A
Figure 1 shows a dual output 1.8V/10A and 2.5V/2A
circuit using the LTC1704. This is a typical FPGA application where 1.8V is the core voltage and 2.5V is for
I/O. In this case, the switcher supplies 1.8V and the LDO
supplies 2.5V, taking power from either 3.3V or 5V for
the external pass transistor.
The switcher channel uses all N-channel MOSFETs for
improved efficiency and lower cost. R9 and R10 program
the output voltage. Type III compensation—C9, R4, C8,
R8 and C13—allows maximum flexibility in the choice
of LC filter components. The current limit circuit uses
the RDS(ON) of the bottom MOSFET to sense inductor
current. A 10μA current from the IMAX pin flowing into
R2 produces the reference voltage for current limit. The
current limit circuit discharges the soft start capacitor
C7 to control output current.
The linear regulator uses an external high gain low VCESAT
NPN series pass transistor Q3. The output voltage is
0.8V • (1 + R6/R11). The maximum output voltage is
limited to (VCC – VDRV – VBE) and by (VC(Q5) – VCESAT ).
100
Figure 2 shows the efficiency of the 1.8V output over
a 1A to 10A current range, over which the efficiency
remains close to 90%. Figure 3 shows the load step
response of the switcher to a 4A to 10A load step. At
each edge of the load step, less than 50mV transient
deviation occurs when using three 180μF 4V solid
polymer capacitors.
Conclusion
The LTC1704 is suitable for applications requiring a high
power switcher and a moderate power linear regulator
where the cost and complexity of a second switcher
would be unjustifiable. For applications that require
more power from the 2nd output than is practical with
a linear regulator, the LTC1702A is a good choice with
its two switchers that can deliver up to 15A each.
VIN = 5V
90
VOUT
50mV/DIV
AC COUPLED
80
EFFICIENCY (%)
The maximum driver voltage drop (VDRV ) is 1.1V at
30mA. Limiting the base drive current provides short
circuit protection. R7 programs max base current drive.
Pulling REGLIM down to below 0.8V turns off the LDO.
70
1.8VOUT
60
50
40
10A
30
4A
20
10
0
0A
20μs/DIV
0
5
OUTPUT CURRENT (A)
DC311 F03
10
Figure 3. Step Load Response of 1.8V Output
DN311 F02
Figure 2. 1.8V Efficiency
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