Fujitsu Microelectronics Europe MCU-AN-390053-E-V14 Application Note EMC Design Guide F²MC-16LX Family © Fujitsu Mikroelektronik GmbH, Microcontroller Application Group History 10th Oct. 00 26th Apr. 01 23rd Aug. 01 27th Aug. 01 18th Jul. 02 NFl NFl NFl NFl NFl V1.0 V1.1 V1.2 V1.3 V1.4 Initial draft Oscillator circuit added Recommended layout, power supply routing added Layout rules added Description DeCap added Warranty and Disclaimer To the maximum extent permitted by applicable law, Fujitsu Mikroelektronik GmbH restricts its warranties and its liability for all products delivered free of charge (eg. software include or header files, application examples, application Notes, target boards, evaluation boards, engineering samples of IC’s etc.), its performance and any consequential damages, on the use of the Product in accordance with (i) the terms of the License Agreement and the Sale and Purchase Agreement under which agreements the Product has been delivered, (ii) the technical descriptions and (iii) all accompanying written materials. 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To the maximum extent permitted by applicable law, Fujitsu Mikroelektronik GmbH´s and its suppliers´ liability is restricted to intention and gross negligence. NO LIABILITY FOR CONSEQUENTIAL DAMAGES To the maximum extent permitted by applicable law, in no event shall Fujitsu Mikroelektronik GmbH and its suppliers be liable for any damages whatsoever (including but without limitation, consequential and/or indirect damages for personal injury, assets of substantial value, loss of profits, interruption of business operation, loss of information, or any other monetary or pecuniary loss) arising from the use of the Product. Should one of the above stipulations be or become invalid and/or unenforceable, the remaining stipulations shall stay in full effect. . MCU-AN-390053-E-V14 -2- © Fujitsu Microelectronics Europe GmbH Table of Contents: 1. Introduction 4 2. Rules to create a good Layout 4 3. Crystal Oscillator Circuit 5 4. Power supply routing 6 5. Noise reduction for general IO pins 9 6. Function of certain MCU pins 10 7. EMI Measurement for LX16-family 11 © Fujitsu Microelectronics Europe GmbH -3- MCU-AN-390053-E-V14 1. Introduction In the following description, the EMC design guide of 16-bit Fujitsu microcontrollers will be discussed. It describes how external power supply should be connected to the Vcc and Vss pins and offers some suggestions. An overview of internal supply of MCU is made as well to have a better understanding of the design. The EMI measurements in the following described tests are just example measurements. The measured emissions are no data, which are specified in the DS of the microcontroller series. During the last designs the EMI of the Fujitsu 16LX microcontroller series could be reduced step by step. The PLL multiplier circuit allows the usage of low crystal frequency to reduce high-frequency noise from the oscillator circuit. The clock tree is mostly the cause of the noise. Therefore the driver capability of clock buffers is optimised and for one big buffer are used several small clock buffers. Further countermeasures like using of the MCU flash and core on a base of 3.3V level reduces the noise level of the package. For the PWM outputs it is possible to use the slew rate control. This means that the rise and fall time can ease to reduce the harmonics. The integration of On-chip bypass capacitors reduces the noise ripple on the internal power supply net so that the broadband noise on the IO pins is improved. The following description is based on the MB90F540 and 590 series, but the same situation exists for all current series of the 16LX family, with or without an external bus interface. 2. Rules to create a good Layout 1. Use max. trace-width and min. length to connect VSS and VDD @C-pins to decoupling capacitors (DeCap) 2. Don’t use stub line to connect the DeCap to @C-pins, let flows the noise current direct through pads of DeCap 3. Use close ground plane direct below MCU package as shield 4. Use different ground systems for analogue, digital, power-driver and connector ground 5. Avoid loop current in the ground system, check for ground loops. 6. Use a star point ground below MCU for analogue and digital ground, use a second star point ground below 5V regulator for MCU, power-driver and connector ground 7. Don't create signal loop on the PCB, minimize trace length 8. Partitioned system into analogue, digital and power-driver section 9. Place series resistor or RC-block for the IO-circuit nearby MCU-pin to reduce the noise on the signal line. 10. Use a capacitor for each connector pin to reduce the noise of external lines, place this capacitor close to connector pin MCU-AN-390053-E-V14 -4- © Fujitsu Microelectronics Europe GmbH 3. Crystal Oscillator Circuit Figure 1 shows the oscillator for the Fujitsu 16-bit family. For best performance, the PCB layout of this circuit should cover only a very small area. For the layout is recommended a PCB with two or more layers. Make sure to provide bypass capacitors via shortest distance from X0, X1 pins, crystal oscillator, and ground lines. The lines of the oscillation circuit should not cross lines of other circuits. X1 X0 Microcontroller Oscillator Figure 1: Principle of the Oscillator circuit It is necessary to avoid coupling noise into the power supply (pin 81/84) of the clock circuit. The crystal oscillator has to be connected with short lines to X0/X1 and Vss. Note that pin X1 is the output of inverter. Particularly this track should have a short length. Decoupling capacitor C B on the back side of the PCB Decoupling capacitor C B on the back side of the PCB Via to ground island and system ground CB Vss Vss Vcc X0 Connection to ground layer Via to system Vcc CB Vcc X0 X1 C1 Via to ground island on the back side Quartz Crystal X1 Single ground island on the back side Connection to ground layer C2 SMD Quartz Crystal C1 Quartz Crystal package has to be grounded C2 Connection to ground layer b) Layout example for a SMD quartz crystal better layout design, because C1 and C2 are connected to Vss and than after with the system ground a) Layout example for a leaded quartz crystal worse layout design, because C1 and C2 are wrong connected to VSS Figure 2: Layout example for oscillator circuit © Fujitsu Microelectronics Europe GmbH -5- MCU-AN-390053-E-V14 4. Power supply routing One topic our noise reduction technology is lowering internal power supply voltage on 3V level to reduce the current flow. Fig. 2 shows the structure of 5V and 3V power supply. I/O-PORT FLASH External capacitor Vcc Vcc3 3V Regulator Vss Vss CPU RAM SCI / TIMER / etc. A/D+D/A AVcc AVss Figure 3: Structure of power supply for MCU core and IO-Port Only the right placement and the value of decoupling capacitor (DeCap) guaranty the function of decoupling capacitors. The high speed current (di/dt) will be supported from DeCap only. The exactly use of DeCap is important for the noise reduction on the PCB. VCC VCC @C DeCap VCC @C DeCap DeCap GND GND a) VCC and GND lead to supply noise current flows not via DeCap, DeCap has not effect DeCap GND b) GND lead noise to system GND noise current flows partly via DeCap, DeCap has hardly effect @C VCC @C c) GND lead noise to System GND noise current flows partly via DeCap, DeCap has hardly effect VCC @C VCC @C DeCap DeCap GND GND GND GND d) VCC and GND lead to supply noise current flows not via DeCap, DeCap has not effect e) GND is not short connected to DeCap. between GND and DeCap flows a loop current DeCap has hardly effect f) DeCap correct connected to @C and power supply. high speed current will be supported from DeCap Figure 4: The exactly use of the DeCap (decoupling capacitor) MCU-AN-390053-E-V14 -6- © Fujitsu Microelectronics Europe GmbH The high-speed current (di/dt) will be supported from the decoupling capacitor only. Therefore use traces with max. width and min. length between Vss/Vcc pin and DeCap. After DeCap use thin traces to route the trace to the power supply system. use EMC filter for @C-supply short length max. width high Z @C low Z VCC C GND Figure 5: The noise current flows return over the ground line The exactly use of decoupling capacitors for the Vcc and Vss pins is the basis to reduce the noise, but also the return way between load and MCU ground is not neglect. high-Z choking coil min. length max. width min. length max. width @C VCC C I slow clock unit & core VSS HVCC IO-driver HVSS I fast low-Z I supply C I return I crossbar dt/di R C Load I load Figure 6: The noise current flows return over the ground line To ensure an efficient decoupling of the power supply, two capacitors should be placed close on each Vcc pin. The values of both capacitors should have a relationship of about 1:100. Typical values are e.g. 100nF (XR7) and 1nF (COG). The accurate value is depended on the application board, e.g. impedance of PCB or the length of supply lines. However, all of the DeCaps on the PCB should have the same value. Lboard Lboard VDD IC2 DeCap Cn IC1 DeCap C2 Cboard DeCap C1 A ICn f GND Figure 7: The use of several values of DeCaps lead to undefined resonance frequencies, that’s why all DeCaps should have the same value. © Fujitsu Microelectronics Europe GmbH -7- MCU-AN-390053-E-V14 For 2-layer boards should be used a closed ground plane (located directly below the MCU). The Vcc supplies should be taken from the bottom layer. For 4-layer boards should be used the inside layers for GND and Vcc supplies. In this case, both layers form additional capacitor (broadband behaviour) for the power supply. Figure 8 shows an example of a star connection for Vcc supplies on the MCU. This method of Vcc connection reduces the loop of the Vcc lines around the MCU, thus reducing noise emission. A variation of this circuit may be needed, if separate filtered supply voltages are routed to the A/D supplies (pin 34/37). X0 Vss Single ground island on the back side Q star point and noise filter for Vcc and ground on the back side C Via to MCU supply C C ground plan below package on the top side Q CB C Connection to power supply X1 Vcc ground plane on top and botton layer X0A X1A HVss Via to ground island and system ground CB Vss CB HVcc CB LB Vcc HVss Decoupling capacitor C B on the back side of the PCB CB CB Decoupling capacitor C B on the back side of the PCB CB CB Decoupling capacitor C B on the back side of the PCB HVcc CB VCC3C HVss VSS AVss AVR- AVR+ AVcc CB Decoupling capacitor C B on the back side of the PCB Figure 8: 16LX family with a subclock or stepper motor driver, recommended layout for multiple layers PCB Note: All decoupling capacitors on the Vcc pins should have the same value. These capacitors should be placed close to the Vcc pin. The Vcc/Vss current should flows through the pad of the capacitor. MCU-AN-390053-E-V14 -8- © Fujitsu Microelectronics Europe GmbH 5. Noise reduction for general IO pins To reduce noise, make sure to connect the Vss or Vcc with smoothed power supply, because the noise on the power supply will also distributed via IO-pin, which is configured as static low or high output. Figure 9 shows an example to reduce the noise on output lines. @C IO-Port @C IO-Port Noise length of trace length of trace Figure 9: Place the series resistor close to IO pin because so will be reduced the noise of output Note: To reduce noise, make sure to connect unused input pins to Vss or Vcc (Use pull-down or pull-up resistor, please check the DS of the microcontroller series). Also, especially if CMOS Logic is used, floating gates could generate problems regarding high input currents and latch up. © Fujitsu Microelectronics Europe GmbH -9- MCU-AN-390053-E-V14 6. Function of certain MCU pins Pin name Pin no. VCC 23 84 VSS C 11 84 27 AVCC AVSS AVRL AVRH DVCC HVCC 34 37 35 36 58 68 DVSS HVSS 53 63 X0 X0A X1 X1A 82 80 83 79 MCU-AN-390053-E-V14 Function Main supply for IO buffer MCU core close to input the internal 3.3V regulator close to crystal oscillator Main supply for IO buffer and MCU core close to the internal 3.3V regulator close to crystal oscillator External smooth capacitor for internal 3.3V regulator output, it is used for supply of the MCU core Note, that this pin leads the most of noise Power supply for the A/D converter Power supply for the A/D converter Reference voltage input for the A/D converter Reference voltage input for the A/D converter Power supply for the PWM (high current) outputs, it is not connected to VCC, should be connected to extra power supply Power supply for the PWM (high current) outputs, it is not connected to VSS, should be connected to extra power supply Oscillator input, if not used so shall be connected with pull-up or pull-down resistor (see please DS) Oscillator output, the crystal and bypass capacitor must be connected via shortest distance with X1 pin, if not used so shall be open - 10 - © Fujitsu Microelectronics Europe GmbH 7. EMI Measurement for LX16-family Schirmbox Spectrum analyzer 0.1-1000MHz Vdd 10Ai + Power supply 5V be pro RF Vss 10Ai X-TEM Filter IEEE Ferrit Filter RS232 Workstation Figure 10: Measuring setup PLL 16 MHz 12 MHz 8 MHz 4 MHz 2 MHz CKSCR 0xBB 0xBA 0xB9 0xB8 0xDC Remarks default after reset PLL disabled Table 1: CKSC- settings for several PLL frequencies Port port x0 port x1 port x2 port x3 port x4 port x5 port x6 port x7 Function output output output input output output output input I/O-State high low 2 kHz toggling high low 2 kHz toggling - Table 2: I/O port settings for toggle test Probe Pin GND GND1 GND2 GND3 GND DVSS VSS AVSS Remarks common ground oscillator/ext. bus I/O-ground analog ground Table 3: Ground measurement with 1ohm probe © Fujitsu Microelectronics Europe GmbH - 11 - MCU-AN-390053-E-V14 MCU-AN-390053-E-V14 - 12 - © Fujitsu Microelectronics Europe GmbH © Fujitsu Microelectronics Europe GmbH - 13 - MCU-AN-390053-E-V14