FUJITSU SEMICONDUCTOR DATA SHEET DS706-00012-0v02-E 32-bit ARMTM CortexTM-M3 based Microcontroller FM3 MB9A310 Series MB9AF311L/M/N, MB9AF312L/M/N, MB9AF314L/M/N, MB9AF315M/N, MB9AF316M/N DESCRIPTION The MB9A310 Series are a highly integrated 32-bit microcontroller that target for high-performance and cost-sensitive embedded control applications. The MB9A310 Series are based on the ARM Cortex-M3 Processor and on-chip Flash memory and SRAM, and peripheral functions, including Motor Control Timers, ADCs and Communication Interfaces (USB, UART, SIO, I2C, LIN). The products which are described in this data sheet are placed into TYPE1 product categories in "FM3 FAMILY MB9Axxx/MB9Bxxx SERIES PERIPHERAL MANUAL". Note: ARM and Cortex are the trademarks of ARM Limited in the EU and other countries. Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.6 FUJITSU SEMICONDUCTOR CONFIDENTIAL r2.1 MB9A310 Series FEATURES 32-bit ARM Cortex-M3 Core x Processor version: r2p1 x Up to 40MHz Frequency Operation x Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels x 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories [Flash memory] x Up to 512 Kbyte x Read cycle: 0wait-cycle x Security function for code protection [SRAM] This Series contain a total of up to 32Kbyte on-chip SRAM memories. This is composed of two independent SRAM (SRAM0,SRAM1) . SRAM0 is connected to I-code bus or D-code bus of Cortex-M3 core. SRAM1 is connected to System bus. x SRAM0: Up to 16 Kbyte. x SRAM1: Up to 16 Kbyte. External Bus Interface* x x x x x Supports SRAM, NOR Flash device Up to 8 chip selects 8/16-bit Data width Up to 25-bit Address bit Supports uports Address/Data multiplex * : MB9AF311L, F312L, F314L do not support External Bus Interface USB Interface USB interface is composed of Function and Host. [USB function] x USB2.0 Full-Speed supported x Max. 6 EndPoint supported x EndPoint 0 is control transfer x EndPoint 1-5 can be selected Bulk-transfer, Interrupt-transfer or Isochronous-transfer x EndPoint1-5 is comprised Double Buffer [USB host] x USB2.0 Full/Low speed supported x Bulk-transfer, interrupt-transfer and Isochronous-transfer support (using EndPoint1, EndPoint2) x USB Device connected/dis-connected automatically detect x IN/OUT token handshake packet automatically x Max.256-byte packet-length supported x Wake-up function supported 2 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series Multi-function Serial Interface (Max. 8channels) x 4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3) x Operation mode is selectable from the followings for each channel. x UART x CSIO x LIN x I 2C [UART] x Full-duplex double buffer x Selection with or without parity supported x Built-in dedicated baud rate generator x External clock available as a serial clock x Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4)* x Various error detect functions available (parity errors, framing errors, and overrun errors) * : MB9AF311L, F312L, F314L do not support Hardware Flow control [CSIO] x Full-duplex double buffer x Built-in dedicated baud rate generator x Overrun error detect function available [LIN] x LIN protocol Rev.2.1 supported x Full-duplex double buffer x Master/Slave mode supported x LIN break field generate (can be changed 13-16bit length) x LIN break delimiter generate (can be changed 1-4bit length) x Various error detect functions available (parity errors, framing errors, and overrun errors) [I2C] x Standard mode (Max.100kbps) / High-speed mode (Max.400Kbps) supported DMA Controller (8channels) DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously. x x x x x x x 8 independently configured and operated channels Transfer can be started by software or request from the built-in peripherals Transfer address area: 32bit(4Gbyte) Transfer mode: Block transfer/Burst transfer/Demand transfer Transfer data type: byte/half-word/word Transfer block count: 1 to 16 Number of transfers: 1 to 65536 A/D Converter (Max. 16channels) [12-bit A/D Converter] x Successive Approximation Register type x Built-in 3unit* x Conversion time: 1.0μs@5V x Priority conversion available (priority at 2levels) x Scanning conversion mode x Built-in FIFO for conversion data storage (for SCAN conversion: 16steps, for Priority conversion: 4steps) * : MB9AF311L, F312L, F314L built-in 2unit DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 3 r2.1 MB9A310 Series Base Timer (Max. 8channels) Operation mode is selectable from the followings for each channel. x x x x 16-bit PWM timer 16-bit PPG timer 16/32-bit reload timer 16/32-bit PWC timer General Purpose I/O Port This series can use its pins as I/O ports when they are not used for external bus or peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function can be allocated. x x x x x Capable of pull-up control per pin Capable of reading pin level directly Built-in the port relocate function Up to 83 fast I/O Ports@100pin Package Some pins are 5V tolerant I/O (MB9AF315M/N, MB9AF316M/N only) Please see " PIN DESCRIPTION" to confirm the corresponding pins. Multi-function Timer (Max. 2unit) The Multi-function timer is composed of the following blocks. x x x x x x 16-bit free-run timer × 3ch/unit Input capture × 4ch/unit Output compare × 6ch/unit A/D activating compare × 3ch/unit Waveform generator × 3ch/unit 16-bit PPG timer × 3ch/unit The following function can be used to achieve the motor control. x x x x x x PWM signal output function DC chopper waveform output function Dead time function Input capture function A/D convertor activate function DTIF (Motor emergency stop) interrupt function Quadrature Position/Revolution Counter (QPRC) (Max. 2unit) The Quadrature Position/Revolution Counter (QPRC) is used to measure the position of the position encoder. Moreover, it is possible to use up/down counter. x x x x The detection edge of the three external event input pins AIN, BIN and ZIN is configurable. 16-bit position counter 16-bit revolution counter Two 16-bit compare registers Dual Timer (Two 32/16bit Down Counter) The Dual Timer consists of two programmable 32/16-bit down counters. Operation mode is selectable from the followings for each channel. x Free-running x Periodic (=Reload) x One-shot 4 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series Watch Counter The Watch counter is used for wake up from power saving mode. x Interval timer: up to 64s(Max.)@ Sub Clock : 32.768kHz External Interrupt Controller Unit x Up to 16 external vectors x Include one non-maskable interrupt(NMI) Watch dog Timer (2channels) A watchdog timer can generate interrupts or a reset when a time-out value is reached. This series consists of two different watchdogs, a "Hardware" watchdog and a, "Software" watchdog. "Hardware" watchdog timer is clocked by low speed CR oscillator. Therefore, "Hardware" watchdog is active in any power saving mode except STOP. CRC (Cyclic Redundancy Check) Accelerator The CRC accelerator helps a verify data transmission or storage integrity. CCITT CRC16 and IEEE-802.3 CRC32 are supported. x CCITT CRC16 Generator Polynomial: 0x1021 x IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7 Clock and Reset [Clocks] Five clock sources (2 ext. osc, 2 CR osc, and main PLL) that are dynamically selectable. x x x x x Main Clock Sub Clock High-speed CR Clock Low-speed CR Clock Main PLL Clock : 4 MHz to 48MHz : 32.768kHz : 4MHz : 100kHz [Resets] Reset requests from INITX pins, Power on reset, Software reset, watchdog timers reset, low voltage detector reset and clock supervisor reset. Clock Super Visor (CSV) Clocks generated by CR oscillators are used to supervise abnormality of the external clocks. x External OSC clock failure (clock stop) is detected, reset is asserted. x External OSC frequency anomaly is detected, interrupt or reset is asserted. Low Voltage Detector (LVD) This Series include 2-stage monitoring of voltage on the VCC. When the voltage falls below the voltage has been set, Low Voltage Detector generates an interrupt or reset. x LVD1: error reporting via interrupt x LVD2: auto-reset operation DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 5 r2.1 MB9A310 Series Low Power Mode Three power saving modes supported. x SLEEP x TIMER x STOP Debug x Serial Wire JTAG Debug Port (SWJ-DP) x Embedded Trace Macrocells (ETM) provide comprehensive debug and trace facilities.* *: MB9AF311L/M, F312L/M, F314L/M, F315M, F316M support only SWJ-DP. Power Supply Two Power Supplies x VCC = 2.7V to 5.5V: Correspond to the wide range voltage. x USBVCC = 3.0V to 3.6V: for USB I/O voltage, when USB is used. = 2.7V to 5.5V: when GPIO is used. 6 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series PRODUCT LINEUP Memory size Product device MB9AF311L/M/N MB9AF312L/M/N MB9AF314L/M/N On-chip Flash On-chip SRAM Product device 64Kbyte 16Kbyte 128Kbyte 16Kbyte MB9AF315M/N MB9AF316M/N 384Kbyte 32Kbyte 512Kbyte 32Kbyte On-chip Flash On-chip SRAM 256Kbyte 32Kbyte Function Product device Pin count MB9AF311L MB9AF312L MB9AF314L 64 CPU Freq. Power supply voltage range USB2.0FS (Function/Host) DMAC External Bus Interface - MB9AF311M MB9AF312M MB9AF314M MB9AF315M MB9AF316M MB9AF311N MB9AF312N MB9AF314N MB9AF315N MB9AF316N 80 Cortex-M3 40MHz 2.7V to 5.5V 1ch 8ch 100 Addr:21bit (Max.) Data:8 bit CS:4 (Max.) Support: SRAM, NOR Flash Addr:25bit (Max.) Data:8/16 bit CS:8 (Max.) Support: SRAM, NOR Flash MF Serial Interface 8ch (Max.) (UART/CSIO/LIN/I2C) Base Timer 8ch (Max.) (PWC/ Reload timer/PWM/PPG) A/D activation 3ch compare Input 4ch capture MFFree-run 3ch 1 unit 2 units (Max.) Timer timer Output 6ch compare Waveform 3ch generator PPG 3ch QPRC 2ch (Max.) Dual Timer 1 unit Watch Counter 1 unit CRC Accelerator Yes Watchdog timer 1ch (SW) + 1ch (HW) External Interrupts 7pins (Max.)+ NMI × 1 11pins (Max.)+ NMI × 1 16pins (Max.)+ NMI × 1 I/O ports 51pins (Max.) 66pins (Max.) 83pins (Max.) 12 bit A/D converter 9ch (2 units) 12ch (3 units) 16ch (3 units) CSV (Clock Super Visor) Yes LVD (Low Voltage Detector) 2ch Internal High-speed 4MHz (± 2%) DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 7 r2.1 MB9A310 Series Product device MB9AF311L MB9AF312L MB9AF314L MB9AF311M MB9AF312M MB9AF314M MB9AF315M MB9AF316M MB9AF311N MB9AF312N MB9AF314N MB9AF315N MB9AF316N OSC Low-speed 100kHz (Typ) Debug Function SWJ-DP SWJ-DP/ETM Note: All signals of the peripheral function in each product cannot be allocated by limiting the pins of package. It is necessary to use the port relocate function of the General I/O port according to your function use. 8 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series PACKAGES Product name Package LQFP: LQFP: LQFP: LQFP: QFP: BGA: * FPT-64P-M24/M38 (0.5mm pitch) FPT-64P-M23/M39 (0.65mm pitch) FPT-80P-M21/M37 (0.5mm pitch) FPT-100P-M20/M23 (0.5mm pitch) FPT-100P-M06 (0.65mm pitch) BGA-112P-M04 (0.8mm pitch) MB9AF311L MB9AF312L MB9AF314L - MB9AF311M MB9AF312M MB9AF314M MB9AF315M MB9AF316M MB9AF311N MB9AF312N MB9AF314N MB9AF315N MB9AF316N - - - * : Supported : MB9AF315N, MB9AF316N is planning Note : Refer to " PACKAGE DIMENSIONS" for detailed information on each package. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 9 r2.1 MB9A310 Series PIN ASSIGNMENT z FPT-100P-M20/M23 (TOP VIEW) <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. 10 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series z FPT-100P-M06 (TOP VIEW) <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 11 r2.1 MB9A310 Series z FPT-80P-M21/FPT-80P-M37 (TOP VIEW) <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. 12 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series z FPT-64P-M23/M24/M38/M39 (TOP VIEW) <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 13 r2.1 MB9A310 Series z BGA-112P-M04 (TOP VIEW) 1 2 3 4 5 8 9 10 6 7 11 P0B P07 TMS/ TRSTX VCC SWDIO VSS TDO/ TCK/ VSS SWO SWCLK TDI A VSS UDP0 UDM0 USBVCC P0E B VCC VSS P52 P61 P0F P0C P08 C P50 P51 VSS P60 P62 P0D P09 P05 VSS P20 P21 D P53 P54 P55 VSS P56 P63 P0A VSS P06 P23 AN15 E P30 P31 P32 P33 Index P22 AN14 AN12 AN11 F P34 P35 P36 P39 AN13 AN10 AN09 AVRH G P37 P38 P3A P3D AN08 AN07 AN06 AVSS H P3B P3C P3E VSS P44 P4C AN05 VSS AN04 AN03 AVCC J VCC P3F VSS P40 P43 P49 P4D AN02 VSS AN01 AN00 K VCC VSS X1A INITX P42 P48 P4B P4E MD1 VSS VCC L VSS C X0A VSS P41 P45 P4A MD0 X0 X1 VSS <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. 14 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series PIN DESCRIPTION Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 1 79 B1 1 1 2 2 80 C1 2 - 3 3 81 C2 3 - 4 4 82 B3 4 - 5 83 D1 5 - 6 84 D2 6 - DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name VCC P50 INT00_0 AIN0_2 SIN3_1 RTO10_0 (PPG10_0) MADATA00_1 P51 INT01_0 BIN0_2 SOT3_1 (SDA3_1) RTO11_0 (PPG10_0) MADATA01_1 P52 INT02_0 ZIN0_2 SCK3_1 (SCL3_1) RTO12_0 (PPG12_0) MADATA02_1 P53 SIN6_0 TIOA1_2 INT07_2 RTO13_0 (PPG12_0) MADATA03_1 P54 SOT6_0 (SDA6_0) TIOB1_2 RTO14_0 (PPG14_0) MADATA04_1 I/O circuit Pin state type type - E H E H E H E H E I 15 r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 7 85 D3 7 - 8 86 D5 8 - 9 87 E1 9 5 - 10 88 E2 10 6 - 11 89 E3 11 7 - 12 90 E4 12 8 13 91 F1 - 16 FUJITSU SEMICONDUCTOR CONFIDENTIAL - Pin name P55 SCK6_0 (SCL6_0) ADTG_1 RTO15_0 (PPG14_0) MADATA05_1 P56 INT08_2 DTTI1X_0 MADATA06_1 P30 AIN0_0 TIOB0_1 INT03_2 MADATA07_1 P31 BIN0_0 TIOB1_1 SCK6_1 (SCL6_1) INT04_2 MADATA08_1 P32 ZIN0_0 TIOB2_1 SOT6_1 (SDA6_1) INT05_2 MADATA09_1 P33 INT04_0 TIOB3_1 SIN6_1 ADTG_6 MADATA10_1 P34 FRCK0_0 TIOB4_1 MADATA11_1 I/O circuit Pin state type type E I E H E H E H E H E H E I DS706-00012-0v02-E r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 14 92 F2 - - 15 93 F3 - - 16 94 G1 - - 17 95 G2 - - 18 96 F4 13 9 19 97 G3 14 10 20 98 H1 15 11 21 99 H2 16 12 22 100 G4 17 13 - - B2 - - DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name P35 IC03_0 TIOB5_1 INT08_1 MADATA12_1 P36 IC02_0 SIN5_2 INT09_1 MADATA13_1 P37 IC01_0 SOT5_2 (SDA5_2) INT10_1 MADATA14_1 P38 IC00_0 SCK5_2 (SCL5_2) INT11_1 MADATA15_1 P39 DTTI0X_0 ADTG_2 P3A RTO00_0 (PPG00_0) TIOA0_1 P3B RTO01_0 (PPG00_0) TIOA1_1 P3C RTO02_0 (PPG02_0) TIOA2_1 P3D RTO03_0 (PPG02_0) TIOA3_1 VSS I/O circuit Pin state type type E H E H E H E H E I G I G I G I G I - 17 r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 23 1 H3 18 14 24 2 J2 19 15 25 26 3 4 L1 J1 20 - 16 - 27 5 J4 - - 28 6 L5 - - 29 7 K5 - - 30 8 J5 - - 31 9 H5 21 22 32 10 L6 - - - K2 J3 H4 - 18 FUJITSU SEMICONDUCTOR CONFIDENTIAL - Pin name P3E RTO04_0 (PPG04_0) TIOA4_1 P3F RTO05_0 (PPG04_0) TIOA5_1 VSS VCC P40 TIOA0_0 RTO10_1 (PPG10_1) INT12_1 P41 TIOA1_0 RTO11_1 (PPG10_1) INT13_1 P42 TIOA2_0 RTO12_1 (PPG12_1) P43 TIOA3_0 RTO13_1 (PPG12_1) ADTG_7 P44 TIOA4_0 MAD00_1 RTO14_1 (PPG14_1) P45 TIOA5_0 MAD01_1 RTO15_1 (PPG14_1) VSS VSS VSS I/O circuit Pin state type type G I G I - G H G H G I G I G I G I - DS706-00012-0v02-E r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 33 34 35 11 12 13 L2 L4 K1 23 24 25 17 18 36 14 L3 26 19 37 15 K3 27 20 38 16 K4 28 21 39 17 K6 29 - 22 40 18 J6 30 - 23 41 19 L7 31 - 24 42 20 K7 32 - 25 43 21 H6 33 - DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name C VSS VCC P46 X0A P47 X1A INITX P48 DTTI1X_1 INT14_1 SIN3_2 MAD02_1 P49 TIOB0_0 AIN0_1 IC10_1 SOT3_2 (SDA3_2) MAD03_1 P4A TIOB1_0 BIN0_1 IC11_1 SCK3_2 (SCL3_2) MAD04_1 P4B TIOB2_0 ZIN0_1 IC12_1 MAD05_1 P4C TIOB3_0 SCK7_1 (SCL7_1) AIN1_2 IC13_1 MAD06_1 I/O circuit Pin state type type D M D N B C E H E I E I E I E / I*1 I 19 r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 26 44 22 J7 34 - 45 23 K8 35 27 46 24 K9 36 28 47 25 L8 37 29 48 26 L9 38 30 49 27 L10 39 31 50 51 28 29 L11 K11 40 41 32 33 52 30 J11 42 34 53 31 J10 43 35 - 54 32 J8 44 - - K10 J9 - 20 FUJITSU SEMICONDUCTOR CONFIDENTIAL 36 - Pin name P4D TIOB4_0 SOT7_1 (SDA7_1) BIN1_2 FRCK1_1 MAD07_1 P4E TIOB5_0 INT06_2 SIN7_1 ZIN1_2 MAD08_1 MD1 PE0 MD0 X0 PE2 X1 PE3 VSS VCC P10 AN00 P11 AN01 SIN1_1 INT02_1 FRCK0_2 MAD09_1 P12 AN02 SOT1_1 (SDA1_1) IC00_2 MAD10_1 VSS VSS I/O circuit Pin state type type E / I*1 I E / I*1 I C P J D A A A B - F K F L F K - DS706-00012-0v02-E r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 55 33 H10 45 37 38 56 34 H9 46 39 57 35 H7 47 - 58 36 G10 48 59 37 G9 49 60 61 62 38 39 40 H11 F11 G11 50 51 52 63 41 G8 53 - 40 41 42 43 44 - 64 - 42 - F10 H8 54 - DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 45 - Pin name P13 AN03 SCK1_1 (SCL1_1) IC01_2 MAD11_1 P14 AN04 INT03_1 IC02_2 SIN0_1 MAD12_1 P15 AN05 IC03_2 SOT0_1 (SDA0_1) MAD13_1 P16 AN06 SCK0_1 (SCL0_1) MAD14_1 P17 AN07 SIN2_2 INT04_1 MAD15_1 AVCC AVRH AVSS P18 AN08 SOT2_2 (SDA2_2) MAD16_1 P19 AN09 SCK2_2 (SCL2_2) MAD17_1 VSS I/O circuit Pin state type type F K F L F K F K F L - F K F K - 21 r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 65 43 F9 55 - 66 44 E11 56 - 67 45 E10 - - 68 46 F8 - - 69 47 E9 - - 70 48 D11 - - - - B10 C9 - - 22 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name P1A AN10 SIN4_1 INT05_1 IC00_1 MAD18_1 P1B AN11 SOT4_1 (SDA4_1) IC01_1 MAD19_1 P1C AN12 SCK4_1 (SCL4_1) IC02_1 MAD20_1 P1D AN13 CTS4_1 IC03_1 MAD21_1 P1E AN14 RTS4_1 DTTI0X_1 MAD22_1 P1F AN15 ADTG_5 FRCK0_1 MAD23_1 VSS VSS I/O circuit Pin state type type F L F K F K F K F K F K - DS706-00012-0v02-E r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 57 71 49 - 72 50 46 D10 E8 58 - 47 - 73 51 C11 59 48 - 74 52 C10 60 - 75 76 53 54 A11 A10 - - 77 55 A9 61 49 - 78 56 B9 62 79 57 B11 63 50 51 - 80 58 A8 64 52 81 59 B8 65 53 82 60 C8 - - - - D8 - - DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name P23 SCK0_0 (SCL0_0) TIOA7_1 RTO00_1 (PPG00_1) P22 SOT0_0 (SDA0_0) TIOB7_1 ZIN1_1 P21 SIN0_0 INT06_1 BIN1_1 P20 INT05_0 CROUT_0 AIN1_1 MAD24_1 VSS VCC P00 TRSTX MCSX7_1 P01 TCK SWCLK P02 TDI MCSX6_1 P03 TMS SWDIO P04 TDO SWO P05 TRACED0 TIOA5_2 SIN4_2 INT00_1 MCSX5_1 VSS I/O circuit Pin state type type E I E I E H E H E E E E E E E E E E E F - 23 r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 83 61 D9 - - 66 84 62 A7 - 85 63 B7 - - 86 64 C7 - - 87 65 D7 67 54 - 55 88 66 A6 68 - 56 89 67 B6 69 - - - D4 C3 - 24 FUJITSU SEMICONDUCTOR CONFIDENTIAL - Pin name P06 TRACED1 TIOB5_2 SOT4_2 (SDA4_2) INT01_1 MCSX4_1 P07 ADTG_0 MCLKOUT_1 TRACED2 SCK4_2 (SCL4_2) P08 TRACED3 TIOA0_2 CTS4_2 MCSX3_1 P09 TRACECLK TIOB0_2 RTS4_2 MCSX2_1 P0A SIN4_0 INT00_2 FRCK1_0 MCSX1_1 P0B SOT4_0 (SDA4_0) TIOB6_1 IC10_0 MCSX0_1 P0C SCK4_0 (SCL4_0) TIOA6_1 IC11_0 MALE_1 VSS VSS I/O circuit Pin state type type E F E G E G E G E / I*1 H E / I*1 I E / I*1 I - DS706-00012-0v02-E r2.1 MB9A310 Series Pin No LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64 90 68 C6 70 - 91 69 A5 71 - 92 70 B5 72 57 93 71 D6 73 - 94 72 C5 74 58 - 95 73 B4 75 59 96 74 C4 76 97 75 A4 77 61 98 76 A3 78 62 99 77 A2 79 63 60 100 78 A1 80 64 *1 : 5V tolerant I/O on MB9AF315M/N, MB9AF316M/N. Pin name P0D RTS4_0 TIOA3_2 IC12_0 MDQM0_1 P0E CTS4_0 TIOB3_2 IC13_0 MDQM1_1 P0F NMIX CROUT_1 P63 INT03_0 MWEX_1 P62 SCK5_0 (SCL5_0) ADTG_3 MOEX_1 P61 SOT5_0 (SDA5_0) TIOB2_2 UHCONX P60 SIN5_0 TIOA2_2 INT15_1 MRDY_1 USBVCC P80 UDM0 P81 UDP0 VSS I/O circuit Pin state type type E I E I E J E H E I E I E / I*1 H H O H O - The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 25 r2.1 MB9A310 Series SIGNAL DESCRIPTION Module Pin name ADC ADTG_0 ADTG_1 ADTG_2 ADTG_3 ADTG_4 ADTG_5 ADTG_6 ADTG_7 ADTG_8 AN00 AN01 AN02 AN03 AN04 AN05 AN06 AN07 AN08 AN09 AN10 AN11 AN12 AN13 AN14 AN15 TIOA0_0 TIOA0_1 TIOA0_2 TIOB0_0 TIOB0_1 TIOB0_2 TIOA1_0 TIOA1_1 TIOA1_2 TIOB1_0 TIOB1_1 TIOB1_2 TIOA2_0 TIOA2_1 TIOA2_2 TIOB2_0 TIOB2_1 TIOB2_2 Base Timer 0 Base Timer 1 Base Timer 2 Function A/D converter external trigger input pin A/D converter analog input pin ANxx describes ADC ch.xx Base timer ch.0 TIOA pin Base timer ch.0 TIOB pin Base timer ch.1 TIOA pin Base timer ch.1 TIOB pin Base timer ch.2 TIOA pin Base timer ch.2 TIOB pin 26 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 84 7 18 94 70 12 30 52 53 54 55 56 57 58 59 63 64 65 66 67 68 69 70 27 19 85 40 9 86 28 20 5 41 10 6 29 21 96 42 11 95 62 85 96 72 48 90 8 30 31 32 33 34 35 36 37 41 42 43 44 45 46 47 48 5 97 63 18 87 64 6 98 83 19 88 84 7 99 74 20 89 73 A7 D3 F4 C5 D11 E4 J5 J11 J10 J8 H10 H9 H7 G10 G9 G8 F10 F9 E11 E10 F8 E9 D11 J4 G3 B7 J6 E1 C7 L5 H1 D1 L7 E2 D2 K5 H2 C4 K7 E3 B4 66 7 13 74 12 42 43 44 45 46 47 48 49 53 54 55 56 14 30 9 15 5 31 10 6 16 76 32 11 75 9 58 8 34 35 36 37 38 39 40 44 45 10 22 5 11 23 6 12 60 24 7 59 DS706-00012-0v02-E r2.1 MB9A310 Series Module Pin name Base Timer 3 TIOA3_0 TIOA3_1 TIOA3_2 TIOB3_0 TIOB3_1 TIOB3_2 TIOA4_0 TIOA4_1 TIOA4_2 TIOB4_0 TIOB4_1 TIOB4_2 TIOA5_0 TIOA5_1 TIOA5_2 TIOB5_0 TIOB5_1 TIOB5_2 TIOA6_1 TIOB6_1 TIOA7_0 TIOA7_1 TIOA7_2 TIOB7_0 TIOB7_1 TIOB7_2 Base Timer 4 Base Timer 5 Base Timer 6 Base Timer 7 Function Base timer ch.3 TIOA pin Base timer ch.3 TIOB pin Base timer ch.4 TIOA pin Base timer ch.4 TIOB pin Base timer ch.5 TIOA pin Base timer ch.5 TIOB pin Base timer ch.6 TIOA pin Base timer ch.6 TIOB pin Base timer ch.7 TIOA pin Base timer ch.7 TIOB pin DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 30 22 90 43 12 91 31 23 44 13 32 24 82 45 14 83 89 88 71 72 - 8 100 68 21 90 69 9 1 22 91 10 2 60 23 92 61 67 66 49 50 - J5 G4 C6 H6 E4 A5 H5 H3 J7 F1 L6 J2 C8 K8 F2 D9 B6 A6 D10 E8 - 17 70 33 12 71 21 18 34 22 19 35 69 68 57 58 - 13 25 8 14 26 15 27 56 55 46 47 - 27 r2.1 MB9A310 Series Module Pin name Debugger SWCLK External Bus Function Serial wire debug interface clock input Serial wire debug interface data input / SWDIO output SWO Serial wire viewer output TCK J-TAG test clock input TDI J-TAG test data input TDO J-TAG debug data output TMS J-TAG test mode state input/output TRACECLK Trace CLK output of ETM TRACED0 TRACED1 Trace data output of ETM TRACED2 TRACED3 TRSTX J-TAG test reset Input MAD00_1 MAD01_1 MAD02_1 MAD03_1 MAD04_1 MAD05_1 MAD06_1 MAD07_1 MAD08_1 MAD09_1 MAD10_1 MAD11_1 MAD12_1 External bus interface address bus MAD13_1 MAD14_1 MAD15_1 MAD16_1 MAD17_1 MAD18_1 MAD19_1 MAD20_1 MAD21_1 MAD22_1 MAD23_1 MAD24_1 28 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 78 56 B9 62 50 80 58 A8 64 52 81 78 79 81 80 86 82 83 84 85 77 31 32 39 40 41 42 43 44 45 53 54 55 56 57 58 59 63 64 65 66 67 68 69 70 74 59 56 57 59 58 64 60 61 62 63 55 9 10 17 18 19 20 21 22 23 31 32 33 34 35 36 37 41 42 43 44 45 46 47 48 52 B8 B9 B11 B8 A8 C7 C8 D9 A7 B7 A9 H5 L6 K6 J6 L7 K7 H6 J7 K8 J10 J8 H10 H9 H7 G10 G9 G8 F10 F9 E11 E10 F8 E9 D11 C10 65 62 63 65 64 61 21 22 29 30 31 32 33 34 35 43 44 45 46 47 48 49 53 54 55 56 60 53 50 51 53 52 49 - DS706-00012-0v02-E r2.1 MB9A310 Series Module Pin name External Bus MCSX0_1 MCSX1_1 MCSX2_1 MCSX3_1 MCSX4_1 MCSX5_1 MCSX6_1 MCSX7_1 MDQM0_1 MDQM1_1 MOEX_1 MWEX_1 Function External bus interface chip select output pin External bus interface byte mask signal output External bus interface read enable signal for SRAM External bus interface write enable signal for SRAM MADATA00_1 MADATA01_1 MADATA02_1 MADATA03_1 MADATA04_1 MADATA05_1 MADATA06_1 MADATA07_1 External bus interface data bus MADATA08_1 MADATA09_1 MADATA10_1 MADATA11_1 MADATA12_1 MADATA13_1 MADATA14_1 MADATA15_1 External bus interface Address Latch enable output signal for multiplex External bus interface external RDY MRDY_1 input signal External bus interface external clock MCLKOUT_1 output MALE_1 DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 88 87 86 85 83 82 79 77 90 91 66 65 64 63 61 60 57 55 68 69 A6 D7 C7 B7 D9 C8 B11 A9 C6 A5 68 67 63 61 70 71 - 94 72 C5 74 - 93 71 D6 73 - 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 C1 C2 B3 D1 D2 D3 D5 E1 E2 E3 E4 F1 F2 F3 G1 G2 2 3 4 5 6 7 8 9 10 11 12 - - 89 67 B6 69 - 96 74 C4 76 - 84 62 A7 66 - 29 r2.1 MB9A310 Series Module Pin name External Interrupt INT00_0 INT00_1 INT00_2 INT01_0 INT01_1 INT02_0 INT02_1 INT03_0 INT03_1 INT03_2 INT04_0 INT04_1 INT04_2 INT05_0 INT05_1 INT05_2 INT06_1 INT06_2 INT07_2 INT08_1 INT08_2 INT09_1 INT10_1 INT11_1 INT12_1 INT13_1 INT14_1 INT15_1 NMIX Function External interrupt request 00 input pin External interrupt request 01 input pin External interrupt request 02 input pin External interrupt request 03 input pin External interrupt request 04 input pin External interrupt request 05 input pin External interrupt request 06 input pin External interrupt request 07 input pin External interrupt request 08 input pin External interrupt request 09 input pin External interrupt request 10 input pin External interrupt request 11 input pin External interrupt request 12 input pin External interrupt request 13 input pin External interrupt request 14 input pin External interrupt request 15 input pin Non-Maskable Interrupt input 30 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 2 82 87 3 83 4 53 93 56 9 12 59 10 74 65 11 73 45 80 60 65 81 61 82 31 71 34 87 90 37 88 52 43 89 51 23 C1 C8 D7 C2 D9 B3 J10 D6 H9 E1 E4 G9 E2 C10 F9 E3 C11 K8 2 67 3 4 43 73 46 9 12 49 10 60 55 11 59 35 2 54 3 4 35 38 5 8 40 6 7 48 27 5 83 D1 5 - 14 8 92 86 F2 D5 8 - 15 93 F3 - - 16 94 G1 - - 17 95 G2 - - 27 5 J4 - - 28 6 L5 - - 39 17 K6 29 - 96 74 C4 76 60 92 70 B5 72 57 DS706-00012-0v02-E r2.1 MB9A310 Series Module Pin name GPIO P00 P01 P02 P03 P04 P05 P06 P07 P08 P09 P0A P0B P0C P0D P0E P0F P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P1A P1B P1C P1D P1E P1F P20 P21 P22 P23 Function General-purpose I/O port 0 General-purpose I/O port 1 General-purpose I/O port 2 DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 52 53 54 55 56 57 58 59 63 64 65 66 67 68 69 70 74 73 72 71 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 30 31 32 33 34 35 36 37 41 42 43 44 45 46 47 48 52 51 50 49 A9 B9 B11 A8 B8 C8 D9 A7 B7 C7 D7 A6 B6 C6 A5 B5 J11 J10 J8 H10 H9 H7 G10 G9 G8 F10 F9 E11 E10 F8 E9 D11 C10 C11 E8 D10 61 62 63 64 65 66 67 68 69 70 71 72 42 43 44 45 46 47 48 49 53 54 55 56 60 59 58 57 49 50 51 52 53 54 55 56 57 34 35 36 37 38 39 40 44 45 48 47 46 31 r2.1 MB9A310 Series Module Pin name GPIO P30 P31 P32 P33 P34 P35 P36 P37 P38 P39 P3A P3B P3C P3D P3E P3F P40 P41 P42 P43 P44 P45 P46 P47 P48 P49 P4A P4B P4C P4D P4E P50 P51 P52 P53 P54 P55 P56 P60 P61 P62 P63 P80 P81 PE0 PE2 PE3 Function General-purpose I/O port 3 General-purpose I/O port 4 General-purpose I/O port 5 General-purpose I/O port 6 General-purpose I/O port 8 General-purpose I/O port E 32 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 27 28 29 30 31 32 36 37 39 40 41 42 43 44 45 2 3 4 5 6 7 8 96 95 94 93 98 99 46 48 49 87 88 89 90 91 92 93 94 95 96 97 98 99 100 1 2 5 6 7 8 9 10 14 15 17 18 19 20 21 22 23 80 81 82 83 84 85 86 74 73 72 71 76 77 24 26 27 E1 E2 E3 E4 F1 F2 F3 G1 G2 F4 G3 H1 H2 G4 H3 J2 J4 L5 K5 J5 H5 L6 L3 K3 K6 J6 L7 K7 H6 J7 K8 C1 C2 B3 D1 D2 D3 D5 C4 B4 C5 D6 A3 A2 K9 L9 L10 9 10 11 12 13 14 15 16 17 18 19 21 22 26 27 29 30 31 32 33 34 35 2 3 4 5 6 7 8 76 75 74 73 78 79 36 38 39 5 6 7 8 9 10 11 12 13 14 15 19 20 22 23 24 25 26 27 2 3 4 60 59 58 62 63 28 30 31 DS706-00012-0v02-E r2.1 MB9A310 Series Module Pin name Function Multi Function Serial 0 SIN0_0 SIN0_1 SOT0_0 (SDA0_0) Multifunction serial interface ch.0 input pin Multifunction serial interface ch.0 output pin. This pin operates as SOT0 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA0 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.0 clock I/O pin. This pin operates as SCK0 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL0 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.1 input pin Multifunction serial interface ch.1 output pin. This pin operates as SOT1 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA1 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.1 clock I/O pin. This pin operates as SCK1 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL1 when it is used in an I2C (operation mode 4). SOT0_1 (SDA0_1) SCK0_0 (SCL0_0) SCK0_1 (SCL0_1) Multi Function Serial 1 SIN1_1 SOT1_1 (SDA1_1) SCK1_1 (SCL1_1) DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 73 56 51 34 C11 H9 59 46 48 - 72 50 E8 58 47 57 35 H7 47 - 71 49 D10 57 46 58 36 G10 48 - 53 31 J10 43 35 54 32 J8 44 36 55 33 H10 45 37 33 r2.1 MB9A310 Series Module Multi Function Serial 2 Pin name SIN2_2 SOT2_2 (SDA2_2) SCK2_2 (SCL2_2) Multi Function Serial 3 SIN3_1 SIN3_2 SOT3_1 (SDA3_1) SOT3_2 (SDA3_2) SCK3_1 (SCL3_1) SCK3_2 (SCL3_2) Function Multifunction serial interface ch.2 input pin Multifunction serial interface ch.2 output pin. This pin operates as SOT2 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA2 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.2 clock I/O pin. This pin operates as SCK2 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL2 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.3 input pin Multifunction serial interface ch.3 output pin. This pin operates as SOT3 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA3 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.3 clock I/O pin. This pin operates as SCK3 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL3 when it is used in an I2C (operation mode 4). 34 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 59 37 G9 49 40 63 41 G8 53 44 64 42 F10 54 45 2 39 80 17 C1 K6 2 29 2 - 3 81 C2 3 3 40 18 J6 30 - 4 82 B3 4 4 41 19 L7 31 - DS706-00012-0v02-E r2.1 MB9A310 Series Module Pin name Multi Function Serial 4 SIN4_0 SIN4_1 SIN4_2 SOT4_0 (SDA4_0) SOT4_1 (SDA4_1) SOT4_2 (SDA4_2) SCK4_0 (SCL4_0) SCK4_1 (SCL4_1) SCK4_2 (SCL4_2) RTS4_0 RTS4_1 RTS4_2 CTS4_0 CTS4_1 CTS4_2 SIN5_0 SIN5_2 SOT5_0 (SDA5_0) Multi Function Serial 5 SOT5_2 (SDA5_2) SCK5_0 (SCL5_0) SCK5_2 (SCL5_2) Function Multifunction serial interface ch.4 input pin Multifunction serial interface ch.4 output pin. This pin operates as SOT4 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA4 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.4 clock I/O pin. This pin operates as SCK4 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL4 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.4 RTS output pin Multifunction serial interface ch.4 CTS input pin Multifunction serial interface ch.5 input pin Multifunction serial interface ch.5 output pin. This pin operates as SOT5 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA5 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.5 clock I/O pin. This pin operates as SCK5 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL5 when it is used in an I2C (operation mode 4). DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 87 65 82 65 43 60 D7 F9 C8 67 55 - 54 - 88 66 A6 68 55 66 44 E11 56 - 83 61 D9 - - 89 67 B6 69 56 67 45 E10 - - 84 62 A7 - - 90 69 86 91 68 85 96 15 68 47 64 69 46 63 74 93 C6 E9 C7 A5 F8 B7 C4 F3 70 71 76 - 60 - 95 73 B4 75 59 16 94 G1 - - 94 72 C5 74 58 17 95 G2 - - 35 r2.1 MB9A310 Series Module Pin name Function Multi Function Serial 6 SIN6_0 SIN6_1 SOT6_0 (SDA6_0) Multifunction serial interface ch.6 input pin Multifunction serial interface ch.6 output pin. This pin operates as SOT6 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA6 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.6 clock I/O pin. This pin operates as SCK6 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL6 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.7 input pin Multifunction serial interface ch.7 output pin. This pin operates as SOT7 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA7 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.7 clock I/O pin. This pin operates as SCK7 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL7 when it is used in an I2C (operation mode 4). SOT6_1 (SDA6_1) SCK6_0 (SCL6_0) SCK6_1 (SCL6_1) Multi Function Serial 7 SIN7_1 SOT7_1 (SDA7_1) SCK7_1 (SCL7_1) 36 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 5 12 83 90 D1 E4 5 12 8 6 84 D2 6 - 11 89 E3 11 7 7 85 D3 7 - 10 88 E2 10 6 45 23 K8 35 27 44 22 J7 34 26 43 21 H6 33 25 DS706-00012-0v02-E r2.1 MB9A310 Series Module Pin name Function Multi Function Timer 0 DTTI0X_0 Input signal controlling wave form generator outputs RTO00 to RTO05 of multi-function timer 0 DTTI0X_1 FRCK0_0 FRCK0_1 FRCK0_2 IC00_0 IC00_1 IC00_2 IC01_0 IC01_1 IC01_2 IC02_0 IC02_1 IC02_2 IC03_0 IC03_1 IC03_2 RTO00_0 (PPG00_0) RTO00_1 (PPG00_1) RTO01_0 (PPG00_0) RTO02_0 (PPG02_0) RTO03_0 (PPG02_0) RTO04_0 (PPG04_0) RTO05_0 (PPG04_0) 16-bit free-run timer ch.0 external clock input pin 16-bit input capture ch.0 input pin of multi-function timer 0. ICxx describes channel number. Wave form generator output of multi-function timer 0. This pin operates as PPG00 when it is used in PPG 0 output modes. Wave form generator output of multi-function timer 0. This pin operates as PPG00 when it is used in PPG 0 output modes. Wave form generator output of multi-function timer 0. This pin operates as PPG02 when it is used in PPG 0 output modes. Wave form generator output of multi-function timer 0. This pin operates as PPG02 when it is used in PPG 0 output modes. Wave form generator output of multi-function timer 0. This pin operates as PPG04 when it is used in PPG 0 output modes. Wave form generator output of multi-function timer 0. This pin operates as PPG04 when it is used in PPG 0 output modes. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 18 96 F4 13 9 69 47 E9 - - 13 70 53 17 65 54 16 66 55 15 67 56 14 68 57 91 48 31 95 43 32 94 44 33 93 45 34 92 46 35 F1 D11 J10 G2 F9 J8 G1 E11 H10 F3 E10 H9 F2 F8 H7 43 55 44 56 45 46 47 35 36 37 38 39 19 97 G3 14 10 71 49 D10 - - 20 98 H1 15 11 21 99 H2 16 12 22 100 G4 17 13 23 1 H3 18 14 24 2 J2 19 15 37 r2.1 MB9A310 Series Module Pin name Function Multi Function Timer 1 DTTI1X_0 Input signal controlling wave form generator outputs RTO10 to RTO15 of multi-function timer 1 16-bit free-run timer ch.1 external clock input pin DTTI1X_1 FRCK1_0 FRCK1_1 IC10_0 IC10_1 IC11_0 IC11_1 IC12_0 IC12_1 IC13_0 IC13_1 RTO10_0 (PPG10_0) RTO10_1 (PPG10_1) RTO11_0 (PPG10_0) RTO11_1 (PPG10_1) RTO12_0 (PPG12_0) RTO12_1 (PPG12_1) RTO13_0 (PPG12_0) RTO13_1 (PPG12_1) RTO14_0 (PPG14_0) RTO14_1 (PPG14_1) RTO15_0 (PPG14_0) RTO15_1 (PPG14_1) 16-bit input capture ch.0 input pin of multi-function timer 1. ICxx describes channel number. Wave form generator output of multi-function timer 1. This pin operates as PPG10 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG10 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG12 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG12 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG14 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG14 when it is used in PPG 1 output modes. 38 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 8 86 D5 8 - 39 17 K6 29 - 87 44 88 40 89 41 90 42 91 43 65 22 66 18 67 19 68 20 69 21 D7 J7 A6 J6 B6 L7 C6 K7 A5 H6 67 34 68 30 69 31 70 32 71 33 - 2 80 C1 2 - 27 5 J4 - - 3 81 C2 3 - 28 6 L5 - - 4 82 B3 4 - 29 7 K5 - - 5 83 D1 5 - 30 8 J5 - - 6 84 D2 6 - 31 9 H5 21 - 7 85 D3 7 - 32 10 L6 22 - DS706-00012-0v02-E r2.1 MB9A310 Series Module Pin name Quadrature Position/ Revolution Counter 0 AIN0_0 AIN0_1 AIN0_2 BIN0_0 BIN0_1 BIN0_2 ZIN0_0 ZIN0_1 ZIN0_2 AIN1_1 AIN1_2 BIN1_1 BIN1_2 ZIN1_1 ZIN1_2 UDM0 UDP0 UHCONX Quadrature Position/ Revolution Counter 1 USB Function QPRC ch.0 AIN input pin QPRC ch.0 BIN input pin QPRC ch.0 ZIN input pin QPRC ch.1 AIN input pin QPRC ch.1 BIN input pin QPRC ch.1 ZIN input pin USB Function / HOST D – pin USB Function / HOST D + pin USB external pull-up control pin DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 9 40 2 10 41 3 11 42 4 74 43 73 44 72 45 98 99 95 87 18 80 88 19 81 89 20 82 52 21 51 22 50 23 76 77 73 E1 J6 C1 E2 L7 C2 E3 K7 B3 C10 H6 C11 J7 E8 K8 A3 A2 B4 9 30 2 10 31 3 11 32 4 60 33 59 34 58 35 78 79 75 5 22 2 6 23 3 7 24 4 25 26 27 62 63 59 39 r2.1 MB9A310 Series Module RESET Pin name INITX Mode MD0 MD1 POWER GND CLOCK ADC POWER ADC GND C pin VCC VCC VCC VCC VCC USBVCC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS X0 X0A X1 X1A CROUT_0 CROUT_1 AVCC AVRH AVSS C Function External Reset Input. A reset is valid when INITX=L Mode 0 pin. During normal operation, MD0=L must be input. During serial programming to flash memory, MD0=H must be input. Mode 1 pin. During serial programming to flash memory, MD1=L must be input. Power Pin Power Pin Power pin Power pin Power pin 3.3V Power supply port for USB I/O GND Pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin GND pin Main clock (oscillation) input pin Sub clock (oscillation) input pin Main clock (oscillation) I/O pin Sub clock (oscillation) I/O pin Pin No LQFP- QFP- BGA- LQFP- LQFP100 100 112 80 64 38 16 K4 28 21 47 25 L8 37 29 46 24 K9 36 28 1 26 35 51 76 97 25 34 50 75 100 48 36 49 37 74 92 60 79 4 13 29 54 75 3 12 28 53 78 26 14 27 15 52 70 38 B1 J1 K1 K11 A10 A4 B2 L1 K2 J3 H4 L4 L11 K10 J9 H8 B10 C9 A11 D8 D4 C3 A1 L9 L3 L10 K3 C10 B5 H11 1 25 41 77 20 24 40 80 38 26 39 27 60 72 50 1 18 33 61 16 32 64 30 19 31 20 57 41 61 39 F11 51 42 A/D converter GND pin 62 40 G11 52 43 Power stabilization capacity pin 33 11 L2 23 17 Internal CR-osc clock output port A/D converter analog power pin A/D converter analog reference voltage input pin The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. 40 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series I/O CIRCUIT TYPE Type Circuit Remarks A x It is possible to select the main oscillation / GPIO function P-ch X1 P-ch Digital output N-ch Digital output R Pull-up resistor control Digital input Standby mode control When the main oscillation is selected. x Oscillation feedback resistor : Approximately 1MΩ x With Standby mode control When the GPIO is selected. x CMOS level output. x CMOS level hysteresis input x With pull-up resistor control x With standby mode control x Pull-up resistor : Approximately 50kΩ x IOH = -4mA, IOL = 4mA Clock input Standby mode control Digital input Standby mode control R X0 P-ch P-ch Digital output N-ch Digital output Pull-up resistor control B x CMOS level hysteresis input x Pull-up resistor : Approximately 50kΩ Pull-up resistor CMOS level hysteresis input DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 41 r2.1 MB9A310 Series Type Circuit Remarks C Digital Input x Open drain output x CMOS level hysteresis input Control Pin x It is possible to select the sub oscillation / GPIO function D P-ch X1A P-ch Digital output N-ch Digital output R Pull-up resistor control Digital input Standby mode control When the sub oscillation is selected. x Oscillation feedback resistor : Approximately 5MΩ x With Standby mode control When the GPIO is selected. x CMOS level output. x CMOS level hysteresis input x With pull-up resistor control x With standby mode control x Pull-up resistor : Approximately 50kΩ x IOH = -4mA, IOL = 4mA Clock input Standby mode control Digital input Standby mode control R X0A P-ch P-ch Digital output N-ch Digital output Pull-up resistor control 42 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series Type Circuit Remarks E CMOS level output CMOS level hysteresis input With pull-up resistor control With standby mode control Pull-up resistor : Approximately 50kΩ x IOH = -4mA, IOL = 4mA x x x x x P-ch P-ch N-ch Digital output Digital output Pull-up resistor control Digital input Standby mode control F P-ch P-ch Digital output N-ch Digital output CMOS level output CMOS level hysteresis input With input control Analog input With pull-up resistor control With standby mode control Pull-up resistor : Approximately 50kΩ x IOH = -4mA, IOL = 4mA x x x x x x x Pull-up resistor control Digital input Standby mode control Analog input Input control DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 43 r2.1 MB9A310 Series Type Circuit Remarks CMOS level output CMOS level hysteresis input With pull-up resistor control With standby mode control Pull-up resistor : Approximately 50kΩ x IOH = -12mA, IOL = 12mA G x x x x x P-ch P-ch Digital output N-ch Digital output Pull-up resistor control Digital input Standby mode control H GPIO Digital output x It is possible to select the USB IO / GPIO function. GPIO Digital input/output direction GPIO Digital input GPIO Digital input circuit control When the USB IO is selected. x Full-speed, Low-speed control UDP(+)output EBP USB full-speed, low-speed control UDP(+)input Differential EBM When the GPIO is selected. x CMOS level output x CMOS level hysteresis input x With standby mode control Differential input USB/GPIO select UDM(-)input UDM(-)output USB input/output direction GPIO Digital output GPIO Digital input/output direction GPIO Digital input GPIO Digital input circuit control 44 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series Type Circuit Remarks I x x x x x P-ch N-ch CMOS level output CMOS level hysteresis input 5V tolerant With standby mode control IOH = -4mA, IOL = 4mA Digital output Digital output Digital input Standby control x CMOS level hysteresis input J Mode Input DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 45 r2.1 MB9A310 Series HANDLING PRECAUTIONS Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your FUJITSU SEMICONDUCTOR semiconductor devices. 1. Precautions for Product Design This section describes precautions when designing electronic equipment using semiconductor devices. x Absolute Maximum Ratings Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of certain established limits, called absolute maximum ratings. Do not exceed these ratings. x Recommended Operating Conditions Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their sales representative beforehand. x Processing and Protection of Pins These precautions must be followed when handling the pins which connect semiconductor devices to power supply and input/output functions. (1) Preventing Over-Voltage and Over-Current Conditions Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such overvoltage or over-current conditions at the design stage. (2) Protection of Output Pins Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause large current flows. Such conditions if present for extended periods of time can damage the device. Therefore, avoid this type of connection. (3) Handling of Unused Input Pins Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such pins should be connected through an appropriate resistance to a power supply pin or ground pin. x Latch-up Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may be formed, causing large current levels in excess of several hundred mA to flow continuously at the power supply pin. This condition is called latch-up. CAUTION: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the following: (1) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should include attention to abnormal noise, surge levels, etc. (2) Be sure that abnormal current flows do not occur during the power-on sequence. Code: DS00-00004-1Ea 46 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series x Observance of Safety Regulations and Standards Most countries in the world have established standards and regulations regarding safety, protection from electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards in the design of products. x Fail-Safe Design Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. x Precautions Related to Usage of Devices FUJITSU SEMICONDUCTOR semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. 2. Precautions for Package Mounting Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance during soldering, you should only mount under FUJITSU SEMICONDUCTOR's recommended conditions. For detailed information about mount conditions, contact your sales representative. x Lead Insertion Type Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct soldering on the board, or mounting by using a socket. Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for storage temperature. Mounting processes should conform to FUJITSU SEMICONDUCTOR recommended mounting conditions. If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment of socket contacts and IC leads be verified before mounting. x Surface Mount Type Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges. You must use appropriate mounting techniques. FUJITSU SEMICONDUCTOR recommends the solder reflow method, and has established a ranking of mounting conditions for each product. Users are advised to mount packages in accordance with FUJITSU SEMICONDUCTOR ranking of recommended conditions. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 47 r1.0 MB9A310 Series x Lead-Free Packaging CAUTION: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering, junction strength may be reduced under some conditions of use. x Storage of Semiconductor Devices Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent, do the following: (1) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product. Store products in locations where temperature changes are slight. (2) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at temperatures between 5°C and 30°C. When you open Dry Package that recommends humidity 40% to 70% relative humidity. (3) When necessary, FUJITSU SEMICONDUCTOR packages semiconductor devices in highly moisture-resistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum laminate bags for storage. (4) Avoid storing packages where they are exposed to corrosive gases or high levels of dust. x Baking Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU SEMICONDUCTOR recommended conditions for baking. Condition: 125°C/24 h x Static Electricity Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions: (1) Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion generation may be needed to remove electricity. (2) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment. (3) Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance (on the level of 1 MΩ). Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize shock loads is recommended. (4) Ground all fixtures and instruments, or protect with anti-static measures. (5) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies. 48 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series 3. Precautions for Use Environment Reliability of semiconductor devices depends on ambient temperature and other conditions as described above. For reliable performance, do the following: (1) Humidity Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high humidity levels are anticipated, consider anti-humidity processing. (2) Discharge of Static Electricity When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. In such cases, use anti-static measures or processing to prevent discharges. (3) Corrosive Gases, Dust, or Oil Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect the devices. (4) Radiation, Including Cosmic Radiation Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users should provide shielding as appropriate. (5) Smoke, Flame CAUTION: Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases. Customers considering the use of FUJITSU SEMICONDUCTOR products in other special environmental conditions should consult with sales representatives. Please check the latest handling precautions at the following URL. http://edevice.fujitsu.com/fj/handling-e.pdf DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 49 r1.0 MB9A310 Series HANDLING DEVICES z Power supply pins In products with multiple VCC and VSS pins, respective pins at the same potential are interconnected within the device in order to prevent malfunctions such as latch-up. However, all of these pins should be connected externally to the power supply or ground lines in order to reduce electromagnetic emission levels, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating. Moreover, connect the current supply source with the VCC and VSS pins of this device at low impedance. It is also advisable that a ceramic capacitor of approximately 0.1 µF be connected as a bypass capacitor between VCC and VSS near this device. z Crystal oscillator circuit Noise near the X0/X1 and X0A/X1A pins may cause the device to malfunction. Design the printed circuit board so that X0/X1, X0A/X1A pins, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible. It is strongly recommended that the PC board artwork be designed such that the X0/X1 and X0A/X1A pins are surrounded by ground plane as this is expected to produce stable operation. z Using an external clock When using an external clock, the clock signal should be input to the X0,X0A pin only and the X1,X1A pin should be kept open. x Example of Using an External Clock Device X0(X0A) Open X1(X1A) z Handling when using Multi function serial pin as I2C pin If it is using multi function serial pin as I2C pins, P-ch transistor of digital output is always disable. However, I2C pins need to keep the electrical characteristic like other pins and not to connect to external I2C bus system with power OFF. 50 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series z C Pin As this series includes an internal regulator, always connect a bypass capacitor of approximately 4.7 µF to the C pin for use by the regulator. C Device 4.7μF VSS GND z Mode pins (MD0) Connect the MD pin (MD0) directly to VCC or VSS pins. Design the printed circuit board such that the pull-up/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins is as short as possible and the connection impedance is low, when the pins are pulled-up/down such as for switching the pin level and rewriting the Flash memory data. It is because of preventing the device erroneously switching to test mode due to noise. z Notes on power-on Turn power on/off in the following order or at the same time. If not using the A/D converter, connect AVCC = VCC and AVSS = VSS. Turning on : VCC → USBVCC VCC → AVCC → AVRH Turning off : USBVCC → VCC AVRH → AVCC → VCC z Serial Communication There is a possibility to receive wrong data due to the noise or other causes on the serial communication. Therefore, design a printed circuit board so as to avoid noise. Consider the case of receiving wrong data due to noise, perform error detection such as by applying a checksum of data at the end. If an error is detected, retransmit the data. z Differences in features among the products with different memory sizes and between FLASH products and MASK products The electric characteristics including power consumption, ESD, latch-up, noise characteristics, and oscillation characteristics among the products with different memory sizes and between FLASH products and MASK products are different because chip layout and memory structures are different. If you are switching to use a different product of the same series, please make sure to evaluate the electric characteristics. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 51 r1.0 MB9A310 Series BLOCK DIAGRAM MB9AF311L/M/N, F312L/M/N, F314L/M/N, F315M/N, F316M/N ETM (1) SWJ-DP TPIU SRAM0 8/16Kbyte ROM Table (1) Cortex-M3 Core I Multi-layer AHB (Max.40MHz) TRSTX,TCK TDI,TMS TDO TRACED[3:0], TRACECLK @40MHz(Max.) D NVIC Sys AHB-APB Bridge: APB0(Max.40MHz) Dual -Timer WatchDog Timer (Software) Clock Reset Generator INITX WatchDog Timer (Hardware) Flash I/ F Security SRAM1 8/16Kbyte USB2.0 (Host / Func) X1A UDP0/UDM0 UHCONX AHB-AHB Bridge X0A Main Osc Sub . Osc USBVCC RST CLK X1 PHY DMAC 8ch CSV X0 On-Chip Flash 64/ 128/ 256/ 384/ 512 Kbyte PLL CR 4MHz CR 100KHz MAD[24:0] AVCC, AVSS,AVRH 12bit A/D Converter External Bus IF (2) MADATA[15:0] MCSX[7:0], MOEX,MWEX, MALE MRDY MCLKOUT MDQM[1:0] Unit 0 AN[15:0] Unit 1 TIOB[7:0] AIN[1:0] BIN[1:0] Regulator Ctrl (2) Base Timer 16-bit 8ch / 32-bit 4ch QPRC 2ch ZIN[1:0] A/D Activation Compare 3ch IC0[3:0] IC1[3:0] FRCK[1:0] DTTI[1:0]X RTO0[5:0] RTO1[5:0] 16-bit Input Capture 4ch 16-bit Free-Run Timer 3ch 16-bit Output Compare 6ch Waveform Generator 3ch Power On Reset AHB-APB Bridge : APB2 ( Max.40MHz) TIOA[7:0] Unit 2 AHB-APB Bridge : APB1 (Max.40MHz) ADTG[8:0] 16-bit PPG 3ch Multi Function Timer × 2 IRQ-Monitor Regulator + LVD VCC,VSS C Regulator + LVD CRC Accelerator Watch Counter External Interrupt Controller 16-pin+NMI INT[15:0] NMIX MODE-Ctrl GPIO Multi Serial IF 8ch (with FIFO ch.4~7) & HW flow control (ch .4) (2) MD[1:0] PIN-Function-Ctrl P0[F:0], P1[F:0], · · Px[x:0], SCK[7:0] SIN[7:0] SOT[7:0] CTS4 RTS4 1. For the MB9AF311L/M, F312L/M, MB9AF314L/M, MB9AF315M and MB9AF316M, ETM is not available. 2. For the MB9AF311L, F312L and MB9AF314L, External Bus Interface and 12-bit A/D Converter (unit 2) are not available. And Multi-function Serial Interface does not support hardware flow control in these products. 52 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.0 MB9A310 Series Product device MB9AF311L/M/N MB9AF312L/M/N MB9AF314L/M/N On-Chip Flash SRAM0 SRAM1 Product device On-Chip Flash SRAM0 SRAM1 64Kbyte 8Kbyte 8Kbyte 128Kbyte 8Kbyte 8Kbyte MB9AF315M/N MB9AF316M/N 384Kbyte 16Kbyte 16Kbyte 512Kbyte 16Kbyte 16Kbyte DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 256Kbyte 16Kbyte 16Kbyte 53 r2.0 MB9A310 Series MEMORY MAP z MB9A310 Series Memory Map(1) Peripherals Area 0x41FF_FFFF Reserved 0xFFFF_FFFF 0xE010_0000 0xE000_0000 Reserved 0x4006_4000 Cortex-M3 Private Peripherals 0x4006_3000 0x4006_2000 0x4006_1000 0x4006_0000 Reserved Reserved Reserved DMAC Reserved 0x4005_0000 USB ch.0 External Device Area 0x4004_0000 0x4003_F000 EXT-bus I/F Reserved 0x4003_B000 0x6000_0000 Reserved 0x4400_0000 32Mbyte Bit band alias 0x4200_0000 Peripherals 0x4000_0000 Reserved 0x2400_0000 0x2200_0000 32Mbyte Bit band alias 0x2000_0000 0x1FF8_0000 Please refer to the next page for the memory size details. SRAM1 SRAM0 Reserved 0x0010_2000 0x0010_0000 0x4003_2000 0x4003_1000 0x4003_0000 0x4002_F000 0x4002_E000 Watch Counter CRC MFS Reserved USB CLK LVD Reserved GPIO Reserved Int-Req. Read EXTI Reserved CR Trim Reserved 0x4002_8000 Reserved 0x2008_0000 0x4003_A000 0x4003_9000 0x4003_8000 0x4003_7000 0x4003_6000 0x4003_5000 0x4003_4000 0x4003_3000 0x4002_7000 0x4002_6000 0x4002_5000 0x4002_4000 A/DC QPRC Base Timer PPG Reserved 0x4002_2000 0x4002_1000 Security/CR Trim 0x4002_0000 FLASH 0x4001_6000 0x4001_5000 MFT unit1 MFT unit0 Reserved Dual Timer Reserved 0x0000_0000 0x4001_3000 0x4001_2000 0x4001_1000 0x4001_0000 SW WDT HW WDT Clock/Reset Reserved 0x4000_1000 0x4000_0000 54 FUJITSU SEMICONDUCTOR CONFIDENTIAL FLASH I/F DS706-00012-0v02-E r2.0 MB9A310 Series z MB9A310 Series Memory Map(2) 0x2008_0000 0x2008_0000 Reserved 0x2000_4000 Reserved 0x2000_4000 SRAM1 16Kbyte 0x2000_0000 0x2000_4000 0x2000_0000 0x1FFF_C000 SRAM1 16Kbyte 0x2000_0000 SRAM0 16Kbyte 0x1FFF_C000 Reserved CR trimming Security Reserved SRAM1 16Kbyte SRAM0 16Kbyte 0x0010_2000 0x0010_1000 0x0010_0000 0x2008_0000 SRAM0 16Kbyte 0x1FFF_C000 Reserved 0x0010_2000 0x0010_1000 0x0010_0000 CR trimming Security Reserved 0x0010_2000 0x0010_1000 0x0010_0000 CR trimming Security Reserved Reserved 0x0008_0000 Reserved 0x0006_0000 FLASH 512Kbyte 0x0004_0000 FLASH 384Kbyte FLASH 256Kbyte 0x0000_0000 0x0000_0000 0x0000_0000 MB9AF316 /M/N DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL MB9AF315 M/N MB9AF314 L/M/N 55 r2.0 MB9A310 Series z MB9A310 Series Memory Map(3) 0x2008_0000 0x2008_0000 Reserved 0x2000_2000 0x2000_0000 0x1FFF_E000 SRAM1 8Kbyte SRAM0 8Kbyte Reserved 0x2000_2000 0x2000_0000 0x1FFF_E000 Reserved 0x0010_2000 0x0010_1000 0x0010_0000 CR trimming Security SRAM1 8Kbyte SRAM0 8Kbyte Reserved 0x0010_2000 0x0010_1000 0x0010_0000 CR trimming Security Reserved Reserved 0x0002_0000 FLASH 256Kbyte 0x0001_0000 FLASH 64Kbyte 0x0000_0000 MB9AF312L/M/N 56 FUJITSU SEMICONDUCTOR CONFIDENTIAL 0x0000_0000 MB9AF311L/M/N DS706-00012-0v02-E r2.0 MB9A310 Series z Peripheral Address Map Start address End address Bus 0x4000_0000H 0x4000_0FFFH 0x4000_1000H 0x4000_FFFFH 0x4001_0000H 0x4001_0FFFH Clock/Reset Control 0x4001_1000H 0x4001_1FFFH Hardware Watchdog timer 0x4001_2000H 0x4001_2FFFH 0x4001_3000H 0x4001_4FFFH 0x4001_5000H 0x4001_5FFFH Dual-Timer 0x4001_6000H 0x4001_FFFFH Reserved 0x4002_0000H 0x4002_0FFFH Multi-function timer unit0 0x4002_1000H 0x4002_1FFFH Multi-function timer unit1 0x4002_2000H 0x4002_3FFFH Reserved 0x4002_4000H 0x4002_4FFFH PPG 0x4002_5000H 0x4002_5FFFH 0x4002_6000H 0x4002_6FFFH 0x4002_7000H 0x4002_7FFFH A/D Converter 0x4002_8000H 0x4002_DFFFH Reserved 0x4002_E000H 0x4002_EFFFH Internal CR trimming 0x4002_F000H 0x4002_FFFFH Reserved 0x4003_0000H 0x4003_0FFFH External Interrupt Controller 0x4003_1000H 0x4003_1FFFH Interrupt Request Batch-Read Function 0x4003_2000H 0x4003_2FFFH Reserved 0x4003_3000H 0x4003_3FFFH GPIO 0x4003_4000H 0x4003_4FFFH Reserved 0x4003_5000H 0x4003_5FFFH Low Voltage Detector 0x4003_6000H 0x4003_6FFFH 0x4003_7000H 0x4003_7FFFH Reserved 0x4003_8000H 0x4003_8FFFH Multi-function serial Interface 0x4003_9000H 0x4003_9FFFH CRC 0x4003_A000H 0x4003_AFFFH Watch Counter 0x4003_B000H 0x4003_EFFFH Reserved 0x4003_F000H 0x4003_FFFFH External Memory interface 0x4004_0000H 0x4004_FFFFH USB ch.0 0x4005_0000H 0x4005_FFFFH Reserved 0x4006_0000H 0x4006_0FFFH AHB APB0 APB1 APB2 Peripherals Flash I/F register Reserved Software Watchdog timer Reserved Base Timer Quadrature Position/Revolution Counter USB clock generator DMAC register AHB 0x4006_1000H 0x4006_1FFFH 0x4006_2000H 0x4006_2FFFH Reserved 0x4006_3000H 0x4006_3FFFH Reserved 0x4006_4000H 0x41FF_FFFFH Reserved DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Reserved 57 r2.0 MB9A310 Series PIN STATUS IN EACH CPU STATE The terms used for pin status have the following meanings. x INITX = 0 This is the period when the INITX pin is the "L" level. x INITX = 1 This is the period when the INITX pin is the "H" level. x SPL = 0 This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is set to "0". x SPL = 1 This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is set to "1". x Input enabled Indicates that the input function can be used. x Internal input fixed at "0" This is the status that the input function cannot be used. Internal input is fixed at "L". x Hi-Z Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z state. x Setting disabled Indicates that the setting is disabled. x Maintain previous state Maintains the state that was immediately prior to entering the current mode. If a built-in peripheral function is operating, the output follows the peripheral function. If the pin is being used as a port, that output is maintained. x Analog input is enabled Indicates that the analog input is enabled. x Trace output Indicates that the trace function can be used. 58 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.0 MB9A310 Series z LIST OF PIN STATUS Pin status type A B Power-on reset Device Run mode or INITX input Timer mode or sleep mode or low voltage internal reset sleep mode state state detection state state state Function group Power supply Power supply Power supply stable Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Output Maintain GPIO selected Setting Setting Setting Maintain Hi-Z/ previous disabled disabled disabled previous Internal state state input fixed at "0" Input enabled Input Input Input Input Input Main crystal enabled enabled enabled enabled enabled oscillator input pin Output Maintain GPIO selected Setting Setting Setting Maintain Hi-Z/ previous disabled disabled disabled previous Internal state state input fixed at "0" Main crystal oscillator output pin Hi-Z/ Internal input fixed at "0"/ or Input enable Hi-Z/ Internal input fixed at "0" Hi-Z/ Internal input fixed at "0" Maintain previous state C INITX input pin Pull-up/ Input enabled D Mode input pin Input enabled E JTAG selected Hi-Z Setting disabled Pull-up/ Input enabled Input enabled Pull-up/ Input enabled Setting disabled Pull-up/ Input enabled Input enabled Maintain previous state GPIO selected Pull-up/ Input enabled Input enabled Pull-up/ Input enabled Setting disabled Maintain previous state/ Hi-Z at oscillation stop*1/ Internal input fixed at "0" Pull-up/ Input enabled Input enabled Maintain previous state Trace selected External interrupt enabled selected Setting disabled Setting disabled Setting disabled Maintain previous state Maintain previous state GPIO selected, or other than above resource selected Hi-Z Hi-Z/ Input enabled Hi-Z/ Input enabled F DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Maintain previous state/ Hi-Z at oscillation stop*1/ Internal input fixed at "0" Pull-up/ Input enabled Input enabled Maintain previous state Output Hi-Z/ Internal input fixed at "0" Trace output Maintain previous state Hi-Z/ Internal input fixed at "0" 59 r2.0 MB9A310 Series Pin status type G H I J Power-on reset Device Run mode or INITX input Timer mode or sleep mode or low voltage internal reset sleep mode state state detection state state state Function group Power supply Power supply Power supply stable Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Maintain Maintain Trace selected Setting Setting Setting Trace output previous previous disabled disabled disabled state state Hi-Z/ Hi-Z/ Hi-Z Hi-Z/ GPIO selected, Internal Input Input or other than input fixed enabled enabled above resource at "0" selected Maintain Maintain External interrupt Setting Setting Setting Maintain previous previous enabled selected disabled disabled disabled previous state state state Hi-Z/ Hi-Z/ Hi-Z Hi-Z/ GPIO selected, Internal Input Input or other than input fixed enabled enabled above resource at "0" selected Output Maintain Maintain Hi-Z/ GPIO selected, Hi-Z Hi-Z/ Hi-Z/ previous previous Input resource selected Input Internal state state enabled enabled input fixed at "0" Maintain Maintain NMIX selected Setting Setting Setting Maintain previous previous disabled disabled disabled previous state state state Hi-Z/ Hi-Z/ Hi-Z Hi-Z/ GPIO selected, Internal Input Input or other than input fixed enabled enabled above resource at "0" selected 60 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.0 MB9A310 Series Pin status type K L M Power-on reset Device Run mode or INITX input Timer mode or sleep mode or low voltage internal reset sleep mode state state detection state state state Function group Power supply Power supply Power supply stable Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Hi-Z/ Hi-Z/ Hi-Z/ Hi-Z/ Analog input Hi-Z Hi-Z/ Internal Internal Internal Internal selected Internal input fixed input fixed input fixed input fixed input fixed at "0"/ at "0"/ at "0"/ at "0"/ at "0"/ Analog Analog Analog Analog Analog input input input input input enabled enabled enabled enabled enabled Hi-Z/ Maintain Setting Setting Setting Maintain GPIO selected, Internal previous disabled disabled disabled previous or other than input fixed state state above resource at "0" selected Maintain Maintain External interrupt Setting Setting Setting Maintain previous previous enabled selected disabled disabled disabled previous state state state Hi-Z/ Hi-Z/ Hi-Z/ Hi-Z/ Analog input Hi-Z Hi-Z/ Internal Internal Internal Internal selected Internal input fixed input fixed input fixed input fixed input fixed at "0"/ at "0"/ at "0"/ at "0"/ at "0"/ Analog Analog Analog Analog Analog input input input input input enabled enabled enabled enabled enabled Hi-Z/ Maintain Setting Setting Setting Maintain GPIO selected, Internal previous disabled disabled disabled previous or other than input fixed state state above resource at "0" selected Output Maintain GPIO selected Setting Setting Setting Maintain Hi-Z/ previous disabled disabled disabled previous Internal state state input fixed at "0" Input Input Input Input Sub crystal Input Input enabled enabled enabled enabled oscillator input enabled enabled pin DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 61 r2.0 MB9A310 Series Pin status type N O P Power-on reset Device Run mode INITX input Timer mode or sleep mode or low voltage internal reset or sleep state state detection state state mode state Power Function group Power supply Power supply stable supply Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Maintain Output GPIO selected Setting Setting Setting Maintain previous state Hi-Z/ disabled disabled disabled previous Internal input state fixed at "0" Maintain Maintain Maintain Hi-Z/ Hi-Z/ Hi-Z/ Sub crystal previous previous previous Internal Internal Internal input oscillator output state/ Hi-Z at state/ Hi-Z at state input fixed input fixed fixed at "0"/ pin oscillation oscillation at "0" at "0" or Input stop*2/ stop*2/ enable Internal input Internal input fixed at "0" fixed at "0" Maintain Output Maintain Hi-Z/ GPIO selected Hi-Z Hi-Z/ previous state Hi-Z/ Internal previous Input Input input fixed at state enabled enabled "0" Output Output USB I/O pin Setting Setting Setting Maintain Hi-Z at Hi-Z at disabled disabled disabled previous transmission/ transmission/ state Input Input enabled/ enabled/ Internal input Internal input fixed at "0" at fixed at "0" at reception reception Mode input pin Input enabled Input Input Input Input enabled Input enabled enabled enabled enabled GPIO selected Setting disabled Setting disabled Setting disabled Maintain previous state Maintain previous state Output Hi-Z/Input enabled *1 : Oscillation is stopped at sub timer mode, low speed CR timer mode, and stop mode. *2 : Oscillation is stopped at stop mode. 62 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.0 MB9A310 Series ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings (Vss = AVss = 0.0V) Parameter Power supply voltage*1 Power supply voltage (for USB)*2 Analog power supply voltage*3 Analog reference voltage*3 Symbol Vcc USBVcc AVcc AVRH Rating Min Max Vss - 0.5 Vss - 0.5 Vss - 0.5 Vss - 0.5 Vss + 6.5 Vss + 6.5 Vss + 6.5 Vss + 6.5 Vcc + 0.5 (≤ 6.5V) USBVcc + 0.5 (≤ 6.5V) Vss + 6.5 AVcc + 0.5 (≤ 6.5V) Vcc + 0.5 (≤ 6.5V) 10 20 4 12 100 50 - 10 - 20 -4 - 12 - 100 - 50 300 + 150 Vss - 0.5 Input voltage VI Vss - 0.5 Vss - 0.5 Analog pin input voltage VIA Vss - 0.5 Output voltage VO Vss - 0.5 "L" level maximum output current*4 IOL - IOLAV - ∑IOL ∑IOLAV - IOH - IOHAV - "L" level average output current*5 "L" level total maximum output current "L" level total average output current*6 "H" level maximum output current*4 "H" level average output current*5 Unit Remarks V V V V V Except for USB pin V USB pin V 5V tolerant V V mA mA mA mA mA mA mA mA mA mA mA mA mW °C 4mA type 12mA type 4mA type 12mA type 4mA type 12mA type 4mA type 12mA type "H" level total maximum output current ∑IOH "H" level total average output current*6 ∑IOHAV Power consumption PD Storage temperature TSTG - 55 *1 : Vcc must not drop below Vss - 0.5V. *2 : USBVcc must not drop below Vss - 0.5V. *3 : Be careful not to exceed Vcc + 0.5 V, for example, when the power is turned on. *4 : The maximum output current is the peak value for a single pin. *5 : The average output is the average current for a single pin over a period of 100 ms. *6 : The total average output current is the average current for all pins over a period of 100 ms. <WARNING> Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 63 r2.1 MB9A310 Series 2. Recommended Operating Conditions (Vss = AVss = 0.0V) Parameter Power supply voltage Symbol Conditions Vcc - Value Min Max 2.7 - 2.7 AVss 5.5 3.6 (≤ Vcc) 5.5 (≤ Vcc) 5.5 AVcc - - 40 + 105 3.0 Power supply voltage for USB USBVcc 2.7 Analog power supply voltage Analog reference voltage FPT-100P-M20 FPT-100P-M23 FPT-80P-M21 FPT-80P-M37 FPT-64P-M24 FPT-64P-M38 FPT-64P-M23 FPT-64P-M39 BGA-112P-M04 Operating Temperature AVcc AVRH When mounted on - 40 + 105 four-layer PCB FPT-100P-M06 Ta When - 40 + 105 mounted on double-sided - 40 + 85 single-layer PCB *1: When P81/UDP0 and P80/UDM0 pin are used as USB (UDP0, UDM0). *2: When P81/UDP0 and P80/UDM0 pin are used as GPIO (P81, P80). Unit Remarks V *1 V *2 V V °C AVcc = Vcc °C °C Icc ≤ 35mA °C Icc > 35mA <WARNING> The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 64 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series z DC Characteristics 1. Current rating (Vcc = AVcc = 2.7V to 5.5V, USBVcc = 3.0V to 3.6V, Vss = AVss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin name Conditions Min Value Typ Max Unit Power supply current Vcc Iccs CPU : 40MHz, Peripheral : 40MHz, FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 *1 CPU : 40MHz, Peripheral : 40MHz, FLASH 3Wait FRWTR.RWT = 00 FSYNDN.SD = 011 *1 CPU/ Peripheral : 4MHz *1, *2 FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 CPU/ Peripheral : 32kHz FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 *1 CPU/ Peripheral : 100kHz FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 *1 - 32 48 mA - 21 TBD mA Normal operation (built-in high-speed CR) Vcc = 5.5V - 3.8 TBD mA Normal operation (sub oscillation) Vcc = 5.5V - 0.13 TBD mA Normal operation (built-in low-speed CR) Vcc = 5.5V - 0.17 TBD mA - 10 13 mA Peripheral : 40MHz *1 - 1 TBD mA Peripheral : 4MHz *1, *2 - 0.11 TBD mA Peripheral : 32kHz *1 - 0.11 TBD mA Peripheral : 100kHz *1 Normal operation (PLL) Vcc = 5.5V Icc Remarks SLEEP operation (PLL) Vcc = 5.5V SLEEP operation (built-in high-speed CR) Vcc = 5.5V SLEEP operation (sub oscillation) Vcc = 5.5V SLEEP operation (built in low-speed CR) Vcc = 5.5V DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 65 r2.1 MB9A310 Series Parameter Symbol Pin name Conditions Value Typ Max Unit - 40 TBD μA - - TBD mA - 60 TBD μA - - 2.6 mA - 4 TBD μA STOP mode Vcc = 5.5V ICCH Power supply current ICCT Min Vcc TIMER mode (sub oscillation) Vcc = 5.5V Low voltage detection At operation circuit (LVD) ICCLVD Vcc = 5.5V power supply current *1: When all ports are fixed. *2: When setting it to 4MHz by trimming. 66 FUJITSU SEMICONDUCTOR CONFIDENTIAL Remarks Ta = + 25°C, When LVD is off *1 Ta = + 105°C, When LVD is off *1 Ta = + 25°C, When LVD is off *1 Ta = + 105°C, When LVD is off *1 for occurrence of interrupt DS706-00012-0v02-E r2.1 MB9A310 Series 2. Pin Characteristics (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin name "H" level input voltage (hysteresis input) VIHS "L" level input voltage (hysteresis input) VILS CMOS hysteresis input pin, MD0,1 5V tolerant IO CMOS hysteresis input pin, MD0,1 4mA type "H" level output voltage VOH 12mA type The pin doubled as USB IO 4mA type "L" level output voltage VOL 12mA type The pin doubled as USB IO Input leak current Pull-up resistance value Input capacitance IIL - RPU Pull-up pin CIN Other than Vcc, Vss, AVcc, AVss, AVRH Conditions Value Min Typ Max Unit - Vcc × 0.8 - Vcc + 0.3 V - Vcc × 0.8 - Vss + 5.5 V - Vss - 0.3 - Vcc × 0.2 V Vcc - 0.5 - Vcc V Vcc - 0.5 - Vcc V Vcc - 0.4 - Vcc V Vss - 0.4 V Vss - 0.4 V Vss - 0.4 V - -5 - 5 μA Vcc ≥ 4.5 V TBD 50 TBD Vcc < 4.5 V TBD TBD TBD - - 5 15 Vcc ≥ 4.5 V IOH = - 4mA Vcc < 4.5 V IOH = - 2mA Vcc ≥ 4.5 V IOH = - 12mA Vcc < 4.5 V IOH = - 8mA Vcc ≥ 4.5 V IOH = - TBDmA Vcc < 4.5 V IOH = - TBDmA Vcc ≥ 4.5 V IOH = 4mA Vcc < 4.5 V IOH = 2mA Vcc ≥ 4.5 V IOH = 12mA Vcc < 4.5 V IOH = 8mA Vcc ≥ 4.5 V IOH = TBDmA Vcc < 4.5 V IOH = TBDmA DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Remarks kΩ pF 67 r2.1 MB9A310 Series z AC Characteristics (1) Main Clock Input Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Value Min Max Pin Symbol Conditions name Parameter Input frequency FCH Input clock cycle tCYLH Input clock pulse width Input clock rise time and fall time Internal operating clock frequency Internal operating clock cycle time X0 X1 - Unit Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V PWH/tCYLH PWL/tCYLH 4 4 4 4 20.83 50 48 20 48 20 250 250 45 55 % - - 5 ns MHz MHz ns tCF tCR FCC - - - 40 MHz FCP0 - - - 40 MHz FCP1 - - - 40 MHz FCP2 - - - 40 MHz tCYCC - - 25 - ns tCYCP0 - - 25 - ns tCYCP1 - - 25 - ns tCYCP2 - - 25 - ns Remarks When crystal oscillator is connected When using external clock When using external clock When using external clock When using external clock CPU/AHB bus clock Peripheral bus clock 0 (APB0) Peripheral bus clock 1 (APB1) Peripheral bus clock 2 (APB2) CPU/AHB bus clock Peripheral bus clock 0 (APB0) Peripheral bus clock 1 (APB1) Peripheral bus clock 2 (APB2) tCYLH X0 0.8×Vcc 0.8×Vcc 0.8×Vcc 0.2×Vcc PW H P WL tCF 68 FUJITSU SEMICONDUCTOR CONFIDENTIAL 0.2×Vcc tCR DS706-00012-0v02-E r2.1 MB9A310 Series (2) Sub Clock Input Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Input frequency Min Value Typ Max - - 32.768 - kHz - 32 - 100 kHz Pin Conditions name Unit FCL X0A X1A Input clock cycle tCYLL - 10 - 31.25 μs Input clock pulse width - PWH/tCYLL PWL/tCYLL 45 - 55 % Remarks When crystal oscillator is connected When using external clock When using external clock When using external clock tCYLL X0A 0.8×Vcc 0.8×Vcc 0.8×Vcc 0.2×Vcc PW H 0.2×Vcc P WL (3) Built-in CR Oscillation Characteristics Built-in high-speed CR (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Conditions Ta = + 25°C Min Value Typ Max 3.92 4 4.08 Unit Remarks When trimming Clock frequency FCRH Ta = - 40°C to + 105°C Ta = - 40°C to + 105°C TBD 4 TBD TBD 4 TBD MHz When not trimming Built-in low-speed CR (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Conditions FCRL - Clock frequency DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Min Value Typ Max 50 100 150 Unit Remarks kHz 69 r2.1 MB9A310 Series (4) Operating Conditions of PLL (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Value Unit Min Typ Max Remarks PLL oscillation stabilization wait time tLOCK 100 μs (LOCK UP time)* PLL input clock frequency fPLLI 4 16 MHz PLL multiple rate 13 75 multiple PLL macro oscillation clock frequency fPLLO 200 300 MHz *: Time from when the PLL starts operating until the oscillation stabilizes. (5) Reset Input Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Reset input time tINITX Value Pin Conditions name Min Max INITX 500 - - Unit Remarks ns (6) Power-on Reset Timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Power supply rising time Power supply shut down time Tr Toff Pin name Vcc Value Unit Min Max 0 - ms 1 - ms Remarks Toff Tr 2.7V Vcc 0.2V 0.2V 70 FUJITSU SEMICONDUCTOR CONFIDENTIAL 0.2V DS706-00012-0v02-E r2.1 MB9A310 Series (7) External Bus Timing External bus clock output Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Output frequency Minimum clock cycle time Symbol Pin name Conditions Value Min Max Unit MCLKOUT Vcc ≥ 4.5 V Vcc < 4.5 V Vcc ≥ 4.5 V Vcc < 4.5 V 25 31.25 MHz MHz ns ns tCYCLE - 40 32 - tCYCLE 0.8×Vcc 0.8×Vcc MCLKOUT 0.8×Vcc 0.2×Vcc PWH 0.2×Vcc PWL External bus signal input/output Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol VIH Signal input Characteristics VIL Output Signal - VOH Signal output Characteristics Input Signal Conditions VOL V IH VIH VIL VIL VOH VOH V OL VOL DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Value Unit 0.8 × VCC V 0.2 × VCC V 0.8 × VCC V 0.2 × VCC V Remarks 71 r2.1 MB9A310 Series Separate Bus Access Asynchronous SRAM Mode (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin name MOEX tOEW MOEX Min pulse width MCSX ↓→ Address MCSX[7:0] tCSL – AV output delay time MAD[24:0] MOEX MOEX ↑ → tOEH - AX MAD[24:0] Address hold time MCSX ↓→ tCSL - OEL MOEX ↓ delay time MOEX MCSX[7:0] MOEX ↑ → tOEH - CSH MCSX ↑ time MCSX MCSX ↓ → tCSL - RDQML MDQM[1:0] MDQM ↓ delay time MOEX Data set up → tDS - OE MADATA[15:0] MOEX ↑ time MOEX MOEX ↑ → tDH - OE MADATA[15:0] Data hold time MWEX tWEW MWEX Min pulse width MWEX MWEX ↑ → Address tWEH - AX MAD[24:0] output delay time MCSX ↓ → tCSL - WEL MWEX ↓ delay time MWEX MCSX[7:0] MWEX ↑ → tWEH - CSH MCSX ↑ delay time MCSX MCSX ↓ → tCSL-WDQML MDQM[1:0] MDQM ↓ delay time MWEX ↓ → tWEL - DV Data output time MWEX MADATA[15:0] MWEX ↑ → tWEH - DX Data hold time Note: When the external load capacitance = 30pF. (m = 0 to 15, n = 1 to 16) 72 FUJITSU SEMICONDUCTOR CONFIDENTIAL Conditions Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Value Unit Min Max MCLK×n-3 - -9 -12 MCLK×m-9 MCLK×m-12 20 38 9 12 MCLK×m+9 MCLK×m+12 MCLK×m+9 MCLK×m+12 MCLK×m+9 MCLK×m+12 MCLK×m+9 MCLK×m+12 - 0 - ns MCLK×n-3 - ns 0 MCLK×m-9 MCLK×m-12 0 0 MCLK×n-9 MCLK×n-12 0 MCLK×n-9 MCLK×n-12 -9 -12 0 MCLK×m+9 MCLK×m+12 MCLK×n+9 MCLK×n+12 MCLK×m+9 MCLK×m+12 MCLK×n+9 MCLK×n+12 9 12 MCLK×m+9 MCLK×m+12 ns ns ns ns ns ns ns ns ns ns ns ns ns DS706-00012-0v02-E r2.1 MB9A310 Series t CYCLE MCLK t OEH-CSH t WEH-CSH MCSX[7:0] tCSL-AV MAD[24:0] t OEH-AX tWEH-AX t CSL-AV Address Address t CSL-OEL MOEX t OEW t CSL-WDQML t CSL-RDQML MDQM[1:0] MWEX MADATA[15:0] t CSL-WEL t WEW t DS-OE t DH-OE RD DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL t WEL-DV t WEH-DX WD 73 r2.1 MB9A310 Series Separate Bus Access Synchronous SRAM Mode (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Address delay time Symbol Pin name Conditions tAV MCLK MAD[24:0] Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V tCSL MCLK MCSX[7:0] MCSX delay time tCSH tREL MCLK MOEX MOEX delay time tREH Data set up → MCLK ↑ time MCLK ↑→ Data hold time MCLK MADATA[15:0] MCLK MADATA[15:0] tDS tDH tWEL MCLK MWEX MWEX delay time tWEH tDQML MDQM[1:0] delay time MCLK MDQM[1:0] tDQMH MCLK MCLK ↑ → tOD MADATA[15:0] Data output time Note: When the external load capacitance = 30pF. Value Min Max 9 12 9 12 9 12 9 12 9 12 1 1 1 1 1 Unit ns ns ns ns ns 19 37 - ns 0 - ns 9 12 9 12 9 12 9 12 18 24 1 1 1 1 1 1 ns ns ns ns ns t CYCLE MCLK t CSL tCSH MCSX[7:0] tAV MAD[24:0] tAV Address Address tREL tREH tDQML t DQMH MOEX MDQM[1:0] MWEX tDS MADATA[15:0] 74 FUJITSU SEMICONDUCTOR CONFIDENTIAL tDH RD tDQML t DQMH tWEL t WEH t OD t OD WD DS706-00012-0v02-E r2.1 MB9A310 Series Multiplexed Bus Access Asynchronous SRAM Mode (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Multiplexed Address delay time tALE-CHMADV Multiplexed Address hold time tCHMADH Pin name Value Conditions MALE MADATA[15:0] Min Max Vcc ≥ 4.5V Vcc < 4.5V 0 10 20 Vcc ≥ 4.5V MCLK×n+0 MCLK×n+10 Vcc < 4.5V MCLK×n+0 MCLK×n+20 Unit ns ns Note: When the external load capacitance = 30pF. (m = 0 to 15, n = 1 to 16) t CYCLE MCLK MCSX[7:0] MALE Address MAD[24:0] Address MOEX MDQM[1:0] MWEX Address MADATA[15:0] RD tALECHMADV DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Address WD tALECHMADV tCHMADH 75 r2.1 MB9A310 Series Multiplexed Bus Access Synchronous SRAM Mode (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin name Conditions MCLK ALE Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V tCHAL MALE delay time tCHAH MCLK ↑ → Multiplexed tCHMADV Address delay time MCLK MADATA[15:0] MCLK ↑ → tCHMADX Multiplexed Data output time Note: When the external load capacitance = 30pF. Vcc ≥ 4.5V Min Value Max Unit Remarks 9 12 9 12 ns ns ns ns 1 tOD ns 1 tOD ns 1 1 Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V t CYCLE MCLK MCSX[7:0] tCHAH tCHAL MALE MAD[24:0] Address Address MOEX MDQM[1:0] MWEX MADATA[15:0] Address RD tCHMADV 76 FUJITSU SEMICONDUCTOR CONFIDENTIAL Address tCHMADV WD tCHMADX DS706-00012-0v02-E r2.1 MB9A310 Series External Ready Input Timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter MCLK ↑ MRDY input setup time Symbol Pin name Conditions MCLK MRDY tRDYI Value Min Vcc ≥ 4.5V 19 Vcc < 4.5V 37 Max - Unit Remarks ns When RDY input MCLK Over 2cycle Original MOEX MWEX t RDYI MRDY When RDY release MCLK ... ... 2cycle Extended MOEX MWEX tRDY I MRDY DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 77 r2.1 MB9A310 Series (8) Base Timer Input Timing Timer input timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Input pulse width Symbol Pin name Conditions tTIWH tTIWL TIOAn/TIOBn (when using as ECK,TIN) - Max 2tCYCP - Unit Remarks ns tTIWL tTIWH ECK Value Min VIHS VIHS VILS TIN VILS Trigger input timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Input pulse width Symbol Pin name Conditions tTRGH tTRGL TIOAn/TIOBn (when using as TGIN) - TGIN Max 2tCYCP - Unit Remarks ns tTRGL tTRGH VIHS Value Min VIHS VILS 78 FUJITSU SEMICONDUCTOR CONFIDENTIAL VILS DS706-00012-0v02-E r2.1 MB9A310 Series (9) UART Timing Synchronous serial (SPI = 0, SCINV = 0) (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Serial clock cycle time SCK ↓ → SOT delay time SIN → SCK ↑ setup time SCK ↑ → SIN hold time Pin Symbol Conditions name tSCYC SCKx SCKx tSLOVI SOTx Internal shift clock SCKx tIVSHI operation SINx SCKx tSHIXI SINx Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx Vcc < 4.5V Min Max tSLOVE DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Unit 4tcycp - 4tcycp - ns -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns 2tcycp 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation 10 SIN → SCK ↑ setup time tIVSHE SINx SCKx 20 SCK ↑→ SIN hold time tSHIXE SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: The above characteristics apply to CLK synchronous mode. tCYCP indicates the peripheral clock cycle time. These characteristics only guarantee the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. When the external load capacitance = 30pF. SCK ↓ → SOT delay time Vcc ≥ 4.5V Min Max 2tcycp 10 tcycp + 10 79 r2.1 MB9A310 Series tS C Y C V O H S C K VO L tS L O V I V O H S O T V O L tIV S H I S IN t S H IX I V IH V IH V IL V IL M S b it = 0 tS H S L tS L S H V IH V IH S C K V IL tF V IL tR tS L O V E V O H S O T V O L tI V S H E S IN V IH V IL V IL M S 80 FUJITSU SEMICONDUCTOR CONFIDENTIAL tS H I X E V IH b it = 1 DS706-00012-0v02-E r2.1 MB9A310 Series Synchronous serial (SPI = 0, SCINV = 1) (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Serial clock cycle time SCK ↑ → SOT delay time SIN → SCK ↓ setup time SCK ↓ → SIN hold time Symbol Pin Conditions name tSCYC SCKx SCKx tSHOVI SOTx Internal shift clock SCKx tIVSLI operation SINx SCKx tSLIXI SINx Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx Vcc < 4.5V Min Max tSHOVE DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Unit 4tcycp - 4tcycp - ns -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns 2tcycp - 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation 10 SIN → SCK ↓ setup time tIVSLE SINx SCKx 20 SCK ↓ → SIN hold time tSLIXE SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: The above characteristics apply to CLK synchronous mode. tCYCP indicates the peripheral clock cycle time. These characteristics only guarantee the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. When the external load capacitance = 30pF. SCK ↑ → SOT delay time Vcc ≥ 4.5V Min Max 2tcycp 10 tcycp + 10 81 r2.1 MB9A310 Series tS C Y C VO H S C K V O L tS H O V I VO H S O T VO L t IV S L I tS L IX I V IH V IH V IL V IL S IN M S b i t= 0 tS H S L S C K tS L S H V IH V IH V IL V IL V IL tF tR tS H O V E VO H S O T tI V S L E tS L IX E S IN M S b it = 1 82 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series Synchronous serial(SPI = 1, SCINV = 0) (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Serial clock cycle time SCK ↑→ SOT delay time SIN → SCK ↓ setup time SCK ↓ → SIN hold time SOT → SCK ↓ delay time Symbol Pin Conditions name tSCYC SCKx SCKx tSHOVI SOTx SCKx Internal shift tIVSLI clock SINx operation SCKx tSLIXI SINx SCKx tSOVLI SOTx Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx Vcc < 4.5V Min Max tSHOVE DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Unit 4tcycp - 4tcycp - ns -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns 2tcycp - 30 2tcycp - 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation 10 SIN → SCK ↓ setup time tIVSLE SINx SCKx 20 SCK ↓ → SIN hold time tSLIXE SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: The above characteristics apply to CLK synchronous mode. tCYCP indicates the peripheral clock cycle time. These characteristics only guarantees the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. When the external load capacitance = 30pF. SCK ↑ → SOT delay time Vcc ≥ 4.5V Min Max 2tcycp 30 2tcycp 10 tcycp + 10 83 r2.1 MB9A310 Series tS CY C VOH SCK VOL VOH VOL SOT V OH VOL tIV S L I tS L IX I V IH V IL V IH V IL SIN VOL tS H OV I tSOVLI M S b it = 0 tS HS L tS L SH V IH V IH S CK VI L tF * S OT V IL tS H OV E tR V OH V OH V OL V OL tIV S LE S IN VIH V IL tS L IX E V IH V IL V IH VIL * : Ch a ng es wh e n w r itin g to TD R re gis ter 84 FUJITSU SEMICONDUCTOR CONFIDENTIAL M S bi t= 1 DS706-00012-0v02-E r2.1 MB9A310 Series Synchronous serial (SPI = 1, SCINV = 1) (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin Conditions name Vcc < 4.5V Min Max Vcc ≥ 4.5V Min Max Unit Serial clock cycle time tSCYC SCKx 4tcycp - 4tcycp - ns SCK ↓→ SOT delay time tSLOVI SCKx SOTx -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns SIN → SCK ↑ setup time SCK ↑ →SIN hold time SOT → SCK ↑ delay time SCKx Internal shift clock SINx operation SCKx tSHIXI SINx SCKx tSOVHI SOTx tIVSHI Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx 2tcycp - 30 2tcycp - 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation 10 tIVSHE SIN → SCK ↑ setup time SINx SCKx 20 tSHIXE SCK ↑ → SIN hold time SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: The above characteristics apply to CLK synchronous mode. tCYCP indicates the peripheral clock cycle time. These characteristics only guarantee the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. When the external load capacitance = 30pF. SCK ↓ → SOT delay time tSLOVE DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 2tcycp 30 2tcycp 10 tcycp + 10 85 r2.1 MB9A310 Series tSCYC VOH SCK VOH VOL tSLOVI tSOVHI VOH VOL SOT VOH VOL tIVSHI tSHIXI VIH VIL SIN VIH VIL MS bit = 0 tR tSHSL VIH SCK VIH VIL tSLOVE VOH VOL SOT VOH VOL tIVSHE tSHIXE VIH VIL SIN tF tSLSH VIH VIL MS bit = 1 External clock (EXT = 1) : asynchronous only (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Serial clock "L" pulse width Serial clock "H" pulse width SCK fall time SCK rise time Symbol Conditions tSLSH tSHSL tF tR CL = 30pF tR SCK VIL tSHSL VIH 86 FUJITSU SEMICONDUCTOR CONFIDENTIAL Min Max tcycp + 10 tcycp + 10 - 5 5 ns ns ns ns tF tSLSH VIH VIL Unit Remarks VIL VIH DS706-00012-0v02-E r2.1 MB9A310 Series (10) External input timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin name Conditions Value Unit Min Max ADTG FRCKx Input pulse width tINH tINL - 2tCYCP *1 - ns - 2tCYCP *1 - ns ICxx DTTIxX INT00 to INT15, 2tCYCP + 100 *1 NMIX 500 *2 *1 : tCYCP indicates the peripheral clock cycle time except stop when in stop mode. *2 : When in stop mode, in timer mode. tINH VILS ns ns Remarks A/D converter trigger input Free-run timer input clock Input capture Wave form generator External interrupt NMI tINL VILS DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL VIHS VIHS 87 r2.1 MB9A310 Series (11) Quadrature Position/Revolution Counter timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Value Conditions Min AIN pin "H" width tAHL AIN pin "L" width tALL BIN pin "H" width tBHL BIN pin "L" width tBLL PC_Mode2 or BIN rise time from tAUBU PC_Mode3 AIN pin "H" level PC_Mode2 or AIN fall time from tBUAD PC_Mode3 BIN pin "H" level PC_Mode2 or BIN fall time from tADBD PC_Mode3 AIN pin "L" level PC_Mode2 or AIN rise time from tBDAU PC_Mode3 BIN pin "L" level PC_Mode2 or AIN rise time from 2tCYCP * tBUAU PC_Mode3 BIN pin "H" level PC_Mode2 or BIN fall time from tAUBD PC_Mode3 AIN pin "H" level PC_Mode2 or AIN fall time from tBDAD PC_Mode3 BIN pin "L" level PC_Mode2 or BIN rise time from tADBU PC_Mode3 AIN pin "L" level ZIN pin "H" width tZHL QCR:CGSC = "0" ZIN pin "L" width tZLL QCR:CGSC = "0" AIN/BIN rise and fall time tZABE QCR:CGSC = "1" from determined ZIN level Determined ZIN level from tABEZ QCR:CGSC = "1" AIN/BIN rise and fall time * : tCYCP indicates the peripheral clock cycle time except stop when in stop mode. Max - Unit ns tALL tAHL AIN tAUBU tBUAD tADBD tBDAU BIN tBHL tBLL 88 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series tBLL tBHL BIN tBUAU tAUBD tBDAD tADBU AIN tAHL tALL tZHL ZIN tZLL ZIN tABEZ tZABE AIN/BIN DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 89 r2.1 MB9A310 Series 2 (12) I C timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol SCL clock frequency (Repeated) START condition hold time SDA ↓→ SCL ↓ SCLclock "L" width SCLclock "H" width (Repeated) START setup time SCL ↑ → SDA ↓ Data hold time SCL ↓ → SDA ↓ ↑ Data setup time SDA ↓ ↑ → SCL ↑ STOP condition setup time SCL ↑ → SDA ↑ Bus free time between "STOP condition" and "START condition" fSCL 0 100 0 400 kHz tHDSTA 4.0 - 0.6 - μs tLOW tHIGH 4.7 4.0 - 1.3 0.6 - μs μs 4.7 - 0.6 - μs 0 3.45 *2 0 0.9 *3 μs tSUDAT 250 - 100 - ns tSUSTO 4.0 - 0.6 - μs tBUF 4.7 - 1.3 - μs tSUSTA tHDDAT Conditions Typical High-speed Unit Remarks mode mode Min Max Min Max CL = 30pF, R = (Vp/IOL) *1 2 tCYCP 2 tCYCP ns *4 *4 *1 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current. *2 : The maximum tHDDAT must satisfy that it doesn't extend at least "L" period (tLOW) of device's SCL signal. *3 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device satisfies the requirement of "tSUDAT ≥ 250 ns". *4 : tCYCP is the peripheral clock cycle time. To use I2C, set the peripheral bus clock at 8 MHz or more. Noise filter tSP - SDA tSUDAT tSUSTA tBUF tLOW SCL tHDSTA tHDDAT tHIGH 90 FUJITSU SEMICONDUCTOR CONFIDENTIAL tHDSTA tSP tSUSTO DS706-00012-0v02-E r2.1 MB9A310 Series (13) ETM timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin name tETMH TRACECLK TRACED3 - 0 Data hold Conditions Value Unit Min Max Vcc ≥ 4.5V 2 9 Vcc < 4.5V 2 15 Remarks ns Note: When the external load capacitance = 30pF. tC Y C HCLK VOH tE T M H T R A C E D 3 -0 VOH VOL TR A C E C LK tE TM H VOH VOH VOL VOL DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 91 r2.1 MB9A310 Series (14) JTAG timing (Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin name TMS, TDI setup time tJTAGS TMS, TDI hold time tJTAGH TDO delay time tJTAGD Conditions Value Min Max Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V Vcc < 4.5V Vcc ≥ 4.5V TCK TMS,TDI TCK TMS,TDI TCK TDO Vcc < 4.5V Unit 15 - ns 15 - ns - 25 - 45 Remarks ns Note: When the external load capacitance = 30pF. TCK VO H V OL tJTA G S T M S /T D I tJTA G H V OH V OH V OL V OL t J TA G D TD O V OH V OL 92 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series z 12bit A/D Converter 1. Electrical characteristics for the A/D converter(Provisional value) (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, Ta = - 40°C to + 105°C) Parameter Resolution Linearity error Differential linearity error Zero transition voltage Full transition voltage Conversion time Sampling time Compare clock cycle *3 State transition time to operation permission Power supply current (analog + digital) Reference power supply current (between AVRH to AVSS) Value Typ Pin name Min - - 4.5 - 12 + 4.5 bit LSB - -2.5 - + 2.5 LSB - 20 - + 20 mV - 20 - + 20 mV 1.0* *2 *2 - - μs Tcck 50 - 10000 ns Tstt 2.5 - - μs AVCC - 0.47 0.01 0.62 TBD - 1.1 1.96 - 0.01 1.6 μA When XSTB is 0 (1unit) 12.9 pF AN0 to AN15 AN0 to AN15 Ts 1 Max AVRH Analog input capacity Cin - - Analog input resistance Rin - - Interchannel disparity Analog port input current 2 3.8 4 Unit ns Remarks AVRH = 2.7V to 5.5V AVcc ≥ 4.5V AVcc ≥ 4.5V AVcc < 4.5V AVcc ≥ 4.5V AVcc < 4.5V mA A/D 1unit operation μA When XSTB is 0 (1unit) A/D 1unit operation mA AVRH = 5.5V kΩ AVcc ≥ 4.5V AVcc < 4.5V LSB AN0 5 μA to AN15 AN0 AVSS AVRH V Analog input voltage to AN15 Reference voltage AVRH AVSS AVCC V *1: Conversion time is the value of sampling time (Ts) + compare time (Tc). The condition of the minimum conversion time is when HCLK=40MHz, the value of sampling time: 300ns, the value of sampling time: 700ns (AVcc ≥ 4.5V). Ensure that it satisfies the value of sampling time (Ts) and compare clock cycle (Tcck). For setting of sampling time and compare clock cycle, see chapter "12-bit A/D Converter" in "Peripheral Manual". *2: A necessary sampling time changes by external impedance. Ensure that it set the sampling time to satisfy (Equation 1) *3: Compare time (Tc) is the value of (Equation 2) DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 93 r2.1 MB9A310 Series Analog signal source Rext AN0 to AN15 Analog input pin comparator Rin Cin (Equation 1) Ts ≥ (Rin + Rext) × Cin × 9 Ts : Sampling time Rin : input resistance of A/D = 2kΩ 4.5 ≤ AVCC ≤ 5.5 input resistance of A/D = 3.8kΩ 2.7 ≤ AVCC < 4.5 Cin : input capacity of A/D = 12.9pF 2.7 ≤ AVCC ≤ 5.5 Rext : Output impedance of external circuit (Equation 2) Tc = Tcck × 14 Tc : Compare time Tcck : Compare clock cycle 94 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series Definition of 12-bit A/D Converter Terms Resolution Linearity error : Analog variation that is recognized by an A/D converter. : Deviation of the line between the zero-transition point (0b000000000000←→0b000000000001) and the full-scale transition point (0b111111111110←→0b111111111111) from the actual conversion characteristics. Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the output code by 1 LSB. Linearity error 0xFFF Actual conversion characteristics 0xFFE Actual conversion characteristics 0x(N+1) {1 LSB(N-1) + VOT} VFST VNT 0x004 (Actuallymeasured value) (Actually-measured value) 0x003 Digital output Digital output 0xFFD Differential linearity error Actual conversion characteristics Ideal characteristics 0x002 0x001 0xN Ideal characteristics (Actually-measured value) VNT (Actually-measured value) 0x(N-2) VOT (Actually-measured value) AVss V(N+1)T 0x(N-1) Actual conversion characteristics AVRH AVss AVRH Analog input Linearity error of digital output N = Analog input VNT - {1LSB × (N - 1) + VOT} 1LSB Differential linearity error of digital output N = 1LSB = N VOT VFST VNT : : : : V(N + 1) T - VNT 1LSB [LSB] - 1 [LSB] VFST - VOT 4094 A/D converter digital output value. Voltage at which the digital output changes from 0x000 to 0x001. Voltage at which the digital output changes from 0xFFE to 0xFFF. Voltage at which the digital output changes from 0x(N − 1) to 0xN. DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 95 r2.1 MB9A310 Series z USB characteristics (Vcc = 2.7V to 5.5V,USBVcc = 3.0V to 3.6V, Vss = 0V, Ta = - 40°C to + 105°C) Parameter Symbol Pin Conditions name Value MIN MAX Unit Remarks Input High level voltage VIH - 2.0 USBVcc + 0.3 V *1 Input Low level voltage Input charact- Differential input eristics sensitivity Different common mode input voltage VIL - Vss - 0.3 0.8 V *1 VDI - 0.2 - V *2 VCM - 0.8 2.5 V *2 External pull-down 2.8 3.6 V *3 Output High level voltage VOH resistance = 15kΩ UDP0, External UDM0 pull-up 0.0 0.3 V *3 Output Low level voltage VOL resistance Output = 1.5kΩ charactCrossover voltage VCRS 1.3 2.0 V *4 eristics Rise time tFR Full Speed 4 20 ns *5 Fall time tFF Full Speed 4 20 ns *5 Rise/fall time matching tFRFM Full Speed 90 111.11 % *5 Output impedance ZDRV Full Speed 28 44 Ω *6 Rise time tLR Low Speed 75 300 ns *7 Fall time tLF Low Speed 75 300 ns *7 Rise/fall time matching tLRFM Low Speed 80 125 % *7 *1 : The switching threshold voltage of Single-End-Receiver of USB I/O buffer is set as within VIL (Max) = 0.8V, VIH (Min) = 2.0 V (TTL input standard). There are some hysteresis to lower noise sensitivity. Minimum differential input sensitivity [V] *2 : Use differential-Receiver to receive USB differential data signal. Differential-Receiver has 200 mV of differential input sensitivity when the differential data input is within 0.8 V to 2.5 V to the local ground reference level. Above voltage range is the common mode input voltage range. 1.0 0.2 0.8 2.5 Common mode input voltage [V] 96 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series *3 : The output drive capability of the driver is below 0.3 V at Low-State (VOL) (to 3.6 V and 1.5 kΩ load), and 2.8 V or above (to the VSS and 1.5 kΩ load) at High-State (VOH). *4 : The cross voltage of the external differential output signal (D + /D −) of USB I/O buffer is within 1.3 V to 2.0 V. D+ Max 2.0V VCRS specified range Min 1.3V D- *5 : They indicate rise time (Trise) and fall time (Tfall) of the full-speed differential data signal. They are defined by the time between 10% and 90% of the output signal voltage. For full-speed buffer, Tr/Tf ratio is regulated as within ± 10% to minimize RFI emission. D+ 90% 90% 10% 10% DTrise Rising time Tfall Falling time Full-speed Buffer Rs = 27Ω TxD+ CL = 50pF Rs = 27Ω TxDCL = 50pF. 3-State Enable DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 97 r2.1 MB9A310 Series *6 : USB Full-speed connection is performed via twist pair cable shield with 90Ω ± 15% characteristic impedance(Differential Mode). USB standard defines that output impedance of USB driver must be in range from 28Ωto 44Ω. So, discrete series resistor (Rs) addition is defined in order to satisfy the above definition and keep balance. When using this USB FLS I/O, use it with 25Ω to 30Ω (recommendation value 27Ω) series resistor Rs. Full-speed Buffer Rs TxD+ 28Ω to 44Ω Equiv. Imped. Rs TxD- 28Ω to 44Ω Equiv. Imped. 3-State Enable Mount it as external resistance. Rs series resistor 25Ω to 30Ω Series resistor of 27Ω(recommendation value) must be added. And, use "resistance with an uncertainty of 5% by E24 sequence". *7 : They indicate rise time (Trise) and fall time (Tfall) of the low-speed differential data signal. They are defined by the time between 10% and 90% of the output signal voltage. D+ 90% 90% 10% 10% DTrise Rising time Tfall Falling time See "Low-Speed Load (Compliance Load)" for conditions of external load. 98 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series Low-Speed Load (Upstream Port Load) - Reference 1 Low-speed Buffer Rs = 27Ω TxD+ CL = 50 to 150pF Rpd Rs = 27Ω TxD- CL =50 to 150pF Rpd 3-State Enable Rpd=15kΩ Low-Speed Load (Downstream Port Load) - Reference 2 Low-speed Buffer Rs=27Ω TxD+ VTERM CL=200 to 600pF Rpu Rs=27Ω TxDCL=200 to 600pF 3-State Enable Rpu=1.5kΩ VTERM=3.6V Low-Speed Load (Compliance Load) Low-speed Buffer Rs = 27Ω TxD+ CL = 200 to 450pF Rs = 27Ω TxDCL =200 to 450pF 3-State Enable DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 99 r2.1 MB9A310 Series z Low voltage detection characteristics 1. Low voltage detection reset (Ta = - 40°C to + 105°C) Parameter Detected voltage Released voltage Symbol Conditions VDL VDH - Min Value Typ Max 2.25 2.30 2.45 2.50 Unit 2.65 2.70 V V Remarks When voltage drops When voltage rises 2. Interrupt of low voltage detection (Ta = - 40°C to + 105°C) Parameter Symbol Conditions Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH LVD stabilization wait time TLVDW SVHI = 0000 SVHI = 0001 SVHI = 0010 SVHI = 0011 SVHI = 0100 SVHI = 0111 SVHI = 1000 SVHI = 1001 Min Value Typ Max Unit 2.58 2.67 2.76 2.85 2.94 3.04 3.31 3.40 3.40 3.50 3.68 3.77 3.77 3.86 3.86 3.96 2.8 2.9 3.0 3.1 3.2 3.3 3.6 3.7 3.7 3.8 4.0 4.1 4.1 4.2 4.2 4.3 3.02 3.13 3.24 3.34 3.45 3.56 3.88 3.99 3.99 4.10 4.32 4.42 4.42 4.53 4.53 4.64 V V V V V V V V V V V V V V V V - - 2240 × tcycp * μs - Remarks When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises * : tCYCP indicates the peripheral clock cycle time. Voltage Vcc VDH VDL dV dt Time 100 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r2.1 MB9A310 Series z Flash Memory Write/Erase Characteristics (Vcc = 2.7V to 5.5V, Ta = - 40°C to + 105°C) Parameter Sector erase time Large Sector Small Sector Half word (16 bit) write time Chip 64K/128K/256KByte erase time 384K/512KByte Value Typ Max - 0.4 0.3 TBD TBD s - 12 384 μs - 4 5.6 TBD TBD s s Min Value Remarks Excludes write time prior to internal erase Not including system-level overhead time. Excludes write time prior to internal erase Erase/write cycles and data hold time (targeted value) Erase/write cycles (cycle) Data hold time (year) 1,000 20* Remarks 10,000 10* 100,000 5* *: This value comes from the quality and reliability test (using Arrhenius equation to translate high temperature stress test result into normalized value at + 85°C) . DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 101 r2.1 MB9A310 Series ORDERING INFORMATION Part number MB9AF311LPMC1 MB9AF312LPMC1 MB9AF314LPMC1 MB9AF311LPMC MB9AF312LPMC MB9AF314LPMC Package Plastic x LQFP(0.5mm pitch),64-pin (FPT-64P-M24/M38) Plastic x LQFP(0.65mm pitch),64-pin (FPT-64P-M23/M39) MB9AF311MPMC MB9AF312MPMC MB9AF314MPMC MB9AF315MPMC Plastic x LQFP(0.5mm pitch),80-pin (FPT-80P-M21/M37) MB9AF316MPMC MB9AF311NPMC MB9AF312NPMC MB9AF314NPMC MB9AF315NPMC Plastic x LQFP(0.5mm pitch),100-pin (FPT-100P-M20/M23) MB9AF316NPMC MB9AF311NPF MB9AF312NPF MB9AF314NPF MB9AF315NPF Plastic x QFP(0.65mm pitch), 100-pin (FPT-100P-M06) MB9AF316NPF MB9AF311NBGL MB9AF312NBGL MB9AF314NBGL 102 FUJITSU SEMICONDUCTOR CONFIDENTIAL Plastic x PFBGA(0.8mm pitch),112-pin (BGA-112P-M04) DS706-00012-0v02-E r2.1 MB9A310 Series PACKAGE DIMENSIONS 100-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 14.0 mm × 14.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm Max Weight 0.65 g Code (Reference) P-LFQFP100-14×14-0.50 (FPT-100P-M20) 100-pin plastic LQFP (FPT-100P-M20) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 16.00±0.20(.630±.008)SQ * 14.00±0.10(.551±.004)SQ 51 75 76 50 0.08(.003) Details of "A" part +0.20 26 100 1 25 C 0.20±0.05 (.008±.002) 0.08(.003) M 0.10±0.10 (.004 ±.004) (Stand off) 0°~8° "A" 0.50(.020) +.008 1.50 –0.10 .059 –.004 (Mounting height) INDEX 0.145±0.055 (.006±.002) 2005 -2010 FUJITSU SEMICONDUCTOR LIMITED F100031S-c-3-5 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 103 r1.0 MB9A310 Series 100-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 14.00 mm × 14.00 mm Lead shape Gullwing Lead bend direction Normal bend Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.65 g (FPT-100P-M23) 100-pin plastic LQFP (FPT-100P-M23) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 16.00±0.20(.630±.008)SQ *14.00±0.10(.551±.004)SQ 75 51 76 50 0.08(.003) Details of "A" part 1.50 +0.20 - 0.10 (.059+.008 -.004) (Mounting height) INDEX 100 26 "A" 1 C 0.60±0.15 (.024±.006) 25 0.50(.020) 0.22±0.05 (.009±.002) 0.08(.003) M 0°~8° 0.50±0.20 (.020±.008) 0.10±0.10 (.004±.004) (Stand off) 0.25(.010) 0.145±0.055 (.006±.002) 2009-2010 FUJITSU SEMICONDUCTOR LIMITED F100034S-c-3-4 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 104 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series 100-pin plastic QFP Lead pitch 0.65 mm Package width × package length 14.00 × 20.00 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 3.35 mm MAX Code (Reference) P-QFP100-14×20-0.65 (FPT-100P-M06) 100-pin plastic QFP (FPT-100P-M06) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 23.90±0.40(.941±.016) * 20.00±0.20(.787±.008) 80 51 81 50 0.10(.004) 17.90±0.40 (.705±.016) *14.00±0.20 (.551±.008) INDEX Details of "A" part 1 30 0.65(.026) 0.32±0.05 (.013±.002) 0.13(.005) M "A" C 0.25(.010) +0.35 3.00 –0.20 +.014 .118 –.008 (Mounting height) 0~8° 31 100 2002-2010 FUJITSU SEMICONDUCTOR LIMITED F100008S-c-5-7 0.17±0.06 (.007±.002) 0.80±0.20 (.031±.008) 0.88±0.15 (.035±.006) 0.25±0.20 (.010±.008) (Stand off) Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 105 r1.0 MB9A310 Series 80-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 12 mm × 12 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm Max Weight 0.47 g Code (Reference) P-LFQFP80-12×12-0.50 (FPT-80P-M21) 80-pin plastic LQFP (FPT-80P-M21) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 14.00±0.20(.551±.008)SQ * 12.00±0.10(.472±.004)SQ 60 0.145±0.055 (.006±.002) 41 40 61 0.08(.003) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 INDEX 0°~8° 21 80 "A" LEAD No. 1 0 2 0.50(.020) C 0.10±0.05 (.004±.002) (Stand off) 0.20±0.05 (.008±.002) 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.25(.010) 0.08(.003) M 2006-2010 FUJITSU SEMICONDUCTOR LIMITED F80035S-c-2-4 Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 106 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series 80-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 12.00 mm × 12.00 mm Lead shape Gullwing Lead bend direction Normal bend Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.47 g (FPT-80P-M37) 80-pin plastic LQFP (FPT-80P-M37) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 14.00± 0.20(.551±. 008)SQ *12.00± 0.10(.472±. 004)SQ 60 0.145± 0.055 (.006 ±. 002) 41 Details of "A" part 40 61 +0.20 1.50 –0.10 (Mounting height) .059 +.008 –.004 0.25(.010) 0~8° 0.08(.003) INDEX 0.50 ± 0.20 (.020 ±. 008) 0.60 ± 0.15 (.024 ±. 006) 0.10 ± 0.05 (.004 ±. 002) (Stand off) 21 80 "A" 1 20 0.50(.020) 0.22 ± 0.05 (.009 ±. 002) C 0.08(.003) M 2009-2010 FUJITSU SEMICONDUCTOR LIMITED F80037S-c-1-2 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 107 r1.0 MB9A310 Series 64-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 10.0 × 10.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.32 g Code (Reference) P-LFQFP64-10×10-0.50 (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M24) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 12.00±0.20(.472±.008)SQ *10.00±0.10(.394±.004)SQ 48 0.145±0.055 (.006±.002) 33 32 49 0.08(.003) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 INDEX 0°~8° 17 64 0.10±0.10 (.004±.004) (Stand off) "A" LEAD No. 1 16 0.50(.020) C 0.20±0.05 (.008±.002) 0.08(.003) M 2005-2010 FUJITSU SEMICONDUCTOR LIMITED F64036S-c-1-3 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 108 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series 64-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 10.00 mm × 10.00 mm Lead shape Gullwing Lead bend direction Normal bend Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.32 g (FPT-64P-M38) 64-pin plastic LQFP (FPT-64P-M38) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 12.00±0.20(.472±.008)SQ *10.00±0.10(.394±.004)SQ 48 0.145 ± 0.055 (.006 ±. 002) 33 Details of "A" part 32 49 0.08(.003) +0.20 1.50 –0.10 (Mounting height) .059 +.008 –.004 0.25(.010) 0~8° INDEX 17 64 1 0.22±0.05 (.009±.002) 0.10 ± 0.10 (.004 ±. 004) (Stand off) "A" 16 0.50(.020) C 0.50 ± 0.20 (.020 ±. 008) 0.60 ± 0.15 (.024 ±. 006) 0.08(.003) M 2010 FUJITSU SEMICONDUCTOR LIMITED F64038S-c-1-2 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 109 r1.0 MB9A310 Series 64-pin plastic LQFP Lead pitch 0.65 mm Package width × package length 12.0 × 12.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.47 g Code (Reference) P-LQFP64-12×12-0.65 (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M23) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 14.00±0.20(.551±.008)SQ *12.00±0.10(.472±.004)SQ 48 0.145±0.055 (.006±.002) 33 49 32 0.10(.004) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 0.25(.010) INDEX 0~8° 64 17 1 0.65(.026) C "A" 16 0.32±0.05 (.013±.002) 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10±0.10 (.004±.004) (Stand off) 0.13(.005) M 2003-2010 FUJITSU SEMICONDUCTOR LIMITED F64034S-c-1-4 Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 110 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series 64-pin plastic LQFP Lead pitch 0.65 mm Package width × package length 12.00 mm × 12.00 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.47 g (FPT-64P-M39) 64-pin plastic LQFP (FPT-64P-M39) Note 1) Pins width and pins thickness include plating thickness. 14.00±0.20(.551±.008)SQ 12.00±0.10(.472±.004)SQ 48 0.145±0.055 (.006±.002) 33 Details of "A" part 32 49 +0.20 1.50 –0.10 .059 +.008 –.004 0.10(.004) INDEX 1 16 0.65(.026) C 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 17 64 0.32±0.05 (.013±.002) 0~8˚ 0.10±0.10 (.004±.004) 0.25(.010)BSC "A" 0.13(.005) M 2010-2011 FUJITSU SEMICONDUCTOR LIMITED HMbF64-39Sc-2-2 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 111 r1.0 MB9A310 Series 112-ball plastic PFBGA Ball pitch 0.80 mm Package width × package length 10.00 × 10.00 mm Lead shape Soldering ball Sealing method Plastic mold Ball size Ø0.45 mm Mounting height 1.45 mm Max. Weight 0.22 g (BGA-112P-M04) 112-ball plastic PFBGA (BGA-112P-M04) 10.00±0.10(.394±.004) 0.20(.008) S B 0.80(.031) REF B 11 10 9 8 7 6 5 4 3 2 0.80(.031) REF A 10.00±0.10 (.394±.004) 1 L K J H G F (INDEX AREA) 0.35±0.10 (.014±.004) (Stand off) 0.20(.008) S A 1.25±0.20 (.049±.008) (Seated height) ED C B A INDEX 112-ø0.45±010 (112-ø0.18±.004) ø0.08(.003) M S A B S 0.10(.004) S C 2003-2010 FUJITSU SEMICONDUCTOR LIMITED B112004S-c-2-3 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 112 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00012-0v02-E r1.0 MB9A310 Series MAJOR CHANGES IN THIS EDITION Page Section 1 - 2 3 Change Results Type was added. MB9AF311L/M/N FEATURES z On-chip Memories Naming of [SRAM] was changed. On Chip SRAM → SRAM1 Code SRAM → SRAM0 z External Bus Interface MB9AF311L was added. z Multi-function Serial Interface (Max. 8channels) MB9AF311L was added. z A/D Converter (Max. 16channels) MB9AF311L was added. 6 z Debug MB9AF311L/M was added. 7 PRODUCT LINEUP z Memory size z Memory size was changed. z Function z Function was changed. PACKAGES PACKAGES was changed. PIN DESCRIPTION PIN DESCRIPTION was changed. 52,53 BLOCK DIAGRAM MB9AF311L/M/N was added. On Chip SRAM → SRAM1 Code SRAM → SRAM0 Regurator → Regulator FreeRun Timer → Free-Run Timer 54,55, 56 MEMORY MAP Naming of SRAM was changed. On Chip SRAM → SRAM1 Code SRAM → SRAM0 56 MEMORY MAP z MB9A310 Series Memory Map(3) was added. 62 PIN STATUS IN EACH CPU STATE z LIST OF PIN STATUS z LIST OF PIN STATUS was changed. sub CR timer mode → low speed CR timer mode 63 ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings Power consumption was changed. 65,66 z DC Characteristics 1. Current rating 1. Current rating was changed. 67 2. Pin Characteristics "H" level input voltage (hysteresis input) was changed. 71 z AC Characteristics (7) External Bus Timing Minimum clock cycle time was changed. Minimum clock pulse width → Minimum clock cycle time 9 19,20, 24,25 DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 113 r3.0 MB9A310 Series Page Section Change Results 79,81, 83,85 (9) UART Timing Note was changed. 50pF → 30pF 86 (9) UART Timing Conditions of "External clock (EXT = 1) : asynchronous only" was changed. CL = 50pF → CL = 30pF 90 (12) I2C timing Conditions of "(12) I2C timing" was changed. CL = 50pF → CL = 30pF 91 (13) ETM timing Note was changed. 50pF → 30pF 92 (14) JTAG timing Note was changed. 50pF → 30pF 101 z Flash Memory Write/Erase Characteristics Chip erase time was changed. 128K/256KByte → 64K/128K/256KByte 114 FUJITSU MICROELECTRONICS CONFIDENTIAL DS706-00012-0v02-E r2.0 MB9A310 Series DS706-00012-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 115 r3.0 MB9A310 Series FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us.fujitsu.com/micro/ Asia Pacific FUJITSU SEMICONDUCTOR ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ Europe FUJITSU SEMICONDUCTOR EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/semiconductor/ FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fss/ Korea FUJITSU SEMICONDUCTOR KOREA LTD. 902 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fsk/ FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fsp/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information. 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The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department 116 FUJITSU MICROELECTRONICS CONFIDENTIAL DS706-00012-0v02-E r2.0