ISL43681, ISL43741 ® Data Sheet March 13, 2006 FN6053.3 Low-Voltage, Single and Dual Supply, 8 to 1 Multiplexer and Differential 4 to 1 Multiplexer Features The Intersil ISL43681 and ISL43741 devices are precision, bidirectional, analog switches configured as an 8 channel and a differential 4 channel multiplexer/demultiplexer. They are designed to operate from a single +2V to +12V supply or from a ±2V to ±6V supplies. The devices have an inhibit and inhibit bar pin to simultaneously open all signal paths. The devices also have a latch bar pin to lock in the last switch address. • ON Resistance (RON) Max, VS = ±4.5V. . . . . . . . . . . 50Ω • Fully Specified at 3.3V, 5V, ±5V, and 12V Supplies for 10% Tolerances • ON Resistance (RON) Max, VS = +3V . . . . . . . . . . . 155Ω • RON Matching Between Channels, VS = ±5V. . . . . . . . . <2Ω • Low Charge Injection, VS = ±5V . . . . . . . . . . . . . 1pC (Max) • Single Supply Operation. . . . . . . . . . . . . . . . . . . +2V to +12V ON resistance of 39Ω with a ±5V supply and 125Ω with a +3.3V supply. Each switch can handle rail to rail analog signals. The off-leakage current is only 0.1nA at +25°C or 2.5nA at +85°C. • Dual Supply Operation . . . . . . . . . . . . . . . . . . . . . ±2V to ±6V All digital inputs have 0.8V to 2.4V logic thresholds, ensuring TTL/CMOS logic compatibility when using a single 3.3V or +5V supply or dual ±5V supplies. • Guaranteed Max Off-leakage . . . . . . . . . . . . . . . . . . . 2.5nA The ISL43681 is a single 8 to 1 multiplexer device and the ISL43741 is a diff 4 to 1 multiplexer device. Table 1 summarizes the performance of these parts. • TTL, CMOS Compatible TABLE 1. FEATURES AT A GLANCE • Fast Switching Action (VS = +5V) - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19ns • Guaranteed Break-Before-Make • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Battery Powered, Handheld, and Portable Equipment CONFIGURATION SINGLE 8:1 MUX, DIFF 4:1 MUX ±5V RON 39Ω ±5V tON/tOFF 32ns/18ns 12V RON 32Ω 12V tON/tOFF 23ns/15ns 5V RON 65Ω 5V tON/tOFF 38ns/19ns 3.3V RON 125Ω 3.3V tON/tOFF 70ns/32ns • Test Equipment - Medical Ultrasound - Magnetic Resonance Image - CT and PET Scanners (MRI) - ATE - Electrocardiograph Package 20 Ld 4x4 QFN • Audio and Video Signal Routing • Communications Systems - Radios - Telecom Infrastructure - ADSL, VDSL Modems Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Application Note AN557 “Recommended Test Procedures for Analog Switches” • Various Circuits - +3V/+5V DACs and ADCs - Sample and Hold Circuits - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing - Integrator Reset Circuits • Application Note AN520 “CMOS Analog Multiplexers and Switches; Specifications and Application Considerations.” • Application Note AN1034 “Analog Switch and Multiplexer Applications” 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL43681, ISL43741 Pinouts 16 20 NO1A 17 +V NO2 18 N.C. +V 19 NO0B N.C. 20 NO1B NO1 ISL43741 (QFN) TOP VIEW NO3 ISL43681 (QFN) TOP VIEW 19 18 17 16 COM 1 15 NO4 COMB 1 15 NO2A NO7 2 14 NO0 NO3B 2 14 COMA NO5 3 13 NO6 NO2B 3 13 NO0A EN 4 12 ADDC EN 4 12 NO3A 11 ADDB EN 5 N.C. LE ADDA Truth Tables 6 7 8 9 10 ADDA 10 LE 9 11 ADDB N.C. 8 GND 7 LOGIC -V 6 GND 5 -V EN LOGIC Ordering Information TEMP. RANGE (°C) PACKAGE -40 to 85 20 Ld QFN L20.4x4 ISL43681IRZ 43681IRZ (Note) -40 to 85 20 Ld QFN (Pb-free) L20.4x4 ISL43741IR -40 to 85 20 Ld QFN L20.4x4 -40 to 85 20 Ld QFN (Pb-free) L20.4x4 ISL43681 LE EN EN 0 1 0 ADDC ADDB ADDA X X X SWITCH ON Last Switch Selected PART NO. ISL43681IR PART MARKING 43681IR PKG. DWG. # X 0 X X X X NONE X X 1 X X X NONE 1 1 0 0 0 0 NO0 ISL43741IRZ 43741IRZ (Note) 1 1 0 0 0 1 NO1 *Add “-T” suffix for tape and reel. 1 1 0 0 1 0 NO2 1 1 0 0 1 1 NO3 1 1 0 1 0 0 NO4 1 1 0 1 0 1 NO5 1 1 0 1 1 0 NO6 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 1 0 1 1 1 NO7 NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V, with V+ between 2.7V and 10V. X = Don’t Care. ISL43741 LE EN EN 0 1 0 X X Last Switch Selected X 0 X X X NONE X X 1 X X NONE 1 1 0 0 0 NO0A, NO0B 1 1 0 0 1 NO1A, NO1B 1 1 0 1 0 NO2A, NO2B 1 1 0 1 1 NO3A, NO3B ADDB ADDA SWITCH ON NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V, with V+ between 2.7V and 10V. X = Don’t Care. 2 43741IR Pin Descriptions PIN FUNCTION V+ Positive Power Supply Input V- Negative Power Supply Input. Connect to GND for Single Supply Configurations. GND Ground Connection EN Digital Control Input. Connect to GND for Normal Operation. Connect to V+ to turn all switches off. EN Digital Control Input. Connect to V+ for Normal Operation. Connect to GND to turn all switches off. LE Digital Control Input. Connect to +V for Normal Operation. Connect to GND to latch the last switch state. COM NO Analog Switch Common Pin Analog Switch Normally Open Pin ADD Address Input Pin N.C. No Internal Connection FN6053.3 March 13, 2006 ISL43681, ISL43741 Absolute Maximum Ratings Thermal Information V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V Input Voltages LE, EN, EN , NO, NC, ADD (Note 1) . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . ±30mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±100mA ESD Rating HBM ( Per Mil-STD-883, Method 3015.7) . . . . . . . . . . . . . >2.5kV Thermal Resistance (Typical, Note 2) θJA (°C/W) 20 Ld 4x4 QFN Package . . . . . . . . . . . . . . . . . . . . . 45 Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C (Lead Tips Only) Operating Conditions Temperature Range ISL43681IR and ISl43741IR . . . . . . . . . . . . . . . . . . . -40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Signals on NC, NO, COM, ADD, EN, EN, or LE exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 2. θJA is measured with the component mounted on a high effective thermal conductivity test board with direct die attach. See Tech Brief TB379 for details. Electrical Specifications ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEMP (°C) (NOTE 4) MIN TYP Full V- - V+ V 25 - 44 60 Ω Full - - 80 Ω 25 - 1.3 4 Ω Full - - 6 Ω 25 - 7.5 9 Ω Full - - 12 Ω 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA Input Voltage High, VINH, VADDH Full 2.4 - - V Input Voltage Low, VINL, VADDL Full - - 0.8 V PARAMETER TEST CONDITIONS (NOTE 4) MAX UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG VS = ±4.5V, ICOM = 2mA, VNO or VNC = 3V (See Figure 6) ON Resistance, RON RON Matching Between Channels, ∆RON VS = ±4.5V, ICOM = 2mA, VNO or VNC = 3V (Note 5) RON Flatness, RFLAT(ON) VS = ±4.5V, ICOM = 2mA, VNO or VNC = ±3V, 0V (Note 6) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V (Note 7) COM OFF Leakage Current, ICOM(OFF) VS = ±5.5V, VCOM = ±4.5V, VNO or VNC = +4.5V (Note 7) COM ON Leakage Current, ICOM(ON) VS = ±5.5V, VCOM = VNO or VNC = ±4.5V (Note 7) DIGITAL INPUT CHARACTERISTICS Input Current, IADDH, IADDL, IENH, IENL VS = ±5.5V, VINH, VADD = 0V or V+ Full -0.5 - 0.5 µA Input Current, IENH, ILEH VS = ±5.5V, VINH, VADD = 0V or V+ Full -1.5 - 1.5 µA Input Current, IENL, ILEL VS = ±5.5V, VINH, VADD = 0V or V+ Full -4 - 4 µA 3 FN6053.3 March 13, 2006 ISL43681, ISL43741 Electrical Specifications ±5V Supply Test Conditions: VSUPPLY = ±4.5V to ±5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TEMP (°C) (NOTE 4) MIN TYP (NOTE 4) MAX UNITS 25 - 35 50 ns Full - - 60 ns 25 - 22 35 ns Full - - 40 ns 25 - 43 60 ns Full - - 70 ns DYNAMIC CHARACTERISTICS VS = ±4.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3 (See Figure 1) Enable Turn-ON Time, tON VS = ±4.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3 (See Figure 1) Enable Turn-OFF Time, tOFF Address Transition Time, tTRANS VS = ±4.5V, VNO or VNC = ±3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3 (See Figure 1) Break-Before-Make Time, tBBM VS = ±5.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 3) Full 2 7 - ns Latch Setup Time, tS (See Figure 4) 25 25 - - ns Full 35 - - ns 25 0 - - ns Full 0 - - ns 25 15 - - ns Full 25 - Latch Hold Time, tH (See Figure 4) Latch Pulse Width, tWPW (See Figure 4) ns Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2) 25 - 0.3 1 pC NO/NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 8) 25 - 3 - pF COM OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 8) ISL43681 25 - 21 - pF ISL43741 25 - 12 - pF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 8) ISL43681 25 - 26 - pF ISL43741 25 - 18 - pF 25 - 92 - dB 25 - ≤110 - dB 25 - -105 - dB Full ±2 - ±6 V Full -7 - 7 µA Full -1 - 1 µA COM ON Capacitance, CCOM(ON) OFF Isolation Crosstalk, (Note 8) (ISL43741 only) RL = 50Ω, CL = 15pF, f = 100kHz, VNOx = 1VRMS (See Figures 5, 7 and 20) All Hostile Crosstalk, (Note 8) (ISL43741 only) POWER SUPPLY CHARACTERISTICS Power Supply Range VS = ±5.5V, VINH, VADD = 0V or V+, Switch On or Off Positive Supply Current, I+ Negative Supply Current, INOTES: 3. VIN = Input logic voltage to configure the device in a given state. 4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 5. ∆RON = RON (MAX) - RON (MIN). 6. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. 7. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C. 8. Between any two switches. 4 FN6053.3 March 13, 2006 ISL43681, ISL43741 Electrical Specifications +12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEMP (°C) (NOTE 4) MIN TYP Full 0 - V+ V 25 - 37 45 Ω Full - - 55 Ω 25 - 1.2 2 Ω Full - - 2 Ω 25 - 5 7 Ω Full - - 7 Ω 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA Input Voltage High, VINH, VADDH Full 3.7 3.3 - V Input Voltage Low, VINL, VADDL Full - 2.7 0.8 V PARAMETER TEST CONDITIONS (NOTE 4) MAX UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V (See Figure 6) ON Resistance, RON RON Matching Between Channels, ∆RON V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V (Note 5) RON Flatness, RFLAT(ON) V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V (Note 6) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V (Note 7) COM OFF Leakage Current, ICOM(OFF) V+ = 13.2V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V (Note 7) COM ON Leakage Current, ICOM(ON) V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 1V, 12V, or floating (Note 7) DIGITAL INPUT CHARACTERISTICS Input Current, IADDH, IADDL, IENH, IENL V+ = 13.2V, VINH, VADD = 0V or V+ Full -0.5 - 0.5 µA Input Current, IENH, ILEH V+ = 13.2V, VINH, VADD = 0V or V+ Full -1.5 - 1.5 µA Input Current, IENL, ILEL V+ = 13.2V, VINH, VADD = 0V or V+ Full -4 - 4 µA V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 4 (See Figure 1) 25 - 24 40 ns Full - - 45 ns 25 - 15 30 ns Full - - 35 ns 25 - 27 50 ns Full - - 55 ns DYNAMIC CHARACTERISTICS Enable Turn-ON Time, tON V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 4 (See Figure 1) Enable Turn-OFF Time, tOFF Address Transition Time, tTRANS V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 4 (See Figure 1) Break-Before-Make Time Delay, tD V+ = 13.2V, RL = 300Ω, CL = 35pF, VNO or VNC = 10V, VIN = 0 to 4 (See Figure 3) Full 2 5 - ns Latch Setup Time, tS (See Figure 4) 25 25 - - ns Full 35 - - ns 25 0 - - ns Full 0 - - ns 25 15 - - ns Full 25 - - ns 25 - 2.7 5 pC Latch Hold Time, tH (See Figure 4) Latch Pulse Width, tWPW (See Figure 4) Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2) 5 FN6053.3 March 13, 2006 ISL43681, ISL43741 Electrical Specifications +12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) TEMP (°C) (NOTE 4) MIN TYP 25 - 92 - dB 25 - ≤110 - dB All Hostile Crosstalk, (Note 8) (ISL43741 only) 25 - -105 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 8) 25 - 3 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 8) ISL43681 25 - 21 - pF ISL43741 25 - 12 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 8) ISL43681 25 - 26 - pF ISL43741 25 - 18 - pF Full 2 - 12 V Full -7 - 7 µA Full -1 - 1 µA PARAMETER TEST CONDITIONS OFF Isolation Crosstalk, (Note 8), (ISL43741 only) RL = 50Ω, CL = 15pF, f = 100kHz (See Figure 5,7 and 20) (NOTE 4) MAX UNITS POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 13.2V, VINH, VADD = 0V or V+, all channels on or off Positive Supply Current, I- Electrical Specifications 5V Supply PARAMETER Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (°C) MIN (NOTE 4) TYP MAX (NOTE 4) UNITS Full 0 - V+ V 25 - 81 100 Ω Full - - 120 Ω 25 - 2.2 4 Ω Full - - 6 Ω ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V (See Figure 6) RON Matching Between Channels, ∆RON V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V (Note 5) RON Flatness, RFLAT(ON) V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V (Note 6) Full - 11.5 - Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V (Note 7) 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V (Note 7) 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA COM ON Leakage Current, ICOM(ON) V+ = 5.5V, VCOM = VNO or VNC = 4.5V (Note 7) 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA Input Voltage High, VINH, VADDH Full 2.4 - - V Input Voltage Low, VINL, VADDL Full - - 0.8 V DIGITAL INPUT CHARACTERISTICS Input Current, IADDH, IADDL, IENH, IENL V+ = 5.5V, VINH, VADD = 0V or V+ Full -0.5 - 0.5 µA Input Current, IENH, ILEH V+ = 5.5V, VINH, VADD = 0V or V+ Full -1.5 - 1.5 µA Input Current, IENL, ILEL V+ = 5.5V, VINH, VADD = 0V or V+ Full -4 - 4 µA 6 FN6053.3 March 13, 2006 ISL43681, ISL43741 Electrical Specifications 5V Supply Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (NOTE 4) TYP MAX (NOTE 4) UNITS 25 - 43 60 ns Full - - 70 ns 25 - 20 35 ns Full - - 40 ns 25 - 51 70 ns Full - - 85 ns DYNAMIC CHARACTERISTICS V+ = 4.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 1) Enable Turn-ON Time, tON Enable Turn-OFF Time, tOFF V+ = 4.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 1) Address Transition Time, tTRANS V+ = 4.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 1) Break-Before-Make Time, tBBM V+ = 5.5V, VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 3) Full 2 9 - ns Latch Setup Time, tS (See Figure 4) 25 25 - - ns Full 35 - - ns 25 0 - - ns Full 0 - - ns 25 15 - - ns Full 25 - - ns Latch Hold Time, tH (See Figure 4) Latch Pulse Width, tWPW (See Figure 4) Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2) 25 - 0.6 1.5 pC OFF Isolation RL = 50Ω, CL = 15pF, f = 100kHz, VNOx = 1VRMS (See Figures 5, 7 and 20) 25 - 92 - dB 25 - ≤110 - dB 25 - -105 1.5 dB Full 2 - 12 V Full -7 - 7 µA Full -1 - 1 µA Crosstalk, (Note 8), (ISL43741 only) All Hostile Crosstalk, (Note 8), (ISL43741 only) POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 5.5V, V- = 0V, VINH, VADD = 0V or V+, Switch On or Off Positive Supply Current, I- Electrical Specifications 3.3V Supply PARAMETER Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (°C) MIN (NOTE 4) TYP MAX (NOTE 4) UNITS Full 0 - V+ V 25 - 135 180 Ω Full - - 200 Ω 25 - 3.4 8 Ω Full - - 10 Ω ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON V+ = 3.0V, ICOM = 1.0mA, VNO or VNC = 1.5V (See Figure 6) RON Matching Between Channels, ∆RON V+ = 3.0V, ICOM = 1.0mA, VNO or VNC = 1.5V (Note 5) RON Flatness, RFLAT(ON) V+ = 3.0V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1V, 2V (Note 6) Full - 34 - Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 3.6V, VCOM = 0V, 4.5V, VNO or VNC = 3V, 1V (Note 7) 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA COM OFF Leakage Current, ICOM(OFF) V+ = 3.6V, VCOM = 0V, 4.5V, VNO or VNC = 3V, 1V (Note 7) 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA 7 FN6053.3 March 13, 2006 ISL43681, ISL43741 Electrical Specifications 3.3V Supply Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) TEMP (°C) MIN (NOTE 4) TYP 25 -0.1 0.002 0.1 nA Full -2.5 - 2.5 nA Input Voltage High, VINH, VADDH Full 2.4 - - V Input Voltage Low, VINL, VADDL Full - - 0.8 V PARAMETER TEST CONDITIONS COM ON Leakage Current, ICOM(ON) V+ = 3.6V, VCOM = VNO or VNC = 3V (Note 7) MAX (NOTE 4) UNITS DIGITAL INPUT CHARACTERISTICS Input Current, IADDH, IADDL, IENH, IENL V+ = 3.6V, VINH, VADD = 0V or V+ Full -0.5 - 0.5 µA Input Current, IENH, ILEH V+ = 3.6V, VINH, VADD = 0V or V+ Full -1.5 - 1.5 µA Input Current, IENL, ILEL V+ = 3.6V, VINH, VADD = 0V or V+ Full -4 - 4 µA V+ = 3.0V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 1) 25 - 82 100 ns Full - - 120 ns 25 - 37 50 ns Full - - 60 ns 25 - 96 120 ns Full - - 145 ns DYNAMIC CHARACTERISTICS Enable Turn-ON Time, tON V+ = 3.0V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 1) Enable Turn-OFF Time, tOFF Address Transition Time, tTRANS V+ = 3.0V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 1) Break-Before-Make Time, tBBM V+ = 3.6V, VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V (See Figure 3) Full 3 13 - ns Latch Setup Time, tS (See Figure 4) 25 50 - - ns Full 60 - - ns 25 0 - - ns Full 0 - - ns 25 30 - - ns Full 40 - - ns Latch Hold Time, tH (See Figure 4) Latch Pulse Width, tWPW (See Figure 4) Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2) 25 - 0.3 1 pC OFF Isolation RL = 50Ω, CL = 15pF, f = 100kHz, VNO or VNC = 1VRMS (See Figures 5, 7 and 20) 25 - 92 - dB 25 - ≤110 - dB 25 - -105 - dB Full 2 - 12 V Full -7 - 7 µA Full -1 - 1 µA Crosstalk, (Note 8), (ISL43741 only) All Hostile Crosstalk, (Note 8), (ISL43741 only) POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 3.6V, V- = 0V, VINH, VADD = 0V or V+, Switch On or Off Positive Supply Current, I- 8 FN6053.3 March 13, 2006 ISL43681, ISL43741 Test Circuits and Waveforms V+ C V- C C EN, LE NO0 V+ ISL43681 EN 3V LOGIC INPUT tr < 20ns tf < 20ns 50% VOUT COM NO1-NO7 GND ADDA-C CL 35pF RL 300Ω LOGIC INPUT 0V tON V+ VNO0 SWITCH OUTPUT 90% VOUT C C C 90% EN, LE NO0x 0V V+ tOFF ISL43741 NO1x-NO3x EN LOGIC INPUT Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. ENABLE tON/tOFF MEASUREMENT POINTS 9 V- COMx GND ADDA-B VOUT CL 35pF RL 300Ω Repeat test for other switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R L ( ON ) FIGURE 1B. ENABLE tON/tOFF TEST CIRCUIT FN6053.3 March 13, 2006 ISL43681, ISL43741 Test Circuits and Waveforms (Continued) V+ C NO0 EN, LE V+ V3V LOGIC INPUT 0V SWITCH OUTPUT ADDA-C GND EN VOUT V+ 90% C CL 35pF RL 300Ω LOGIC INPUT tTRANS VNO0 VOUT COM NO1-NO6 tr < 20ns tf < 20ns 50% C ISL43681 NO7 C V- C V- C C 0V NO0x EN, LE ISL43741 NO3x COMx NO1x-NO2x V+ 10% VNOX VC tTRANS ADDA-B GND VOUT EN LOGIC INPUT Logic input waveform is inverted for switches that have the opposite logic sense. CL 35pF RL 300Ω Repeat test for other switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R L ( ON ) FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT FIGURE 1. SWITCHING TIMES V+ V- C C 3V LOGIC INPUT OFF OFF ON RG 0V VOUT EN, LE COM NO or NC 0Ω SWITCH OUTPUT VOUT ∆VOUT ADDX VG GND EN LOGIC INPUT CL 1nF Q = ∆VOUT x CL FIGURE 2A. Q MEASUREMENT POINTS Repeat test for other switches. FIGURE 2B. Q TEST CIRCUIT FIGURE 2. CHARGE INJECTION 10 FN6053.3 March 13, 2006 ISL43681, ISL43741 Test Circuits and Waveforms (Continued) V+ V- C C C VOUT EN, LE COM CL 35pF RL 300Ω NO0-NO7 V+ ISL43681 ADDA-C tr < 20ns tf < 20ns 3V LOGIC INPUT LOGIC INPUT GND EN 0V V+ 80% SWITCH OUTPUT VOUT tBBM C C VOUT EN, LE 0V V- C COMx NO0x-NO3x V+ ISL43741 CL 35pF RL 300Ω ADDA-B LOGIC INPUT GND EN Repeat test for other switches. CL includes fixture and stray capacitance. FIGURE 3A. tBBM MEASUREMENT POINTS FIGURE 3B. tBBM TEST CIRCUIT FIGURE 3. BREAK-BEFORE-MAKE TIME 11 FN6053.3 March 13, 2006 ISL43681, ISL43741 Test Circuits and Waveforms (Continued) V+ V- C EN tr < 20ns tf < 20ns tMPW LOGIC INPUT LE 3V 50% 50% LE 50% 0V C V+ NO1-NO7 ADDA-C LOGIC INPUT C NO0 ISL43681 COM GND EN VOUT tH tS CL 35pF RL 300Ω LOGIC INPUT tH LOGIC INPUT ADDX 3V 50% V+ 50% V- C C C 0V tON, tOFF VNOX SWITCH OUTPUT 0V EN 90% VOUT ADDA-B LOGIC INPUT LE V+ NO1x-NO3x NO0x ISL43741 COM GND EN VOUT Logic input waveform is inverted for switches that have the opposite logic sense. CL 35pF RL 300Ω LOGIC INPUT Repeat test for other switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R L ( ON ) FIGURE 4B. LATCH tS, tH, tMPW TEST CIRCUIT FIGURE 4A. LATCH tS, tH, tMPW MEASUREMENT POINTS FIGURE 4. LATCH SETUP AND HOLD TIMES V+ SIGNAL GENERATOR C V- C V+ RON = V1/1mA EN, LE V- C C EN, LE NO or NC NO or NC VNX 0V or V+ 1mA ADDX 0V or V+ V1 ADDX 0V or V+ ANALYZER COM GND EN RL FIGURE 5. OFF ISOLATION TEST CIRCUIT 12 COM GND EN FIGURE 6. RON TEST CIRCUIT FN6053.3 March 13, 2006 ISL43681, ISL43741 Test Circuits and Waveforms V+ (Continued) C V- EN, LE SIGNAL GENERATOR V+ C 50Ω NOA or NCA V- C C EN, LE COMA NO or NC 0V or V+ ADDX ISL43741 0V or V+ NOB or NCB ANALYZER COMB GND ADDX IMPEDANCE ANALYZER N.C. COM GND EN EN RL FIGURE 7. CROSSTALK TEST CIRCUIT Detailed Description The ISL43681 and ISL43741 multiplexers offer precise switching capability from a bipolar ±2V to ±6V or a single 2V to 12V supply with low on-resistance (39Ω) and high speed operation (tON = 38ns, tOFF = 19ns) with dual 5V supplies. They have an inhibit and inhibit bar pin to simultaneously open all signal paths. They also have a latch bar pin to lock in the last switch address. The devices are especially well suited for applications using ±5V supplies. With ±5V supplies the performance (RON, Leakage, Charge Injection, etc.) is best in class. High frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection. Supply Sequencing And Overvoltage Protection With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see Figure 9). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1kΩ resistor in series with the input (see Figure 9). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. This method is not applicable for the signal path inputs. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal 13 FIGURE 8. CAPACITANCE TEST CIRCUIT diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 9). These additional diodes limit the analog signal from 1V below V+ to 1V above V-. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. OPTIONAL PROTECTION RESISTOR FOR LOGIC INPUTS OPTIONAL PROTECTION DIODE V+ 1kΩ LOGIC VNO or NC VCOM VOPTIONAL PROTECTION DIODE FIGURE 9. INPUT OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL43681 and ISL43741 construction is typical of most CMOS analog switches, in that they have three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL43681 and ISL43741 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (±6V or 12V single supply), as well as room for overshoot and noise spikes. This family of switches performs equally well when operated with bipolar or single voltage supplies.The minimum FN6053.3 March 13, 2006 ISL43681, ISL43741 recommended supply voltage is 2V or ±2V. It is important to note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance curves for details. V+ and GND power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals. Logic-Level Thresholds V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This switch family is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.7V to 10V. At 12V the VIH level is about 3.3V. This is still below the CMOS guaranteed high output minimum level of 4V, but noise margin is reduced. For best results with a 12V supply, use a logic family that provides a VOH greater than 4V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation. High-Frequency Performance In 50Ω systems, signal response is reasonably flat even past 100MHz (see Figures 18 and 19). Figures 18 and 19 also illustrates that the frequency response is very consistent over varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feed through from a switch’s input to its output. Off Isolation is the resistance to this feed through, while Crosstalk indicates the amount of feed through from one switch to another. Figure 20 details the high Off Isolation and Crosstalk rejection provided by this family. At 10MHz, Off Isolation is about 55dB in 50Ω systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance. Leakage Considerations Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND. Typical Performance Curves TA = 25°C, Unless Otherwise Specified 70 VCOM = (V+) - 1V ICOM = 1mA V- = -5V 60 85°C 40 25°C 30 -40°C 20 400 RON (Ω) RON (Ω) 50 V- = 0V 300 200 85°C 25°C 50 100 3 VS = ±2V 85°C 25°C -40°C VS = ±3V 85°C 25°C -40°C VS = ±5V 85°C 25°C 30 2 ICOM = 1mA 40 -40°C 0 120 110 100 90 80 70 60 50 90 80 70 60 50 40 30 60 4 5 6 7 V+ (V) 8 9 10 11 FIGURE 10. ON RESISTANCE vs SUPPLY VOLTAGE 14 12 20 -40°C -5 -4 -3 -2 -1 1 0 VCOM (V) 2 3 4 5 FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE FN6053.3 March 13, 2006 ISL43681, ISL43741 Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued) 225 200 50 25°C V+ = 2.7V V- = 0V -40°C 45 RON (Ω) RON (Ω) V- = 0V 85°C 125 100 85°C 25°C V+ = 3.3V -40°C V- = 0V 85°C 40 35 25°C 30 V+ = 5V 85°C V- = 0V 25 25°C -40°C 20 -40°C 1 0 3 2 5 4 0 2 4 6 VCOM (V) 12 200 VCOM = (V+) - 1V V- = -5V 400 25°C VCOM = (V+) - 1V V- = -5V -40°C 150 -40°C 300 25°C 100 25°C 200 25°C 50 100 85°C 85°C 0 250 tOFF (ns) tON (ns) 10 FIGURE 13. ON RESISTANCE vs SWITCH VOLTAGE 500 -40°C V- = 0V 200 85°C 150 -40°C 0 100 V- = 0V 80 85°C 60 25°C 100 25°C 40 20 50 -40°C -40°C 0 2 3 4 5 6 7 8 9 10 11 12 2 3 4 5 6 8 7 10 9 11 12 V+ (V) V+ (V) FIGURE 14. ENABLE TURN - ON TIME vs SUPPLY VOLTAGE FIGURE 15. ENABLE TURN - OFF TIME vs SUPPLY VOLTAGE 250 300 VCOM = (V+) - 1V VCOM = (V+) - 1V V- = 0V 250 200 tRANS (ns) 200 tRANS (ns) 8 VCOM (V) FIGURE 12. ON RESISTANCE vs SWITCH VOLTAGE 0 ICOM = 1mA V+ = 12V 55 175 150 75 160 140 120 100 80 60 100 90 80 70 60 50 40 60 ICOM = 1mA 150 150 100 25°C 100 85°C 25°C 50 85°C 50 -40°C -40°C 0 0 2 3 4 5 6 7 8 9 10 11 12 V+ (V) FIGURE 16. ADDRESS TRANS TIME vs SINGLE SUPPLY VOLTAGE 15 13 2 3 4 5 6 V± (V) FIGURE 17. ADDRESS TRANS TIME vs DUAL SUPPLY VOLTAGE FN6053.3 March 13, 2006 ISL43681, ISL43741 VIN = 0.2VP-P to 5VP-P GAIN ISL43741 0 ISL43681 -3 0 PHASE 45 ISL43681 90 ISL43741 135 180 VS = ±3V ISL43741 GAIN 0 ISL43681 -3 0 PHASE ISL43681 90 135 180 RL = 50Ω 10 100 600 1 10 600 FIGURE 19. FREQUENCY RESPONSE FIGURE 18. FREQUENCY RESPONSE -10 3 10 V+ = 3V to 12V or -20 VS = ±2V to ±5V RL = 50Ω -30 20 2 30 V+ = 3.3V V- = 0V 40 -50 50 -60 60 ISOLATION -70 70 CROSSTALK -90 80 90 -100 V+ = 12V V- = 0V 0 Q (pC) -40 OFF ISOLATION (dB) 1 -80 100 FREQUENCY (MHz) FREQUENCY (MHz) CROSSTALK (dB) 45 ISL43741 RL = 50Ω 1 VIN = 0.2VP-P to 4VP-P 3 PHASE (DEGREES) NORMALIZED GAIN (dB) VS = ±5V 3 PHASE (DEGREES) NORMALIZED GAIN (dB) Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued) V+ = 5V V- = 0V -1 VS = ±5V -2 -3 100 ALL HOSTILE CROSSTALK -110 1k 10k 100k 1M 10M 110 100M 500M FREQUENCY (Hz) FIGURE 20. CROSSTALK AND OFF ISOLATION -4 -5 -2.5 0 2.5 5 7.5 10 12 VCOM (V) FIGURE 21. CHARGE INJECTION vs SWITCH VOLTAGE Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): VTRANSISTOR COUNT: ISL43681: 193 ISL43741: 193 PROCESS: Si Gate CMOS 16 FN6053.3 March 13, 2006 ISL43681, ISL43741 Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) L20.4x4 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VGGD-1 ISSUE I) MILLIMETERS SYMBOL MIN NOMINAL MAX NOTES A 0.80 0.90 1.00 - A1 - 0.02 0.05 - A2 - 0.65 1.00 9 A3 b 0.20 REF 0.18 D 0.30 5, 8 4.00 BSC D1 D2 0.25 9 - 3.75 BSC 1.95 2.10 9 2.25 7, 8 E 4.00 BSC - E1 3.75 BSC 9 E2 1.95 e 2.10 2.25 7, 8 0.50 BSC - k 0.20 - - - L 0.35 0.60 0.75 8 N 20 2 Nd 5 3 Ne 5 3 P - - 0.60 θ - - 12 9 9 Rev. 2 11/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 17 FN6053.3 March 13, 2006