HS-5104ARH TM Data Sheet August 2001 Radiation Hardened Low Noise Quad Operational Amplifier tle 4A iad- se d raal plitho ds r- • Electrically Screened to SMD # 5962-95690 The HS-5104ARH is a radiation hardened, monolithic quad operational amplifier that provides highly reliable performance in harsh radiation environments. Its excellent noise characteristics coupled with an unique array of dynamic specifications make this amplifier well-suited for a variety of satellite system applications. Dielectrically isolated, bipolar processing makes this device immune to Single Event Latch-Up. The HS-5104ARH shows almost no change in offset voltage after exposure to 100kRAD(Si) gamma radiation, with only a minor increase in current. Complementing these specifications is a post radiation open loop gain in excess of 40K. This quad operational amplifier is available in an industry standard pinout, allowing for immediate interchangeability with most other quad operational amplifiers. • QML Qualified per MIL-PRF-38535 Requirements • Radiation Environment - Gamma Dose (γ) . . . . . . . . . . . . . . . . . 1 x 105RAD(Si) • Low Noise - At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . 4.3nV/√Hz (Typ) - At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . 0.6pA/√Hz (Typ) • Low Offset Voltage . . . . . . . . . . . . . . . . . . . . .3.0mV (Max) • High Slew Rate . . . . . . . . . . . . . . . . . . . . . . 2.0V/µs (Typ) • Gain Bandwidth Product . . . . . . . . . . . . . . . 8.0MHz (Typ) Applications • High Q, Active Filters • Voltage Regulators Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-95690. A “hot-link” is provided on our homepage for downloading. http://www.intersil.com pon, i- d, • Integrators • Signal Generators • Voltage References • Space Environments Ordering Information INTERNAL MKT. NUMBER TEMP. RANGE (oC) 5962R9569001V9A HS0-5104ARH-Q 25 5962R9569001VCC HS1-5104ARH-Q -55 to 125 5962R9569001VXC HS9-5104ARH-Q -55 to 125 HS1-5104ARH/PROTO HS1-5104ARH/PROTO -55 to 125 Pinouts HS-5104ARH (SBDIP) CDIP2-T14 TOP VIEW OUT 1 d, L, 3025.4 Features ORDERING NUMBER or, ia- File Number -IN1 +IN1 V+ 1 14 2 13 3 12 4 11 OUT 4 -IN4 +IN4 V- +IN2 5 10 +IN3 -IN2 6 9 -IN3 OUT 2 7 8 OUT 3 1 HS-5104ARH (FLATPACK) CDFP3-F14 TOP VIEW OUT 1 1 14 OUT 4 -IN1 2 13 -IN4 +IN1 3 12 +IN4 V+ 4 11 V- +IN2 5 10 +IN3 -IN2 6 9 -IN3 OUT 2 7 8 OUT 3 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2001, All Rights Reserved HS-5104ARH Burn-In Circuit Irradiation Circuit 1 2 R1 3 14 1 4 - - + + 4 +V D1 C1 6 - R4 + 12 11 R2 5 +15V 13 2 + -V 10 + - -15V R3 3 - 7 D2 C2 (ONE OF FOUR) 9 8 NOTES: 5. +V = 15V 6. -V = -15V 7. Group E Sample Size = 4 Die Per Wafer NOTES: 1. R1 = R2 = R3 = R4 = 1MW, 5%, 1/4W (Min) 2. C1 = C2 = 0.01µF/Socket (Min) or 0.1µF/Row (Min) 3. D1 = D2 = IN4002 or Equivalent/Board 4. |(V+) - (V-)| = 31V ±1V 2 HS-5104ARH Die Characteristics DIE DIMENSIONS: Backside Finish: 95 mils x 99 mils x 19 mils ±1 mils (2420µm x 2530µm x 483µm ±25.4µm) Silicon ASSEMBLY RELATED INFORMATION: INTERFACE MATERIALS: Substrate Potential (Powered Up): Glassivation: Unbiased Type: Nitride (SI3N4) over Silox (SIO2, 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 x 105 A/cm 2 Top Metallization: Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ Transistor Count: 175 Substrate: Bipolar Dielectric Isolation Metallization Mask Layout HS-5104ARH +IN2 V+ +IN1 -IN1 -IN2 OUT2 OUT1 OUT3 OUT4 -IN3 -IN4 +IN3 V- +IN4 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 3