RT6206A

®
RT6206A
5.5A, 18V, 650kHz, ACOTTM Synchronous Step-Down Converter
General Description
Features
The RT6206A is a synchronous step-down DC/DC converter
with Advanced Constant On-Time (ACOTTM) mode control.

It achieves high power density to deliver up to 5.5A output
current from a 4.5V to 18V input supply. The proprietary
ACOTTM mode offers an optimal transient response over a
wide range of loads and all kinds of ceramic capacitors,
which allows the device to adopt very low ESR output
capacitor for ensuring performance stabilization. In
addition, RT6206A keeps an excellent constant switching
frequency under line and load variation and the integrated
synchronous power switches with the ACOTTM mode
operation provides high efficiency in whole output current
load range. Cycle-by-cycle current limit provides an
accurate protection by a valley detection of low side
MOSFET and external soft-start setting eliminates input
current surge during startup. Protection functions include
thermal shutdown for RT6206A.

The RT6206A are available in the TSSOP-14 (Exposed
pad), SOP-8 (Exposed Pad) and WDFN-10L 3x3
packages.












ACOTTM Mode Enables Fast Transient Response
4.5V to 18V Input Voltage Range
5.5A Output Current
35mΩ
Ω Internal Low Side N-MOSFET
Advanced Constant On-Time Control
Support All Ceramic Capacitors
Up to 95% Efficiency
Adjustable Output Voltage from 0.765V to 8V
Adjustable Soft-Start
Cycle-by-Cycle Current Limit
Input Under-Voltage Lockout
Thermal Shutdown
RoHS Compliant and Halogen Free
Applications




Industrial and Commercial Low Power Systems
Computer Peripherals
LCD Monitors and TVs
Green Electronics/Appliances
Point of Load Regulation for High-Performance DSPs,
FPGAs, and ASICs
Simplified Application Circuit
RT6206A
VIN
VIN
VINR*
Enable
Power Good
EN
PGOOD*
VREG5
GND*
SW
VOUT
BOOT
FB
SS
PGND
* : VINR, GND pin for TSSOP-14 (Exposed Pad) only.
* : PGOOD pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6206A-02 July 2015
is a registered trademark of Richtek Technology Corporation.
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RT6206A
Ordering Information
Pin Configurations
RT6206A
(TOP VIEW)
Package Type
CP : TSSOP-14 (Exposed Pad)
EN
Lead Plating System
G : Green (Halogen Free and Pb Free)
FB
2
VREG5
3
SS
4
UVP Trim Operation
L : Latch-Off
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
QW : WDFN-10L 3x3 (W-Type)
PWM/PSM Mode
A : Force-PWM
BOOT
6
SW
5
PGND
10
9
1
2
3
4
5
PGND
EN
FB
VREG5
SS
PGOOD
RT6206A
8
7
6
11
VIN
VIN
BOOT
SW
SW
WDFN-10L 3x3
VOUT
FB
VREG5
SS
GND
PGOOD
EN
2
14
13
3
12
4
5
6
PGND
UVP Trim Operation
H : Hiccup
9
VIN
7
SOP-8 (Exposed Pad)
PWM/PSM Mode
A : Force-PWM
Lead Plating System
G : Green (Halogen Free and Pb Free)
PGND
8
11
10
15
7
9
8
VINR
VIN
BOOT
SW
SW
PGND
PGND
TSSOP-14 (Exposed Pad)
Note :
Richtek products are :

RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.

Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT6206AHGSP
RT6206AHGSP : Product Number
RT6206AH
GSPYMDNN
YMDNN : Date Code
RT6206AHGQW
5K= : Product Code
5K=YM
DNN
RT6206ALGP
RT6206AL
GCPYMDNN
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YMDNN : Date Code
RT6206ALGCP : Product Number
YMDNN : Date Code
is a registered trademark of Richtek Technology Corporation.
DS6206A-02 July 2015
RT6206A
Functional Pin Description
Pin No.
TSSOP-14
SOP-8
WDFN-10L 3x3
(Exposed Pad) (Exposed Pad)
1
--
--
Pin
Name
Pin Function
VOUT
Optional Output Voltage Discharge Connection. This
open drain output connects to ground when the
device is disabled. If output voltage discharge is
desired, connect VOUT to the output voltage.
2
2
2
FB
Feedback Voltage Input. It is used to regulate the
output of the converter to a set value via an external
resistive voltage divider. The feedback threshold
voltage is 0.765V typically.
3
3
3
VREG5
Internal Regulator Output. Connect a 1F capacitor
to GND to stabilize output voltage.
4
4
4
SS
Soft-Start Time Setting. Connect an external capacitor
between this pin and GND to set the soft- start time.
5
--
--
GND
Analog Ground.
6
--
5
PGOOD
Open Drain Power Good Indicator Output.
7
1
1
EN
Enable Control Input. A logic-high enables the
converter; a logic-low forces the IC into shutdown
mode reducing the supply current to less than 10A.
8, 9, 15
5, 9
11
PGND
(Exposed Pad) (Exposed Pad) (Exposed Pad)
10, 11
6
6, 7
12
7
8
13
8
9, 10
14
--
--
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6206A-02 July 2015
SW
BOOT
Power Ground. The exposed pad must be soldered
to a large PCB and connected to PGND for
maximum power dissipation.
Switch Node. Connect this pin to an external L-C
filter.
Bootstrap Supply for High Side Gate Driver. Connect
a 0.1F capacitor between the BOOT and SW pin.
VIN
Power Input. The input voltage range is from 4.5V to
18V. Must bypass with a suitably large ( 10F x 2)
ceramic capacitor.
VINR
Internal Linear Regulator Supply Input. For the
TSSOP-14 (Exposed Pad) package, VINR supplies
power for the internal linear regulator that powers
the IC. Connect VIN to the input voltage and bypass
to ground with a 0.1F ceramic capacitor.
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RT6206A
Function Block Diagram
VINR*
POR &
Reg
EN
VBIAS
BOOT
VREG5
Min.
Off-Time
VREG5
6µA
SS
VIN
FB
VIN
VREF
OC
UV & OV
VREG5
Control
SW
Driver
SW
PGND
ZC
Ripple
Gen.
FB
+
Comparator
GND*
Comparator
FB
-
0.9 x VREF
+
PGOOD*
On-Time
* : VINR, GND pin for TSSOP-14 (Exposed Pad) only.
* : PGOOD pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only.
Operation
The RT6206A is a synchronous step-down converter with
advanced constant on-time control mode. Using the
ACOTTM control mode can reduce the output capacitance
and provide fast transient response. It can minimize the
component size without additional external compensation
network.
UVLO Protection
To protect the chip from operating at insufficient supply
voltage, the UVLO is needed. When the input voltage of
VIN is lower than the UVLO falling threshold voltage, the
device will be latch-off.
Thermal Shutdown
Internal Regulator
The regulator provides 5V power to supply the internal
control circuit. Connecting a 1μF ceramic capacitor for
decoupling and stability is required.
Soft-Start
In order to prevent the converter output voltage from
overshooting during the startup period, the soft-start
function is necessary. The soft-start time is adjustable
and can be set by an external capacitor.
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When the junction temperature exceeds the OTP
threshold value, the IC will shut down the switching
operation. Once the junction temperature cools down and
is lower than the OTP lower threshold, the converter will
automatically resume switching
Power Good (for TSSOP-14 (Exposed Pad) and
WDFN-10L 3x3 only)
After soft-start is finished, the power good function will be
activated. When the FB is activated, the PGOOD will
become an open-drain output. If the FB is below, the
PGOOD pin will be pulled low.
is a registered trademark of Richtek Technology Corporation.
DS6206A-02 July 2015
RT6206A
Absolute Maximum Ratings





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


(Note 1)
Supply Voltage, VIN ----------------------------------------------------------------------------------------------Switch Voltage, SW ----------------------------------------------------------------------------------------------< 10ns ---------------------------------------------------------------------------------------------------------------BOOT to SW -------------------------------------------------------------------------------------------------------EN ---------------------------------------------------------------------------------------------------------------------Other Pins -----------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
TSSOP-14 (Exposed Pad) --------------------------------------------------------------------------------------SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------WDFN-10L 3x3 -----------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
TSSOP-14 (Exposed Pad), θJA --------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------WDFN-10L 3x3, θJA -----------------------------------------------------------------------------------------------WDFN-10L 3x3, θJC -----------------------------------------------------------------------------------------------Junction Temperature Range ------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------
Recommended Operating Conditions



−0.3V to 20V
−0.8V to (VIN + 0.3V)
−5V to 25V
−0.3V to 6V
−0.3V to 20V
−0.3V to 6V
2.5W
2.041W
1.667W
40°C/W
49°C/W
15°C/W
60°C/W
7.5°C/W
150°C
260°C
−65°C to 150°C
(Note 3)
Supply Voltage, VIN ----------------------------------------------------------------------------------------------- 4.5V to 18V
Junction Temperature Range ------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Current
Shutdown Current
ISHDN
VEN = 0V
--
1
10
A
Quiescent Current
IQ
VEN = 5V, VFB = 0.8V
--
1
1.3
mA
Logic-High
2
--
18
Logic-Low
--
--
0.4
Logic Threshold
EN Input Voltage
V
VFB Voltage
TA = 25C
0.757 0.765 0.773
TA = 40C to 85C
0.755
--
0.775
--
0.01
0.1
A
4.8
5.1
5.4
V
--
--
20
mV
Feedback Threshold Voltage
VFB
Feedback Input Current
IFB
VFB = 0.8V
VREG5
6V  VIN  18V, 0 < IVREG5  5mA
V
VREG5 Output
VREG5 Output Voltage
Line Regulation
6V  VIN  18V, IVREG5 = 5mA
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6206A-02 July 2015
is a registered trademark of Richtek Technology Corporation.
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RT6206A
Parameter
Symbol
Min
Typ
Max
Unit
0  IVREG5  5mA
--
--
100
mV
IVREG5
VIN = 6V, VREG5 = 4V, TA = 25C
--
70
--
mA
High-Side
RDS(ON)_H
(VBOOT  VSW ) = 5.5V
--
80
--
Low-Side
RDS(ON)_L
--
35
--
5.8
6.9
8.4
--
150
--
--
20
--
Load Regulation
Output Current
Test Conditions
RDS(ON)
Switch On
Resistance
m
Current Limit
Current Limit
ILIM
A
Thermal Shutdown
Thermal Shutdown Threshold
TSD
Shutdown Temperature
Thermal Shutdown Hysteresis TSD
C
On-Time Timer Control
On-Time
tON
VOUT = 1.05V
--
135
--
ns
Minimum Off-Time
tOFF(MIN)
VFB = 0.7V
--
260
310
ns
SS Charge Current
VSS = 0V
--
6
--
A
SS Discharge Current
VSS = 0.5V
0.1
0.2
--
mA
Wake Up VREG5
3.6
3.85
4.1
0.16
0.35
0.47
115
120
125
%
OVP Prop Delay
--
5
--
s
UVP Trip Threshold
65
70
75
UVP Hysteresis
--
10
--
UVP Prop Delay
--
250
--
s
Relative to Soft-Start Time
--
tSS
x 1.7
--
ms
VFB Rising
85
90
95
VFB Falling
--
85
--
2.5
5
--
Soft-Start
UVLO
UVLO Threshold
Hysteresis
V
Output Under Voltage and Over Voltage Protection
OVP Trip Threshold
UVP Enable Delay
OVP Detect
tUVPEN
%
Power Good
PGOOD Threshold
PGOOD Sink Current
PGOOD = 0.5V
%
mA
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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is a registered trademark of Richtek Technology Corporation.
DS6206A-02 July 2015
RT6206A
Typical Application Circuit
L1
1.4µH
RT6206A
VIN
C1
10µF x 2
C2
0.1µF
Input Signal
Power Good
VIN
SW
VINR*
EN
FB
PGOOD*
SS
R3
100k
C4
1µF
BOOT
C6
0.1µF
C5
3.3nF
VOUT
1.05V/5.5A
C3
R1
8.25k
C7
22µF x 2
R2
22k
VREG5
GND* PGND
* : VINR, GND pin for TSSOP-14 (Exposed Pad) only.
* : PGOOD pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only.
Table 1. Suggested Component Values (VIN = 12V)
VOUT (V)
R1 (k)
R2 (k)
C3 (pF)
L1 (H)
C7 (F)
1
6.81
22.1
--
1.4
22 to 68
1.05
8.25
22.1
--
1.4
22 to 68
1.2
12.7
22.1
--
1.4
22 to 68
1.8
30.1
22.1
5 to 22
2
22 to 68
2.5
49.9
22.1
5 to 22
2
22 to 68
3.3
73.2
22.1
5 to 22
2
22 to 68
5
124
22.1
5 to 22
3.3
22 to 68
7
180
22.1
5 to 22
3.3
22 to 68
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6206A-02 July 2015
is a registered trademark of Richtek Technology Corporation.
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RT6206A
Typical Operating Characteristics
Efficiency vs. Output Current
Output Voltage vs. Output Current
100
1.10
90
Output Voltage (V)
80
Efficiency (%)
1.09
VOUT = 5V
VOUT = 1.05V
70
60
50
40
30
20
1.08
1.07
1.06
1.05
1.04
1.03
1.02
10
1.01
VIN = 12V
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
VIN = 12V, VOUT = 1.05V, IOUT = 0A to 5.5A
1.00
6
0
0.5
1
1.5
Output Current (A)
Switching Frequency vs. Output Current
3
3.5
4
4.5
5
5.5
Switching Frequency vs. Temperature
700
Switching Frequency (kHz)1
700
Frequency (kHz)1
2.5
Output Current (A)
800
600
500
400
300
200
100
VIN = 12V, VOUT = 1.05V, IOUT = 0A to 5.5A
680
660
640
620
600
580
560
540
520
500
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-50
5.5
-25
0
Output Current (A)
0.775
0.790
Feedback Voltage (V)
0.800
0.765
0.760
0.755
0.750
0.745
VIN = 12V, VOUT = 0.765V, IOUT = 0.6A
0.740
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18
Input Voltage (V)
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8
50
75
100
125
Feedback Voltage vs. Temperature
0.780
0.770
25
Temperature (°C)
Feedback Voltage vs. Input Voltage
Feedback Voltage (V)
2
0.780
0.770
0.760
0.750
0.740
0.730
0.720
0.710
VIN = 12V, VOUT = 0.765V, IOUT = 0.6A
0.700
-50
-25
0
25
50
75
100
125
Temperature (°C)
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DS6206A-02 July 2015
RT6206A
Shutdown Current vs. Temperature
Quiescent Current vs. Temperature
1000
VIN = 12V, VOUT = 1.05V, IOUT = 0A
VIN = 12V, VOUT = 1.05V, IOUT = 0A
950
25
Quiescent Current (μA)
Shutdown Current (μA)1
30
20
15
10
5
900
850
800
750
700
650
0
600
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
Temperature (°C)
Temperature (°C)
Current Limit vs. Input Voltage
Output Ripple Voltage
100
125
9.0
Current Limit (A)
8.5
VOUT
(10mV/Div)
8.0
7.5
7.0
6.5
VSW
(5V/Div)
6.0
5.5
VIN = 12V, VOUT = 1.05V, IOUT = 5A
5.0
4
6
8
10
12
14
16
Time (500ns/Div)
18
Input Voltage (V)
Load Transient Response
Power On from VIN
VIN
(10V/Div)
VOUT
(20mV/Div)
VOUT
(0.5V/Div)
IOUT
(2A/Div)
VIN = 12V, VOUT = 1.05V, IOUT = 1A to 5A
Time (100μs/Div)
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DS6206A-02 July 2015
IOUT
(5A/Div)
VIN = 12V, VOUT = 1.05V, IOUT = 5A
Time (2.5ms/Div)
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RT6206A
Power Off from VIN
Power On from EN
VIN
(10V/Div)
VEN
(5V/Div)
VOUT
(0.5V/Div)
VOUT
(0.5V/Div)
IOUT
(5A/Div)
IOUT
(5A/Div)
VIN = 12V, VOUT = 1.05V, IOUT = 5A
VIN = 12V, VOUT = 1.05V, IOUT = 5A
Time (10ms/Div)
Time (500μs/Div)
EN Threshold Voltage vs. Temperature
Power Off from EN
EN Threshold Voltage (V)
1.4
VEN
(5V/Div)
VOUT
(0.5V/Div)
IOUT
(5A/Div)
1.3
Rising
1.2
1.1
1.0
0.9
Falling
0.8
0.7
0.6
VIN = 12V, VOUT = 1.05V, IOUT = 5A
Time (50μs/Div)
VIN = 12V, VOUT = 1.05V
0.5
-50
-25
0
25
50
75
100
125
Temperature (°C)
UVLO vs. Temperature
4.0
UVLO Voltage (V)
3.9
Rising
3.8
3.7
3.6
Falling
3.5
3.4
-50
-25
0
25
50
75
100
125
Temperature (°C)
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is a registered trademark of Richtek Technology Corporation.
DS6206A-02 July 2015
RT6206A
Application Information
The RT6206A is a synchronous high voltage Buck converter
that can support the input voltage range from 4.5V to 18V
and the output current up to 5.5A. It adopts ACOTTM mode
control to provide a very fast transient response with few
external compensation components.
on the device again. For external timing control, the EN
pin can also be externally pulled high by adding a REN
resistor and CEN capacitor from the VIN pin (see Figure 1).
EN
VIN
PWM Operation
It is suitable for low external component count
configuration with appropriate amount of Equivalent Series
Resistance (ESR) capacitors at the output. The output
ripple valley voltage is monitored at a feedback point
voltage. The synchronous high side MOSFET is turned
on at the beginning of each cycle. After the internal
on-time expires, the MOSFET is turned off. The pulse
width of this on-time is determined by the converter's input
and output voltages to keep the frequency fairly constant
over the entire input voltage range.
RT6206A
GND
Figure 1. External Timing Control
An external MOSFET can be added to implement digital
control on the EN pin when no system voltage above 2V
is available, as shown in Figure 2. In this case, a 100kΩ
pull-up resistor, REN, is connected between the VIN and
EN pins. MOSFET Q1 will be under logic control to pull
down the EN pin.
VIN
REN
100k
EN
Q1
EN
RT6206A
GND
Figure 2. Digital Enable Control Circuit
Soft-Start
The RT6206A contains an external soft-start clamp that
gradually raises the output voltage. The soft-start timing
can be programmed by the external capacitor between
the SS and GND pins. The chip provides a 6μA charge
current for the external capacitor. If a 3.9nF capacitor is
used, the soft-start will be 0.87ms (typ.). The available
capacitance range is from 2.7nF to 220nF.
t SS (ms) =
EN
CEN
Advanced Constant On-Time Control
The RT6206A has a unique circuit which sets the on-time
by monitoring the input voltage and SW signal. The circuit
ensures the switching frequency operating at 650kHz over
input voltage range and loading range.
REN
C5 (nF)  1.365
ISS ( A)
Chip Enable Operation
The EN pin is the chip enable input. Pulling the EN pin
low (<0.4V) will shut down the device. During shutdown
mode, the RT6206A's quiescent current drops to lower
than 10μA. Driving the EN pin high (>2V, <18V) will turn
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6206A-02 July 2015
To prevent enabling circuit when VIN is smaller than the
VOUT target value, a resistive voltage divider can be placed
between the input voltage and ground and connected to
the EN pin to adjust IC lockout threshold, as shown in
Figure 3. For example, if an 8V output voltage is regulated
from a 12V input voltage, the resistor REN2 can be selected
to set input lockout threshold larger than 8V.
VIN
REN1
REN2
EN
RT6206A
GND
Figure 3. Resistor Divider for Lockout Threshold Setting
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RT6206A
Output Voltage Setting
Latch off Mode UVP
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 4.
The Latch off Under-Voltage Protection(UVP) function is
provided for the TSSOP-14 (Exposed Pad) package. When
the protection function is triggered, the IC will shutdown
in Latch-Off Mode. The IC stops switching, leaving both
switches open, and is latched off. To restart operation,
toggle EN or power the IC off and then on again.
VOUT
R1
FB
RT6206A
R2
GND
Figure 4. Output Voltage Setting
The output voltage is set by an external resistive divider
according to the following equation. It is recommended to
use 1% tolerance or better divider resistors.
R1
VOUT = 0.765  (1
)
R2
Under Voltage Lockout Protection
The RT6206A has Under Voltage Lockout Protection
(UVLO) that monitors the voltage of VIN pin. When the
VIN voltage is lower than UVLO threshold voltage, the
RT6206A will be turned off in this state. This is non-latch
protection.
Over Temperature Protection
The RT6206A equips an Over Temperature Protection (OTP)
circuitry to prevent overheating due to excessive power
dissipation. The OTP will shut down switching operation
when junction temperature exceeds 150°C. Once the
junction temperature cools down by approximately 25°C
the main converter will resume operation. To keep operating
at maximum, the junction temperature should be prevented
from rising above 150°C.
Hiccup Mode UVP
A Hiccup Mode Under-Voltage Protection (UVP) function
is provided for the SOP-8 (Exposed Pad) and WDFN-10L
3x3 packages. When the FB voltage drops below half of
the feedback reference voltage, VFB, the UVP function
will be triggered and the RT6206A will shut down for a
period of time before recovering automatically. The Hiccup
Mode UVP can reduce input current in short-circuit
conditions.
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12
Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and an output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
V
V
IL =  OUT   1 OUT 
f

L
VIN 

 
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
highest efficiency operation. However, it requires a large
inductor to achieve this goal. For the ripple current
selection, the value of ΔIL = 0.2(IMAX) will be a reasonable
starting point. The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below the specified maximum, the inductor value should
be chosen according to the following equation :
 VOUT  
VOUT 
L =
  1  VIN(MAX) 
f
I


L(MAX)

 

Input and Output Capacitors Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
A low ESR input capacitor with larger ripple current rating
should be used for the maximum RMS current. The RMS
current is given by :
V
IRMS = IOUT(MAX) OUT
VIN
VIN
1
VOUT
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT / 2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. For the
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RT6206A
input capacitor, two 10μF and 0.1μF low ESR ceramic
capacitors are recommended.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
The output ripple, ΔVOUT , is determined by :
1

VOUT  IL ESR 
8fCOUT 

The output ripple will be highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may need to meet the ESR
and RMS current handling requirements.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. A sudden inrush of current through the long
wires can potentially cause a voltage spike at VIN large
enough to damage the part.
External Bootstrap Diode
Connect a 0.1μF low ESR ceramic capacitor between the
BOOT and SW pins. This capacitor provides the gate driver
voltage for the high side MOSFET. It is recommended to
add an external bootstrap diode between an external 5V
and the BOOT pin for efficiency improvement when input
voltage is lower than 5.5V or duty ratio is higher than 65%.
The bootstrap diode can be a low cost one such as 1N4148
or BAT54. The external 5V can be a 5V fixed input from
system or a 5V output of the RT6206A. Note that the
external boot voltage must be lower than 5.5V
BOOT
0.1µF
SW
Figure 5. External Bootstrap Diode
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6206A-02 July 2015
When the output shorts to ground, the inductor current
decays very slowly during a single switching cycle. An
over current detector is used to monitor inductor current
to prevent current runaway. The over current detector
monitors the voltage between SW and GND during the
low side MOS turn-on state. This is cycle-by-cycle
protection.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
TSSOP-14 (Exposed Pad) package, the thermal
resistance, θJA, is 40°C/W on a standard JEDEC 51-7
four-layer thermal test board. For SOP-8 (Exposed Pad)
package, the thermal resistance, θJA, is 49°C/W on a
standard JEDEC 51-7 four-layer thermal test board. For
WDFN-10L 3x3 package, the thermal resistance, θJA, is
60°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formulas :
P D(MAX) = (125°C − 25°C) / (40°C/W) = 2.5W for
TSSOP-14 (Exposed Pad) package
PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.041W for
SOP-8 (Exposed Pad) package
5V
RT6206A
Over Current Protection
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for
WDFN-10L 3x3 package
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curves in Figure 6 allow the
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13
RT6206A
Maximum Power Dissipation (W)1
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT6206A
Four-Layer PCB
TSSOP-14 (Exposed Pad)

Keep the traces of the main current paths as short and
wide as possible.

Put the input capacitor as close as possible to the device
pins (VIN and GND).

SW node is with high frequency voltage swing and
should be kept at small area. Keep sensitive
components away from the SW node to prevent stray
capacitive noise pickup.

Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT6206A FB pin.

The GND and Exposed Pad should be connected to a
strong ground plane for heat sinking and noise protection.
WDFN-10L 3x3
SOP-8 (Exposed Pad)
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 6. Derating Curve of Maximum Power Dissipation
The resistor divider must
be connected as close to
the device as possible.
VOUT
R1
C4
2
VREG5
3
SS
4
C5
SW should be connected to inductor by
Wide and short trace. Keep sensitive
VIN components away from this trace.
BOOT
C6
SW
L1
PGND
C7
8
FB
PGND
PGND
C2
EN
R2
Input capacitor must be placed
as close to the IC as possible.
C1
7
9
6
5
VOUT
Figure 7. PCB Layout Guide for SOP-8 (Exposed Pad) Package
Place the feedback components
as close to the FB as possible
for better regulation.
Place the input and output
capacitors as close to the
IC as possible.
VOUT
R1
C4
R2
EN
FB
VREG5
SS
PGOOD
1
2
3
4
5
PGND
PGND
PGND
11
10
9
8
7
6
C1
VIN
C6
VIN
BOOT
SW
SW
L1
C3
VOUT
SW should be connected to inductor by wide and short
trace. Keep sensitive components away from this trace.
Figure 8. PCB Layout Guide for WDFN-10L 3x3 Package
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14
is a registered trademark of Richtek Technology Corporation.
DS6206A-02 July 2015
RT6206A
Place the input and output
capacitors as close to the
IC as possible.
PGND
14
13
12
PGND
Place the feedback components
as close to the FB as possible
for better regulation.
VOUT
R1
VOUT
2
FB
3
VREG5
R2 C4
4
SS
5
GND
6
PGOOD
7
EN
11
10
15
9
8
VINR
VIN
BOOT
SW
SW
PGND
PGND
C1
C6
L1
VOUT
C7
SW should be connected to inductor by
Wide and short trace. Keep sensitive
components away from this trace.
Figure 9. PCB Layout Guide for TSSOP-14 (Exposed Pad) Package
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6206A-02 July 2015
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15
RT6206A
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
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16
is a registered trademark of Richtek Technology Corporation.
DS6206A-02 July 2015
RT6206A
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
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DS6206A-02 July 2015
is a registered trademark of Richtek Technology Corporation.
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17
RT6206A
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
1.000
1.200
0.039
0.047
A1
0.000
0.150
0.000
0.006
A2
0.800
1.050
0.031
0.041
b
0.190
0.300
0.007
0.012
D
4.900
5.100
0.193
0.201
e
0.650
0.026
E
6.300
6.500
0.248
0.256
E1
4.300
4.500
0.169
0.177
L
0.450
0.750
0.018
0.030
U
1.900
2.900
0.075
0.114
V
1.600
2.600
0.063
0.102
14-Lead TSSOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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DS6206A-02 July 2015