HS-117RH Data Sheet February 2000 Radiation Hardened Adjustable Positive Voltage Regulator The Radiation Hardened HS-117RH is an adjustable positive voltage linear regulator capable of operating up to 40VDC. The voltage is adjustable from 1.2V to 37V with two external resistors. The device is capable of sourcing from 50mA to 1.25APEAK (Min). Protection is provided by the on-chip thermal shutdown and output current limiting circuitry. The Intersil HS-117RH has advantages over other industry standard types, in that circuitry is incorporated to minimize the effects of radiation and temperature on device stability. Negligible low dose rate sensitivity is achieved through the use of vertical transistor geometries. Constructed with the Intersil dielectrically isolated Rad Hard Silicon Gate (RSG) process, the HS-117RH is immune to Single Event Latch-up and has been specifically designed to provide highly reliable performance in harsh radiation environments. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for the HS-117RH are contained in SMD 5962-99547. A “hot-link” is provided on our homepage for downloading. www.intersil.com/spacedefense/space.asp Pinout HS9S-117RH (TO-257AA FLANGE MOUNT) TOP VIEW 3 IN 2 OUT 1 ADJUST File Number 4560.4 Features • Electrically Screened to DSSC SMD # 5962-99547 • QML Qualified per MIL-PRF-38535 Requirements • Radiation Environment - 300kRAD(Si) (Max) - Latch-up Immune - Negligible Low Dose Rate Effects Sensitivity • Superior Temperature Stability • Over-Temp and Over-Current/Voltage Protection Applications • Switch Mode DC - DC Power Conversion • Housekeeping Supplies for Motors • Power Supplies for Robotic Control Ordering Information ORDERING NUMBER INTERNAL MKT. NUMBER TEMP. RANGE (oC) 5962F9954701VXC HS9S-117RH-Q -55 to 125 5962F9954701QXC HS9S-117RH-8 -55 to 125 5962F9954701/VYA HSYE-117RH-Q -55 to 125 5962F9954701/QYA HSYE-117RH-8 -55 to 125 HS9S-117RH/Proto HS9S-117RH/Proto -55 to 125 HSYE-117RH/Proto HSYE-117RH/Proto -55 to 125 HSYE-117RH (SMD.5 CLCC) BOTTOM VIEW 2 3 1 - ADJUST 2 - IN 3 - OUT 1 NOTE: No current JEDEC outline for the SMD.5 package. Refer to SMD for package dimensions. The TO-257 is a totally isolated metal package. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000 HS-117RH Die Characteristics Backside Finish: DIE DIMENSIONS Gold 2616µm x 2794µm (103 mils x 110 mils) 483µm ±25.4µm (19 mils ±1 mil) ASSEMBLY RELATED INFORMATION INTERFACE MATERIALS Substrate Potential: Glassivation: Unbiased (DI) Type: Silox (SiO2) Thickness: 8.0kÅ ±1.0kÅ ADDITIONAL INFORMATION Worst Case Current Density: Top Metallization: <2.0 x 105 A/cm2 Type: AlSiCu Thickness: 16.0kÅ ±2kÅ Transistor Count: 95 Substrate: Radiation Hardened Silicon Gate, Dielectric Isolation Metallization Mask Layout HS-117RH VIN VIN VOUT VOUT ADJ VOUTK All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com 2