AON7452 100V N-Channel MOSFET SDMOS TM General Description Product Summary The AON7452 is fabricated with SDMOSTM trench technology that combines excellent RDS(ON) with low gate charge and low Qrr.The result is outstanding efficiency with controlled switching behavior. This universal technology is well suited for PWM, load switching and general purpose applications. VDS 100V 5.5A ID (at VGS=10V) RDS(ON) (at VGS=10V) < 310mΩ RDS(ON) (at VGS=7V) < 370mΩ 100% UIS Tested 100% Rg Tested DFN 3x3 EP Top View D Bottom View Top View 1 8 2 7 3 6 4 5 G S Pin 1 Absolute Maximum Ratings TA=25°C unless otherwise noted Symbol Parameter Drain-Source Voltage VDS Gate-Source Voltage Continuous Drain Current VGS TC=25°C Pulsed Drain Current C Continuous Drain Current V A 12 2.5 IDSM TA=70°C ±25 3.5 IDM TA=25°C Units V 5.5 ID TC=100°C Maximum 100 A 2 Avalanche Current C IAS, IAR 2.5 A Avalanche energy L=0.1mH C TC=25°C EAS, EAR 0.3 mJ Power Dissipation B TA=25°C Power Dissipation A Junction and Storage Temperature Range Rev 1: April 2011 3.1 Steady-State Steady-State RθJA RθJC www.aosmd.com W 2 TJ, TSTG Symbol t ≤ 10s W 7 PDSM TA=70°C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Case 17 PD TC=100°C -55 to 150 Typ 30 60 6 °C Max 40 75 7.2 Units °C/W °C/W °C/W Page 1 of 7 AON7452 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V 100 Typ 10 Zero Gate Voltage Drain Current IGSS Gate-Body leakage current VGS(th) Gate Threshold Voltage VDS=VGS ID=250µA 3.3 ID(ON) On state drain current VGS=10V, VDS=5V 12 TJ=55°C 50 VDS=0V, VGS= ±25V 100 VGS=10V, ID=2.5A 4 404 485 VGS=7V, ID=2A 296 370 mΩ VDS=5V, ID=2.5A 3.5 1 V 15 A 185 pF Forward Transconductance VSD Diode Forward Voltage IS=1A,VGS=0V 0.8 IS Maximum Body-Diode Continuous Current TJ=125°C DYNAMIC PARAMETERS Ciss Input Capacitance Rg Gate resistance VGS=0V, VDS=50V, f=1MHz VGS=0V, VDS=0V, f=1MHz SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime V 310 gFS Reverse Transfer Capacitance nA 255 Static Drain-Source On-Resistance Output Capacitance 4.7 µA A RDS(ON) Coss Units V VDS=100V, VGS=0V IDSS Crss Max VGS=10V, VDS=50V, ID=2.5A mΩ S 125 155 20 28 36 pF 5 9 13 pF 1 2 3 Ω nC 2.4 3 4 1 1.3 1.6 nC 0.5 0.9 1.3 nC VGS=10V, VDS=50V, RL=20Ω, RGEN=3Ω 4 ns 4.5 ns 8.5 ns tf Turn-Off Fall Time trr Body Diode Reverse Recovery Time IF=2.5A, dI/dt=500A/µs 6.7 9.6 13 Qrr Body Diode Reverse Recovery Charge IF=2.5A, dI/dt=500A/µs 16 23 30 2 ns ns nC 2 A. The value of RθJA is measured with the device mounted on 1in FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA t ≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 150°C may be u sed if the PCB allows it. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g. G. The maximum current rating is package limited. H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev 1: April 2011 www.aosmd.com Page 2 of 7 AON7452 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 5 10 10V VDS=5V 4 8 7V 3 ID(A) ID (A) 6 6.5V 2 4 6V 125°C 1 2 25°C VGS=5.5V 0 0 0 1 2 3 4 VDS (Volts) Fig 1: On-Region Characteristics (Note E) 2 5 5 6 7 8 2 Normalized On-Resistance 600 RDS(ON) (mΩ ) 4 VGS(Volts) Figure 2: Transfer Characteristics (Note E) 800 VGS=7V 400 200 VGS=10V 0 VGS=10V ID=2.5A 1.8 1.6 17 5 VGS=7V 2 ID=2A 10 1.4 1.2 1 0.8 0 1 2 3 4 5 6 0 25 50 75 100 125 150 175 0 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature 18 (Note E) ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 550 1.0E+01 ID=2.5A 500 1.0E+00 40 450 1.0E-01 400 125°C 350 300 IS (A) RDS(ON) (mΩ ) 3 125°C 25°C 1.0E-02 1.0E-03 250 1.0E-04 200 25°C 1.0E-05 150 5 8 9 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) Rev 1: April 2011 6 7 www.aosmd.com 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) Page 3 of 7 AON7452 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 250 10 VDS=50V ID=2.5A 200 Ciss Capacitance (pF) VGS (Volts) 8 6 4 2 100 Coss 50 0 Crss 0 0 0.5 1 1.5 2 2.5 3 Qg (nC) Figure 7: Gate-Charge Characteristics 3.5 0 10 20 30 40 50 VDS (Volts) Figure 8: Capacitance Characteristics 60 200 100.0 10µs 10µs RDS(ON) limited 100µs 1.0 DC TJ(Max)=150°C TC=25°C 160 Power (W) 10.0 ID (Amps) 150 1ms 10ms 17 5 2 10 120 80 0.1 40 TJ(Max)=150°C TC=25°C 0.0 0.01 0.1 1 10 VDS (Volts) 100 1000 0 0.0001 0.001 0.01 0.1 1 0 10 Pulse Width (s) 18 Figure 10: Single Pulse Power Rating Junction-toCase (Note F) Figure 9: Maximum Forward Biased Safe Operating Area (Note F) Zθ JC Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 40 RθJC=7.2°C/W 1 0.1 PD Ton Single Pulse 0.01 0.00001 0.0001 0.001 0.01 0.1 T 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev 1: April 2011 www.aosmd.com Page 4 of 7 AON7452 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 20 6 Power Dissipation (W) 5 Current rating ID(A) 15 10 5 4 3 2 1 0 0 0 25 50 75 100 125 TCASE (°C) Figure 12: Power De-rating (Note F) 150 0 25 50 75 100 125 TCASE (°C) Figure 13: Current De-rating (Note F) 150 10000 TA=25°C Power (W) 1000 17 5 2 10 100 10 1 0.00001 0.001 0.1 0 18 10 Pulse Width (s) Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H) 1000 Zθ JA Normalized Transient Thermal Resistance 10 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 40 RθJA=75°C/W 0.1 PD 0.01 Single Pulse Ton T 0.001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 15: Normalized Maximum Transient Thermal Impedance (Note H) Rev 1: April 2011 www.aosmd.com Page 5 of 7 AON7452 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 14 di/dt=500A/µs 40 125ºC 12 25ºC 10 16 Qrr 20 6 15 25ºC 10 2 trr (ns) 8 0 4 6 125ºC 0 8 0 2 IS (A) Figure 16: Diode Reverse Recovery Charge and Peak Current vs. Conduction Current 50 4 25 8 15 2.5 Is=4A trr 125ºC 20 125ºC 20 10 1.5 S trr (ns) 15 25ºC Irm (A) Qrr (nC) Qrr 2 25ºC 10 30 0 6 IS (A) Figure 17: Diode Reverse Recovery Time and Softness Factor vs. Conduction Current Is=4A 40 0.5 25ºC S 0 2 1.5 4 2 125ºC 0 trr 8 1 4 Irm 5 25ºC 12 Irm (A) Qrr (nC) 25 125ºC 2.5 35 30 3 di/dt=500A/µs S 45 1 5 10 5 25ºC Irm 0 0 300 400 500 600 700 di/dt (A/µ µs) Figure 18: Diode Reverse Recovery Charge and Peak Current vs. di/dt Rev 1: April 2011 25ºC 125ºC 0.5 S 125º 0 300 0 400 500 600 700 di/dt (A/µ µs) Figure 19: Diode Reverse Recovery Time and Softness Factor vs. di/dt www.aosmd.com Page 6 of 7 AON7452 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds 90% + Vdd DUT Vgs VDC - Rg 10% Vgs Vgs t d(on) tr t d(off) t on tf toff Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 E AR = 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds Isd Vgs Ig Rev 1: April 2011 Vgs L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 7 of 7