EiceDRIVER™ 1ED020I12-F2 Single IGBT Driver IC Final Data Sheet Rev. 2.0, 2011-08-01 Asic & Power ICs Edition 2011-08-01 Published by Infineon Technologies AG 81726 Munich, Germany © 2011 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. EiceDRIVER™ 1ED020I12-F2 Revision History Page or Item Subjects (major changes since previous revision) Rev. 2.0, 2011-08-01 Trademarks of Infineon Technologies AG AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. 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TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2010-10-26 Final Data Sheet 3 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 3.1 3.2 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 4.1 4.2 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.4 4.5 4.6 4.6.1 4.6.2 4.6.3 4.7 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Driver Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 13 14 14 14 14 14 15 15 15 15 15 15 15 5 5.1 5.2 5.3 5.4 5.4.1 5.4.2 5.4.3 5.4.4 5.4.5 5.4.6 5.4.7 5.4.8 Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 17 17 18 18 19 20 20 21 21 22 22 6 Timing Diagramms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 8.1 8.2 Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Reference Layout for Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Printed Circuit Board Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Final Data Sheet 4 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Block Diagram 1ED020I12-F2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 PG-DSO-16-15 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Application Example Bipolar Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 DESAT Switch-Off Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Reference Layout for Thermal Data (Copper thickness 102 μm) . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Final Data Sheet 5 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 List of Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Final Data Sheet 6 10 16 17 17 18 19 20 20 21 21 22 23 Rev. 2.0, 2011-08-01 EiceDRIVER™ Single IGBT Driver IC 1 1ED020I12-F2 Overview Main Features • • • • • Single channel isolated IGBT Driver For 600V/1200 V IGBTs 2 A rail-to-rail output Vcesat-detection Active Miller Clamp Product Highlights • • • • Coreless transformer isolated driver Galvanic Insulation Integrated protection features Suitable for operation at high ambient temperature Typical Application • • • • AC and Brushless DC Motor Drives High Voltage DC/DC-Converter UPS-Systems Welding Description The 1ED020I12-F2 is a galvanic isolated single channel IGBT driver in PG-DSO-16-15 package that provides an output current capability of typically 2A. All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller. The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology. The 1ED020I12-F2 provides several protection features like IGBT desaturation protection, active Miller clamping and active shut down. Product Name Gate Drive Current Package 1ED020I12-F2 ±2 A PG-DSO-16-15 Final Data Sheet 7 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Overview Input Side Output Side VCC1 VCC2_H DESAT CLAMP EiceDRIVERTM IN+, IN-, /RST OUT 1ED020I12-F2 /FLT, RDY GND2 GND1 VEE2_H VCC1 VCC2_L CPU DESAT CLAMP IN+, IN-, /RST EiceDRIVERTM OUT 1ED020I12-F2 /FLT, RDY GND2 GND1 Figure 1 VEE2_L Typical Application Final Data Sheet 8 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Block Diagram 2 Block Diagram VCC1 15 UVLO UVLO & IN+ 10 K4 TX VCC2 7 CLAMP 6 OUT 4 NC 2 DESAT 3 GND2 2V delay delay 5 & RX 1 VCC1 IN- VCC2 11 & VCC1 RDY VEE2 12 /RDY DECODER RX TX ENCODER FLT2 & 1 VEE2 VCC2 VCC1 13 FLT 1 & K3 Q S R VCC1 14 & ≥1 & /RST RDY2 FLTNL /FLT delay 9V ≥1 RST 1 I3 2 VEE2 9 GND1 Figure 2 1 16 1ED020I12-F2 1 8 GND1 Block Diagram 1ED020I12-F2 Final Data Sheet 9 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Pin Configuration and FunctionalityPin Configuration 3 Pin Configuration and Functionality 3.1 Pin Configuration Table 1 Pin Configuration Pin No. Name Function 1 VEE2 Negative power supply output side 2 DESAT Desaturation protection 3 GND2 Signal ground output side 4 NC Not connected 5 VCC2 Positive power supply output side 6 OUT Driver output 7 CLAMP Miller clamping 8 VEE2 Negative power supply output side 9 GND1 Ground input side 10 IN+ Non inverted driver input 11 IN- Inverted driver input 12 RDY Ready output 13 FLT Fault output, low active 14 RST Reset input, low active 15 VCC1 Positive power supply input side 16 GND1 Ground input side Figure 3 1 VEE2 GND1 16 2 DESAT VCC1 15 3 GND2 /RST 14 4 NC /FLT 13 5 VCC2 RDY 12 6 OUT IN- 11 7 CLAMP IN+ 10 8 VEE2 GND1 9 PG-DSO-16-15 (top view) Final Data Sheet 10 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Pin Configuration and FunctionalityPin Functionality 3.2 Pin Functionality GND1 Ground connection of the input side. IN+ Non Inverting Driver Input IN+ control signal for the driver output if IN- is set to low. (The IGBT is on if IN+ = high and IN- = low) A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal Pull-Down-Resistor ensures IGBT Off-State. IN- Inverting Driver Input IN- control signal for driver output if IN+ is set to high. (IGBT is on if IN- = low and IN+ = high) A minimum pulse width is defined to make the IC robust against glitches at IN-. An internal Pull-Up-Resistor ensures IGBT Off-State. /RST Reset Input Function 1: Enable/shutdown of the input chip. (The IGBT is off if /RST = low). A minimum pulse width is defined to make the IC robust against glitches at /RST. Function 2: Resets the DESAT-FAULT-state of the chip if /RST is low for a time TRST. An internal Pull-Up-Resistor is used to ensure /FLT status output. /FLT Fault Output Open-drain output to report a desaturation error of the IGBT (FLT is low if desaturation occurs) RDY Ready Status Open-drain output to report the correct operation of the device (RDY = high if both chips are above the UVLO level and the internal chip transmission is faultless). VCC1 5 V power supply of the input chip VEE2 Negative power supply pins of the output chip. If no negative supply voltage is available, all VEE2 pins have to be connected to GND2. DESAT Desaturation Detection Input Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high, VCE is above a defined value and a certain blanking time has expired, the desaturation protection is activated and the IGBT is switched off. The blanking time is adjustable by an external capacitor. CLAMP Miller Clamping Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below 2 V below VEE2. Final Data Sheet 11 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Pin Configuration and FunctionalityPin Functionality GND2 Reference Ground Reference ground of the output chip. OUT Driver Output Output pin to drive an IGBT. The voltage is switched between VEE2 and VCC2. In normal operating mode Vout is controlled by IN+, IN- and /RST. During error mode (UVLO, internal error or DESAT) Vout is set to VEE2 independent of the input control signals. VCC2 Positive power supply pin of the output side. Final Data Sheet 12 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Functional DescriptionIntroduction 4 Functional Description 4.1 Introduction The 1ED020I12-F2 is an advanced IGBT dual gate driver that can be also used for driving power MOS devices. Control and protection functions are included to make possible the design of high reliability systems. The device consists of two galvanic separated parts. The input chip can be directly connected to a standard 5 V DSP or microcontroller with CMOS in/output and the output chip is connected to the high voltage side. The rail-to-rail driver outputs enables the user to provide easy clamping of the IGBTs gate voltage during short circuit of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be avoided. Further, a rail-to-rail output reduces power dissipation. The device also includes IGBT desaturation protection with FAULT status outputs. Two READY status outputs reports if the device is supplied and operates correctly. 10R 10k 10k +5V SGND VCC1 100n 1µ IN+ CLAMP OUT RDY FLT /RST Figure 4 Application Example Bipolar Supply 4.2 Supply 220p GND2 /FLT RST 10R NC IN- RDY 1k DESAT GND1 IN+ +15V VCC2 1µ VEE2 -8V The driver 1ED020I12-F2 is designed to support two different supply configurations, bipolar supply and unipolar supply. In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage of -8V at VEE2, please refer to Figure 4. Negative supply prevents a dynamic turn on due to the additional charge which is generated from IGBT input capacitance times negative supply voltage. If an appropriate negative supply voltage is used, connecting CLAMP to IGBT gate is redundant and therefore typically not necessary. For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2. Erratically dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output is directly connected to IGBT gate, please refer to Figure 5. Final Data Sheet 13 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Functional DescriptionInternal Protection Features 10R 10k 10k +5V VCC1 1µ 100n SGND +15V VCC2 1k DESAT GND1 CLAMP 10R IN+ IN+ OUT NC IN- RDY RDY FLT 220p GND2 /FLT RST /RST Figure 5 Application Example Unipolar Supply 4.3 Internal Protection Features 4.3.1 Undervoltage Lockout (UVLO) VEE2 To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for both chips, refer to Figure 9. If the power supply voltage VVCC1 of the input chip drops below VUVLOL1 a turn-off signal is sent to the output chip before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored as long as VVCC1 reaches the power-up voltage VUVLOH1. If the power supply voltage VVCC2 of the output chip goes down below VUVLOL2 the IGBT is switched off and signals from the input chip are ignored as long as VVCC2 reaches the power-up voltage VUVLOH2. VEE2 is not monitored, otherwise negative supply voltage range from 0 V to -12 V would not be possible. 4.3.2 READY Status Output The READY outputs shows the status of three internal protection features. • • • UVLO of the input chip UVLO of the output chip after a short delay Internal signal transmission after a short delay It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned protection signals. 4.3.3 Watchdog Timer During normal operation the internal signal transmission is monitored by a watchdog timer. If the transmission fails for a given time, the IGBT is switched off and the READY output reports an internal error. 4.3.4 Active Shut-Down The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power supply, IGBT gate is clamped at OUT to VEE2. Final Data Sheet 14 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Functional DescriptionNon-Inverting and Inverting Inputs 4.4 Non-Inverting and Inverting Inputs There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output while IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high, please see Figure 7. A minimum input pulse width is defined to filter occasional glitches. 4.5 Driver Outputs The output driver sections uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight control of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is stable. Due to the low internal voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor. Furthermore, it reduces the power to be dissipated by the driver. 4.6 External Protection Features 4.6.1 Desaturation Protection A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up and reaches 9 V, the output is driven low. Further, the FAULT output is activated, please refer to Figure 8. A programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a highly precise internal current source and an external capacitor. 4.6.2 Active Miller Clamp In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt situation. Therefore in many applications, the use of a negative supply voltage can be avoided. During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below typical 2 V (related to VEE2). The clamp is designed for a Miller current up to 2 A. 4.6.3 Short Circuit Clamping During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An additional protection circuit connected to OUT and CLAMP limits this voltage to a value slightly higher than the supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of this paths. If higher currents are expected or a tighter clamping is desired external Schottky diodes may be added. 4.7 RESET The reset inputs have two functions. Firstly, /RST is in charge of setting back the FAULT output. If /RST is low longer than a given time, /FLT will be cleared at the rising edge of /RST, refer to Figure 8; otherwise, it will remain unchanged. Moreover, it works as enable/shutdown of the input logic, refer to Figure 7. Final Data Sheet 15 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersAbsolute Maximum Ratings 5 Electrical Parameters 5.1 Absolute Maximum Ratings Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND1. Table 2 Absolute Maximum Ratings Parameter Symbol Values Min. Max. Unit Note / Test Condition Positive power supply output side VVCC2 -0.3 20 V 1) Negative power supply output side VVEE2 -12 0.3 V 1) Maximum power supply voltage output side (VVCC2 - VVEE2) Vmax2 – 28 V – Gate driver output VOUT VVEE2-0.3 Vmax2+0.3 V – Gate driver high output maximum current IOUT – 2.4 A t = 2 µs Gate & Clamp driver low output maximum current IOUT – 2.4 A t = 2 µs Maximum short circuit clamping time tCLP – 10 μs ICLAMP/OUT = 500 mA Positive power supply input side VVCC1 -0.3 6.5 V – Logic input voltages (IN+,IN-,RST) VLogicIN -0.3 6.5 V – Opendrain Logic output voltage (FLT) VFLT# -0.3 6.5 V – Opendrain Logic output voltage (RDY) VRDY -0.3 6.5 V – Opendrain Logic output current (FLT) IFLT# – 10 mA – Opendrain Logic output current (RDY) IRDY – 10 mA – Pin DESAT voltage VDESAT -0.3 VVCC2 V 1) V 3) +0.3 Pin CLAMP voltage VCLAMP -0.3 VVCC2 2) +0.3 Input to output isolation voltage (GND2) VISO -1200 1200 V Junction temperature TJ -40 150 °C – Storage temperature TS -55 150 °C – Power dissipation, per input part PD, IN – 100 mW 4) @TA = 25°C mW 4) @TA = 25°C K/W 4) @TA = 25°C @TA = 25°C Power dissipation, per output part Thermal resistance (Input part) PD, OUT RTHJA,IN – – 700 160 Thermal resistance (Output chip active) RTHJA,OUT – 125 K/W 4) ESD Capability VESD – 1 kV Human Body Model5) 1) With respect to GND2. Final Data Sheet 16 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersOperating Parameters 2) May be exceeded during short circuit clamping. 3) With respect to VEE2. 4) Output IC power dissipation is derated linearly at 8.5 mW/°C above 62°C. Input IC power dissipation does not require derating. See Figure 11 for reference layouts for these thermal data. Thermal performance may change significantly with layout and heat dissipation of components in close proximity. 5) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kΩ series resistor). 5.2 Operating Parameters Note: Within the operating range the IC operates as described in the functional description. Unless otherwise noted all parameters refer to GND1. Table 3 Operating Parameters Parameter Symbol Values Min. Max. Unit Note / Test Condition Positive power supply output side VVCC2 13 20 V 1) Negative power supply output side VVEE2 -12 0 V 1) Maximum power supply voltage output side (VVCC2 - VVEE2) Vmax2 – 28 V – Positive power supply input side VVCC1 4.5 5.5 V – Logic input voltages (IN+,IN-,RST) VLogicIN -0.3 5.5 V – Pin CLAMP voltage VCLAMP VVEE2-0.3 VVCC22) V – Pin DESAT voltage VDESAT -0.3 VVCC2 V 1) Pin TLSET voltage VTLSET -0.3 VVCC2 V 1) Ambient temperature TA -40 105 °C – Common mode transient immunity3) |DVISO/dt| – 50 kV/μs @ 500 V 1) With respect to GND2. 2) May be exceeded during short circuit clamping. 3) The parameter is not subject to production test - verified by design/characterization 5.3 Recommended Operating Parameters Note: Unless otherwise noted all parameters refer to GND1. Table 4 Recommended Operating Parameters Parameter Symbol Value Unit Note / Test Condition Positive power supply output side VVCC2 15 V 1) Negative power supply output side VVEE2 -8 V 1) Positive power supply input side VVCC1 5 V – 1) With respect to GND2. Final Data Sheet 17 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersElectrical Characteristics 5.4 Electrical Characteristics Note: The electrical characteristics include the spread of values in supply voltages, load and junction temperatures given below. Typical values represent the median values at TA = 25°C. Unless otherwise noted all voltages are given with respect to their respective GND (GND1 for pins 9 to 16, GND2 for pins 1 to 8). 5.4.1 Voltage Supply Table 5 Voltage Supply Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition UVLO Threshold Input Chip VUVLOH1 – 4.1 4.3 V – VUVLOH1 3.5 3.8 – V – UVLO Hysteresis Input Chip (VUVLOH1 - VUVLOL1) VHYS1 0.15 – – V – UVLO Threshold Output VUVLOH2 Chip V – 12.0 12.6 V – 10.4 11.0 – V – UVLO Hysteresis Output VHYS2 Chip (VUVLOH1 - VUVLOL1) 0.7 0.9 – V – – 7 9 mA VVCC1 = 5 V UVLOL2 Quiescent Current Input Chip IQ1 Quiescent Current Output Chip IQ2 IN+ = High, IN- = Low =>OUT = High, RDY = High, /FLT = High – 4 6 mA VVCC2 = 15 V VVEE2 = -8 V IN+ = High, IN- = Low =>OUT = High, RDY = High, /FLT = High Final Data Sheet 18 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersElectrical Characteristics 5.4.2 Logic Input and Output Table 6 Logic Input and Output Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. IN+,IN-, RST Low Input Voltage VIN+L, VIN-L, – – 1.5 V – IN+,IN-, RST High Input Voltage VIN+H, VIN-H, 3.5 – – V – VRSTL# VRSTH# IN-, RST Input Current IIN-, IRST# – 100 400 μA VIN- = GND1 VRST# = GND1 IN+ Input Current IIN+, – 100 400 μA VIN+ = VCC1 RDY,FLT Pull Up Current IPRDY, IPFLT# – 100 400 μA VRDY = GND1 VFLT# = GND1 Input Pulse Suppression IN+, IN- TMININ+, TMININ- 30 40 – ns – Input Pulse Suppression RST for ENABLE/SHUTDOWN TMINRST 30 40 – ns – Pulse Width RST for Reseting FLT TRST 800 – – ns – FLT Low Voltage VFLTL – – 300 mV ISINK(FLT#) = 5 mA RDY Low Voltage VRDYL – – 300 mV ISINK(RDY) = 5 mA Final Data Sheet 19 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersElectrical Characteristics 5.4.3 Gate Driver Table 7 Gate Driver Parameter Symbol High Level Output Voltage Values Typ. Max. VOUTH1 VCC2 -1.2 VCC2 -0.8 – V IOUTH = -20 mA VOUTH2 VCC2 -2.5 VCC2 -2.0 – V IOUTH = -200 mA VOUTH3 VCC2 -9 VCC2 -5 – V IOUTH = -1 A VCC2 -10 – V IOUTH = -2 A -1.5 -2.0 – A IN+ = High, IN- = Low; OUT = High VOUTL1 – VVEE2 +0.04 VVEE2+0.09 V IOUTL = 20 mA VOUTL2 – VVEE2 +0.3 VVEE2+0.85 V IOUTL = 200 mA VOUTL3 – VVEE2 +2.1 VVEE2+5 V IOUTL = 1 A VOUTL4 – VVEE2 +7 – V IOUTL = 2 A 1.5 2.0 – A IN+ = Low, IN- = Low; OUT = Low, VVCC2 = 15 V, VVEE2 = -8 V High Level Output Peak IOUTH Current Low Level Output Peak IOUTL Current 5.4.4 Active Miller Clamp Table 8 Active Miller Clamp Parameter Note / Test Condition Min. VOUTH4 Low Level Output Voltage Unit Symbol Values Unit Note / Test Condition Min. Typ. Max. VCLAMPL1 – VVEE2+0.03 VVEE2 +0.08 V IOUTL = 20 mA VCLAMPL2 – VVEE2+0.3 VVEE2 +0.8 V IOUTL = 200 mA VCLAMPL3 – VVEE2+1.9 VVEE2 +4.8 V IOUTL = 1 A Low Level Clamp Current ICLAMPL 2 – – A 1) Clamp Threshold Voltage VCLAMP 1.6 2.1 2.4 V Related to VEE2 Low Level Clamp Voltage 1) The parameter is not subject to production test - verified by design/characterization Final Data Sheet 20 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersElectrical Characteristics 5.4.5 Short Circuit Clamping Table 9 Short Circuit Clamping Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. – 0.8 1.3 V IN+ = High, IN- = Low, OUT = High IOUT = 500 mA pulse test, tCLPmax = 10 μs) Clamping voltage VCLPclamp (CLAMP) (VVCLAMP-VVCC2) – 1.3 – V IN+ = High, IN- = Low, OUT = High ICLAMP = 500 mA (pulse test, tCLPmax = 10 μs) VCLPclamp – 0.7 1.1 V IN+ = High, IN- = Low, OUT = High ICLAMP = 20 mA Clamping voltage (OUT) (VOUT - VVCC2) Clamping voltage (CLAMP) 5.4.6 VCLPout Dynamic Characteristics Dynamic characteristics are measured with VVCC1 = 5 V, VVCC2 = 15 V and VVEE2 = -8 V. Table 10 Dynamic Characteristics Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition CLOAD = 100 pF VIN+ = 50%, VOUT=50% @ 25°C Input IN to output propagation delay ON TPDON 145 170 195 ns Input IN to output propagation delay OFF TPDOFF 145 165 190 ns Input IN to output propagation delay distortion (TPDOFF - TPDON) TPDISTO -35 -5 25 ns IN input to output propagation delay ON variation due to temp TPDONt – – 25 ns 1) IN input to output propagation delay OFF variation due to temp TPDONt – – 35 μs 1) – – 20 ns 1) IN input to output TPDISTOt propagation delay distortion variation due to temp (TPDOFF-TPDON) Final Data Sheet 21 CLOAD = 100 pF VIN+ = 50%, VOUT=50% CLOAD = 100 pF VIN+ = 50%, VOUT=50% CLOAD = 100 pF VIN+ = 50%, VOUT=50% Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersElectrical Characteristics Table 10 Dynamic Characteristics (cont’d) Parameter Symbol TRISE Rise Time TFALL Fall Time Values Unit Note / Test Condition Min. Typ. Max. 10 30 60 ns CLOAD = 1 nF VL 10%, VH 90% 200 400 800 ns CLOAD = 34 nF VL 10%, VH 90% 10 50 90 ns CLOAD = 1 nF VL 10%, VH 90% 200 350 600 ns CLOAD = 34 nF VL 10%, VH 90% Unit Note / Test Condition 1) The parameter is not subject to production test - verified by design/characterization 5.4.7 Desaturation Protection Table 11 Desaturation Protection Parameter Symbol Values Min. Typ. Max. Blanking Capacitor Charge Current IDESATC 450 500 550 μA VVCC2 =15 V, VVEE2=- 8 V VDESAT = 2 V Blanking Capacitor Discharge Current IDESATD 9 14 – mA VVCC2 =15 V, VVEE2 = -8 V VDESAT = 6 V Desaturation Reference VDESAT Level 8.3 9 9.5 V VVCC2 = 15 V Desaturation Filter Time TDESATleb – 250 – ns VVCC2 = 15 V, VVEE2 = -8 V VDESAT = 9 V Desaturation Sense to OUT Low Delay TDESATOUT – 350 430 ns VOUT = 90% CLOAD = 1 nF Desaturation Sense to FLT Low Delay TDESATFLT – – 2.25 μs VFLT# = 10%; IFLT # = 5 mA Desaturation Low Voltage VDESATL 0.4 0.6 0.95 V IN+ = Low, IN- = Low, OUT = Low Leading edge blanking TDESATleb – 400 – ns Not subject of production test 5.4.8 Active Shut Down Final Data Sheet 22 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Electrical ParametersElectrical Characteristics Table 12 Active Shut Down Parameter Symbol Active Shut Down Voltage V 1) ACTSD Values Min. Typ. Max. – – 2.0 Unit Note / Test Condition V IOUT = -200 mA, VCC2 open 1) With reference to VEE2 Final Data Sheet 23 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Timing DiagrammsElectrical Characteristics 6 Timing Diagramms 50% IN+ 90% 50% 10% OUT TPDON Figure 6 TRISE TPDOFF TFALL Propagation Delay, Rise and Fall Time IN+ IN/RST OUT Figure 7 Typical Switching Behavior Final Data Sheet 24 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Timing DiagrammsElectrical Characteristics IN+ TPDON TPDON OUT TPDOFF TDESATfilter TDESATOUT VDESAT typ. 9V TDESATleb TDESATleb DESAT blanking time /FLT TDESATFLT /RST >TRSTmin Figure 8 DESAT Switch-Off Behavior ESD diode conduction IN+ VUVLOH1 VUVLOL1 VCC1 VUVLOH2 VUVLOL2 VCC2 OUT RDY /FLT /RST Figure 9 UVLO Behavior Final Data Sheet 25 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Package OutlinesElectrical Characteristics 7 Package Outlines Figure 10 PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package) Final Data Sheet 26 Rev. 2.0, 2011-08-01 EiceDRIVER™ 1ED020I12-F2 Application NotesReference Layout for Thermal Data 8 Application Notes 8.1 Reference Layout for Thermal Data The PCB layout shown in Figure 11 represents the reference layout used for the thermal characterisation. Pins 9 and 16 (GND1) and pins 1 and 8 (VEE2) require ground plane connections for achiving maximum power dissipation. The 1ED020I12-F2 is conceived to dissipate most of the heat generated through this pins. Top Layer Bottom Layer Figure 11 Reference Layout for Thermal Data (Copper thickness 102 μm) 8.2 Printed Circuit Board Guidelines Following factors should be taken into account for an optimum PCB layout. • • • • Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits. The same minimum distance between two adjacent high-side isolated parts of the PCB should be maintained to increase the effective isolation and reduce parasitic coupling. In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be kept as short as possible. Lowest trace length for VEE2 to GND2 decoupling could be achieved with capacitor closed to pins 1 and 3. Final Data Sheet 27 Rev. 2.0, 2011-08-01 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG