TI TPS65161

TPS65161
www.ti.com
SLVS617 – APRIL 2006
BIAS POWER SUPPLY FOR TV AND MONITOR TFT LCD PANELS
•
•
•
•
•
•
FEATURES
•
•
•
•
•
•
•
•
8-V to 14-V Input Voltage Range
VS Output Voltage Range up to 19 V
1% Accurate Boost Converter With 2.8-A
Switch Current
1.5% accurate 2.3-A Step-Down Converter
500-kHz/750-kHz Fixed Switching Frequency
Negative Charge Pump Driver for VGL
Positive Charge Pump Driver for VGH
Adjustable Sequencing for VGL, VGH
Gate Drive Signal to Drive External MOSFET
Internal and Adjustable Soft Start
Short-Circuit Protection
Overvoltage Protection
Thermal Shutdown
Available in TSSOP-28 Package
APPLICATIONS
•
TFT LCD Displays for Monitor and LCD TV
DESCRIPTION
The TPS65161 offers a compact power supply solution to provide all four voltages required by thin-film transistor
(TFT) LCD panel. With its high current capabilities, the device is ideal for large screen monitor panels and LCD
TV applications.
TYPICAL APPLICATION
C1
2 * 22 μF
VGL
−5 V/50 mA
C16
1 μF
8
12
20
21
22
C6
0.47 μF
D2
AVIN
EN1
EN2
DRN
FBN
REF
PGND
PGND
28
SS
25
DLY1
R3
620 kΩ
R4
150 kΩ
C8
220 nF
16
9
11
13
24
6
7
SUP
FREQ
VINB
VINB
C9
22 nF
C10
10 nF
SW
SW
FB
OS
GND
GD
DRP
FBP
Boot
SWB
NC
FBB
COMP
DLY2
C11
10 nF
4
5
1
3
23
27
Vs
18 V/1.3 A
C4
22 pF
TPS65161
C3
1 μF
D3
C7
0.47 μF
D1
SL22
L1
10 μH
Vin
12 V
R1
825 kΩ
C15
470 nF
C2
3 * 22 μF
R2
56 kΩ
D4
GD
10
14
17
18
19
15
C5
D5
0.47 μF
VGH
32 V/50 mA
R5
560 kΩ
2
26
Cb
100 nF
C17
22 nF
C13
0.47 μF
R6
22 kΩ
Vlogic
3.3 V/2.3 A
L2
15 μH
D6
SL22
R7
2 kΩ
C14
10 nF
C12
2 * 22 μF
R8
1.2 kΩ
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
TPS65161
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SLVS617 – APRIL 2006
DESCRIPTION (CONTINUED)
Compared to the TPS65160 and TPS65160A the device offers a higher output current for the step down
converter and allows to connect the positive charge pump supply (SUP) always to the output. Therefore in most
applications a simple charge pump doubler can generates VGH reducing external component count. The device
can be powered directly from a 12-V input voltage generating the bias voltages VGH and VGL, as well as the
source voltage VS and logic voltage for the LCD panels. The device consists of a boost converter to provide the
source voltage VS and a step-down converter to provide the logic voltage for the system. A positive and a
negative charge-pump driver provide adjustable regulated output voltages VGL and VGH to bias the TFT. Both
boost and step-down converters, as well as the charge-pump driver, operate with a fixed switching frequency of
500 kHz or 750 kHz, selectable by the FREQ pin. The TPS65161 includes adjustable power-on sequencing. The
device includes safety features like overvoltage protection of the boost converter and short-circuit protection of
the buck converter, as well as thermal shutdown. Additionally, the device incorporates a gate drive signal to
control an isolation MOSFET switch in series with VS or VGH. See the application circuits at the end of this data
sheet.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
(1)
TA
UVLO
(typ)
OVERVOLTAGE
PROTECTION
Vs (typ)
ORDERING
PACKAGE (2)
PACKAGE
MARKING
–40°C to 85°C
6V
20 V
TPS65161PWP
TSSOP28 (PWP)
TPS65161
(1)For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web
site at www.ti.com.
(2) The PWP package is available taped and reeled. Add R-suffix to the device type (TPS65161PWPR) to order the device taped and
reeled. The TPS65161PWPR package has quantities of 2000 devices per reel. Without suffix, the TPS65161PWP is shipped in tubes
with 50 devices per tube.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (3)
UNIT
Voltages on pin VIN (4)
–0.3 V to 16.5 V
Voltages on pin EN1, EN2, FREQ (2)
Voltage on pin SW
–0.3 V to 15 V
(2)
25 V
Voltage on pin SWB (2)
20 V
Voltages on pin OS, SUP, GD (2)
25 V
Continuous power dissipation
See Dissipation Rating Table
TA
Operating junction temperature
–40°C to 150°C
Tstg
Storage temperature range
–65°C to 150°C
Temperature (soldering, 10 s)
(3)
(4)
260°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
(5)
2
PACKAGE
RTHJA
TA ≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
28-Pin TSSOP
28°C/W (PowerPAD (5) soldered)
3.57 W
1.96 W
1.42 W
See Texas Instruments application report SLMA002 regarding thermal characteristics of the PowerPAD package.
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SLVS617 – APRIL 2006
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
Output voltage range of the main boost converter (6)
VS
Input capacitor at VINB
CIN
Input capacitor AVIN
L
VLOGIC
CO
UNIT
19
µF
1
µF
Inductor boost converter (7)
10
Inductor buck converter (2)
15
Output voltage range of the step-down converter VLOGIC
V
2x22
µH
1.8
5.0
Output capacitor boost converter
3x22
Output capacitor buck converter
2x22
V
µF
TA
Operating ambient temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
(6)
(7)
The maximum output voltage is limited by the overvoltage protection threshold and not be the maximum switch voltage rating.
See application section for further information.
ELECTRICAL CHARACTERISTICS
VIN = 12 V, SUP = VIN, EN1 = EN2 = VIN, VS = 15 V, VLOGIC = 3.3 V, TA = –40°C to 85°C, typical values are at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
Input voltage range
8
14
V
0.2
2
Quiescent current into AVIN
VGH = 2 x VS,
Boost converter not
switching
0.2
0.5
Quiescent current into VINB
VGH = 2 x VS,
Buck converter not
switching
Shutdown current into AVIN
EN1 = EN2 = GND
0.1
2
Shutdown current into VINB
EN1 = EN2 = GND
0.1
2
Shutdown current into SUP
EN1 = EN2 = GND
0.1
4
µA
Quiescent current into SUP
VGH = 2 x VS
0.2
2
mA
VUVLO
Undervoltage lockout threshold
VIN falling
VREF
Reference voltage
IQIN
ISD
ISUP
Thermal shutdown
1.203
Temperature rising
Thermal shutdown hysteresis
6
6.4
1.213
1.223
mA
µA
V
V
155
°C
5
°C
LOGIC SIGNALS EN1, EN2, FREQ
VIH
High-level input voltage EN1, EN2
VIL
Low-level input voltage EN1, EN2
VIH
High-level input voltage FREQ
VIL
Low-level input voltage FREQ
II
Input leakage current
2.0
V
0.8
1.7
V
V
0.4
V
0.01
0.1
µA
3.3
4.8
6.2
µA
3.3
4.8
6.2
µA
6
9
12
µA
FREQ = high
600
750
900
FREQ = low
400
500
600
EN1 = EN2 = FREQ =
GND or VIN
CONTROL AND SOFT START DLY1, DLY2, SS
IDLY1
Delay1 charge current
IDLY2
Delay2 charge current
ISS
SS charge current
VTHRESHOLD = 1.213 V
INTERNAL OSCILLATOR
fOSC
Oscillator frequency
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SLVS617 – APRIL 2006
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12 V, SUP = VIN, EN1 = EN2 = VIN, VS = 15 V, VLOGIC = 3.3 V, TA = –40°C to 85°C, typical values are at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.136
1.146
1.156
V
10
100
nA
BOOST CONVERTER (VS)
VS
Output voltage range (8)
VFB
Feedback regulation voltage
IFB
Feedback input bias current
rDS(ON)
19
V
N-MOSFET on-resistance (Q1)
ISW = 500 mA
100
185
mΩ
P-MOSFET on-resistance (Q2)
ISW = 200 mA
10
16
Ω
1
A
IMAX
Maximum P-MOSFET peak switch current
ILIM
N-MOSFET switch current limit (Q1)
Ileak
Switch leakage current
VSW = 15 V
Vovp
Overvoltage protection
VOUT rising
Line regulation
10.6 V ≤ Vin ≤ 11.6 V
at 1 mA
2.8
3.5
4.2
A
1
10
µA
19.5
20
21
Load regulation
V
0.0008
%/V
0.03
%/A
GATE DRIVE (GD)
VGD
Gate drive threshold (9)
VFB rising
VOL
GD output low voltage
I(sink) = 500 µA
GD output leakage current
VGD = 20 V
Vs-12%
Vs-8%
Vs-4%
V
0.3
V
0.05
1
µA
5
V
1.213
1.231
V
10
100
nA
175
300
mΩ
3.2
3.9
A
1
10
µA
STEP-DOWN CONVERTER (VLOGIC)
VLOGIC
Output voltage range
VFBB
Feedback regulation voltage
1.8
IFBB
Feedback input bias current
rDS(ON)
N-MOSFET on-resistance (Q1)
ILIM
N-MOSFET switch current limit (Q1)
Ileak
Switch leakage current
VSW = 0 V
Line regulation
10.6 V ≤ VIN≤ 11.6 V
at 1 mA
1.195
ISW = 500 mA
2.5
Load regulation
(8)
(9)
4
0.0018
%/V
0.037
%/A
The maximum output voltage is limited by the overvoltage protection threshold and not be the maximum switch voltage rating.
The GD signal is latched low when the main boost converter output VS is within regulation. The GD signal is reset when the input
voltage or enable of the boost converter is cycled low.
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SLVS617 – APRIL 2006
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12 V, SUP = VIN, EN1 = EN2 = VIN, VS = 15 V, VLOGIC = 3.3 V, TA = –40°C to 85°C, typical values are at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
–2
V
–36
0
36
mV
10
100
nA
NEGATIVE CHARGE-PUMP VGL
VGL
Output voltage range
VFBN
Feedback regulation voltage
IFBN
Feedback input bias current
rDS(ON)
Q4 P-Channel switch rDS(ON)
VDropN
Current sink voltage drop
(10)
Ω
IOUT = 20 mA
4.4
IDRN = 50 mA,
VFBN = VFBNnominal –5%
130
190
IDRN = 100 mA,
VFBN = VFBNnominal –5%
270
420
1.213
1.238
V
10
100
nA
mV
POSITIVE CHARGE-PUMP OUTPUT VGH
VFBP
Feedback regulation voltage
IFBP
Feedback input bias current
rDS(ON)
Q3 N-Channel switch rDS(ON)
VDropP
1.187
Current source voltage drop
(Vsup – VDRP) (3)
Ω
IOUT = 20 mA
1.1
IDRP = 50 mA,
VFBP = VFBPnominal –5%
400
680
IDRP = 100 mA,
VFBP = VFBPnominal –5%
850
1600
mV
(10) The maximum charge-pump output current is typically half the drive current of the internal current source or current sink.
1
28
SS
COMP
2
27
GD
OS
3
26
DLY2
SW
4
25
DLY1
SW
5
24
REF
PGND
6
23
GND
PGND
7
22
AVIN
SUP
8
21
VINB
EN2
9
20
VINB
DRP
10
19
NC
DRN
11
18
SWB
FREQ
12
17
BOOT
FBN
13
16
EN1
FBP
14
15
FBB
Thermal PAD (see Note)
FB
NOTE: The thermally enhanced PowerPAD™ is connected to PGND.
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TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
DESCRIPTION
SUP
8
I
This is the supply pin of the positive charge pump driver and can be connected to the input supply Vin or the
output of the main boost converter Vs. This depends mainly on the desired output voltage VGH and numbers of
charge pump stages.
FREQ
12
I
Frequency adjust pin. This pin allows setting the switching frequency with a logic level to 500 kHz = low and
750 kHz = high.
AVIN
22
I
Analog input voltage of the device. This is the input for the analog circuits of the device and should be bypassed
with a 1-µF ceramic capacitor for good filtering.
VINB
20, 21
I
Power input voltage pin for the buck converter.
EN1
16
I
This is the enable pin of the buck converter and negative charge pump. When this pin is pulled high, the buck
converter starts up, and after a delay time set by DLY1, the negative charge pump comes up. This pin must be
terminated and not be left floating. A logic high enables the device and a logic low shuts down the device.
EN2
9
I
The boost converter starts only with EN1 = high, after the step-down converter is enabled. EN2 is the enable pin
of the boost converter and positive charge pump. When this pin is pulled high, the boost converter and positive
charge pump starts up after the buck converter is within regulation and a delay time set by DLY2 has passed by.
This pin must be terminated and not be left floating. A logic high enables the device and a logic low shuts down
the device.
DRN
11
O
Drive pin of the negative charge pump.
FBN
13
I
Feedback pin of negative charge pump.
REF
24
O
Internal reference output typically 1.213 V
PGND
6, 7
SS
28
O
This pin allows setting the soft-start time for the main boost converter VS. Typically a 22-nF capacitor needs to be
connected to this pin to set the soft-start time.
DLY1
25
O
Connecting a capacitor from this pin to GND allows the setting of the delay time between VLOGIC (step-down
converter output high) to VGL during start-up.
DLY2
26
O
Connecting a capacitor from this pin to GND allows the setting of the delay time between VLOGIC (step-down
converter output high) to VS Boost converter and positive charge-pump VGH during start-up.
COMP
2
FBB
15
I
Feedback pin of the buck converter
SWB
18
O
Switch pin of the buck converter
NC
19
BOOT
17
FBP
DRP
GD
27
This is the gate drive pin which can be used to control an external MOSFET switch to provide input to output
isolation of VS or VGH. See the circuit diagrams at the end of this data sheet. GD is an open-drain output and is
latched low as soon as the boost converter is within 8% of its nominal regulated output voltage. GD goes high
impedance when the EN2 input voltage is cycled low.
GND
23
Analog ground
OS
3
I
Output sense pin. The OS pin is connected to the internal rectifier switch and overvoltage protection comparator.
This pin needs to be connected to the output of the boost converter and cannot be connected to any other voltage
rail. Connect a 470-nF capacitor from OS pin to GND to avoid noise coupling into this pin. The PCB trace of the
OS pin needs to be wide because it conducts high current.
FB
1
I
Feedback of the main boost converter generating Vsource (VS).
SW
4, 5
I
Switch pin of the boost converter generating Vsource (VS).
PowerPAD
6
I/O
Power ground
This is the compensation pin for the main boost converter. A small capacitor and, if required, a resistor is
connected to this pin.
Not connected
I
N-channel MOSFET gate drive voltage for the buck converter. Connect a capacitor from the switch node SWB to
this pin.
14
I
Feedback pin of positive charge pump.
10
O
Drive pin of the positive charge pump.
The PowerPAD needs to be connected and soldered to power ground (PGND).
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TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
FIGURE
MAIN BOOST CONVERTER (Vs)
η
Efficiency main boost converter Vs
vs Load current VS =15 V,VIN = 12 V
1
rDS(ON)
N-channel main switch Q1
vs Input voltage and temperature
2
Soft-start boost converter
CSS = 22 nF
3
PWM operation at full-load current
4
PWM operation at light-load current
5
Load transient response
6
STEP-DOWN CONVERTER (Vlogic)
η
Efficiency main boost converter VS
rDS(ON)
N-channel main switch Q1
8
PWM operation - continuous mode
9
PWM operation - discontinuous mode
10
Soft start
11
Load transient response
12
vs Load current VLOGIC = 3.3 V,VIN = 12 V
7
SYSTEM PERFORMANCE
fosc
Oscillation frequency
vs Input voltage and temperature
13
Power-up sequencing
EN2 connected to VIN
14
Power-up sequencing
EN2 enabled separately
15
BOOST CONVERTER EFFICIENCY
vs
OUTPUT CURRENT
BOOST CONVERTER
rDS(ON) - N-CHANNEL SWITCH
vs
TEMPERATURE
100
0.16
90
0.14
rDS(on) − N-Channel Switch − Ω
80
Efficiency − %
70
60
50
40
30
VI = 12 V,
VO = 15 V,
L = 10 H
20
0.5
1
1.5
IO − Output Current − A
0.12
0.1
0.08
0.06
0.04
0.02
10
0
0
VI = 8 V,
VI = 12 V,
VI = 14 V
2
0
−40 −20
Figure 1.
0
20
40
60
80
100 120 140
TA − Temperature − C
Figure 2.
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SOFT-START
BOOST CONVERTER
PWM OPERATION BOOST CONVERTER
CONTINUOUS MODE
VI = 12 V,
VO = 15 V/1.5 A
VI = 12 V,
VO = 15 V/ 1.2 A,
C(SS) = 22 nF
VSW
10 V/div
VO
50 mV/div
VS
5 V/div
I(Inductor)
1 A/div
II
1 A/div
1 s/div
2 ms/div
Figure 3.
Figure 4.
PWM OPERATION BOOST CONVERTER
CONTINUOUS MODE: LIGHT LOAD
LOAD TRANSIENT RESPONSE BOOST CONVERTER
VI = 12 V, VS = 15 V,
CO = 3*22 F,
C(comp) = 22 nF,
L = 6.8 H,
FREQ= High
VI = 12 V ,
VO = 10 V/10 mA
VSW
10 V/div
VS
200 mV/div
VO
50 mV/div
I(Inductor)
1 A/div
IL
500 mA/div
100 s/div
1 µs/div
Figure 5.
8
Figure 6.
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EFFICIENCY STEP-DOWN CONVERTER
vs
LOAD CURRENT
STEP-DOWN CONVERTER
rDS(ON) - N-CHANNEL SWITCH
vs
TEMPERATURE
90
0.25
VI = 8 V,
VI = 12 V,
VI = 14 V
r
DS(on) − N-Channel Switch − Ω
80
70
Efficiency − %
60
50
40
30
20
VI = 12 V,
VO = 3.3 V,
L = 15 H
10
0
0
0.5
1
1.5
IO − Output Current − A
2
0.2
0.15
0.1
0.05
0
−40 −20
0
20
40
60
80
100 120 140
TA − Temperature − C
Figure 7.
Figure 8.
STEP-DOWN CONVERTER
PWM OPERATION
CONTINUOUS MODE
STEP-DOWN CONVERTER
PWM OPERATION
DISCONTINUOUS MODE
VI = 12 V,
VO = 3.3 V/45 mA
VSW
5 V/div
VSW
5 V/div
VO
20 mV/div
VO
20 mV/div
VI = 12 V,
VO = 3.3 V/1.5 A
I(Inductor)
1 A/div
I(Inductor)
100 mA/div
500 ns/div
500 ns/div
Figure 9.
Figure 10.
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SOFT-START
STEP-DOWN CONVERTER
LOAD TRANSIENT RESPONSE
STEP-DOWN CONVERTER
VI = 12 V,
VO = 3.3 V/1.2 A
VO1
100 mV/div
VI = 12 V, V(logic) = 3.3 V,
CO = 2*22 F, FREQ = High
VO
1 V/div
IO
270 mA to 1.3 A
I(Inductor)
1 A/div
50 s/div
200 s/div
Figure 11.
Figure 12.
SWITCHING FREQUENCY
vs
TEMPERATURE
POWER-UP SEQUENCING
EN2 CONNECTED TO VIN
740
Switching Frequency − kHz
735
VI = 8 V,
VI = 12 V,
VI = 14 V
730
V Logic
2 V/div
725
VGL
5 V/div
720
715
710
VS
5 V/div
705
VGH
10 V/div
700
695
−50
0
50
100
TA − Temperature − C
150
Figure 13.
10
2 ms/div
Figure 14.
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POWER-UP SEQUENCING
EN2 ENABLED SEPARATELY
V Logic
2 V/div
VS
5 V/div
VGH
5 V/div
EN2
2 V/div
1 ms/div
Figure 15.
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BLOCK DIAGRAM
AVIN
SW
SW
Q2
D
SS
Bias
Vref=1.213 V
Thermal
Shutdown
Sequencing
GND
FREQ
500 kHz/
750 kHz
Oscillator
Clock
DLY1
Current Limit
and
Soft Start
DLY2
S
AVIN
OS
OS
IDLY
Overvoltage
Comparator
SS
Vref
Control Logic
SS
AVIN
Vref
D
S
COMP
PGND
Q1
PGND
GM Amplifier
Comparator
Sawtooth
Generator
FB
VFB
1.154 V
Positive
Charge Pump
OS
SUP
SUP
I DRVP
GM Amplifier
Low Gain
VFB
1.154
Current
Control
Soft Start
Vref
1.2 13 V
DRVP
Q3
VINB
VINB
Negative
Charge Pump
FBP
Step-Down
Converter
Current
Control
Soft Start
DRVN
N
Regulator
8V
BOOT
I DRVN
D
Q3
S
AVIN
SWB
Control Logic
FBN
NC
Current Limit
Ref
IDLY
DLY1
DLY1
Vref
Compensation
and
Soft Start
Clock/2
IDLY
GD
0.9 V
Vref
Logic
Clock/4
DLY2
DLY2
FBB
Error Amplifier
Vref
Clock
0.6 V
Reference
Output
Clock
D
Vref
1.2 13 V
Clock Select During Short Circuit
and Soft Start
S
EN2
EN1
12
Sawtooth
Generator
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DETAILED DESCRIPTION
Boost Converter
The main boost converter operates in pulse-width modulation (PWM) and at a fixed switching frequency of
500 kHz or 750 kHz set by the FREQ pin. The converter uses an unique fast response, voltage-mode controller
scheme with input voltage feedforward. This achieves excellent line and load regulation (0.03%-A load
regulation typical) and allows the use of small external components. To add higher flexibility to the selection of
external component values, the device uses external loop compensation. Although the boost converter looks like
a nonsynchronous boost converter topology operating in discontinuous conduction mode at light load, the
TPS65161 maintains continuous conduction even at light-load currents. This is achieved with a novel
architecture using an external Schottky diode with an integrated MOSFET in parallel connected between SW
and OS. See the Functional Block Diagram. The intention of this MOSFET is to allow the current to go negative
that occurs at light-load conditions. For this purpose, a small integrated P-Channel MOSFET with typically 10-Ω
rds(on) is sufficient. When the inductor current is positive, the external Schottky diode with the lower forward
voltage conducts the current. This causes the converter to operate with a fixed frequency in continuous
conduction mode over the entire load current range. This avoids the ringing on the switch pin as seen with
standard nonsynchronous boost converter and allows a simpler compensation for the boost converter.
Soft Start (Boost Converter)
The main boost converter has an adjustable soft start to prevent high inrush current during start-up. The
soft-start time is set by the external capacitor connected to the SS pin. The capacitor connected to the SS pin is
charged with a constant current that increases the voltage on the SS pin. The internal current limit is
proportional to the voltage on the soft-start pin. When the threshold voltage of the internal soft-start comparator
is reached, the full current limit is released. The larger the soft-start capacitor value, the longer the soft-start
time.
Overvoltage Protection of the Boost Converter
The main boost converter has an overvoltage protection to protect the main switch Q2 at pin (SW) in case the
feedback (FB) pin is floating or shorted to GND. In such an event, the output voltage rises and is monitored with
the overvoltage protection comparator over the OS pin. See the functional block diagram. As soon as the
comparator trips at typically 23 V, TPS65161, the boost converter turns the N-Channel MOSFET switch off. The
output voltage falls below the overvoltage threshold and the converter continues to operate.
Frequency Select Pin (FREQ)
The frequency select pin (FREQ) allows setting the switching frequency of the entire device to 500 kHz (FREQ =
low) or 750 kHz (FREQ = high). A lower switching frequency gives a higher efficiency with a slightly reduced
load transient regulation.
Thermal Shutdown
A thermal shutdown is implemented to prevent damage caused by excessive heat and power dissipation.
Typically, the thermal shutdown threshold is 155°C.
Step-Down Converter
The nonsynchronous step-down converter operates at a fixed switching frequency using a fast response voltage
mode topology with input voltage feedforward. This topology allows simple internal compensation, and it is
designed to operate with ceramic output capacitors. The converter drives an internal 3.2-A N-channel MOSFET
switch. The MOSFET driver is referenced to the switch pin SWB. The N-channel MOSFET requires a gate drive
voltage higher than the switch pin to turn the N-Channel MOSFET on. This is accomplished by a bootstrap gate
drive circuit running of the step-down converter switch pin. When the switch pin SWB is at ground, the bootstrap
capacitor is charged to 8 V. This way, the N-channel gate drive voltage is typically around 8 V.
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DETAILED DESCRIPTION (continued)
Soft Start (Step-Down Converter)
To avoid high inrush current during start-up, an internal soft start is implemented in the TPS65161. When the
step-down converter is enabled over EN1, its reference voltage slowly rises from zero to its power-good
threshold of typically 90% of Vref. When the reference voltage reaches this power-good threshold, the error
amplifier is released to its normal operation at its normal duty cycle. To further limit the inrush current during soft
start, the converter frequency is set to 1/4th of the switching frequency fs and then ½ of fs determined by the
comparator that monitors the feedback voltage. See the internal block diagram. Soft start is typically completed
within 1 ms.
Short-Circuit Protection (Step-Down Converter)
To limit the short-circuit current, the device has a cycle-by-cycle current limit. To avoid the short-circuit current
rising above the internal current limit when the output is shorted to GND, the switching frequency is reduced as
well. This is implemented by two comparators monitoring the feedback voltage. The step-down converter
switching frequency is reduced to ½ of fs when the feedback is below 0.9 V and to 1/4th of the switching
frequency when the feedback voltage is below 0.6 V.
Positive Charge Pump
The positive charge pump provides a regulated output voltage set by the external resistor divider. Figure 16
shows an extract of the positive charge-pump driver circuit. The operation of the charge-pump driver can be
understood best with Figure 16. During the first cycle, Q3 is turned on and the flying capacitor Cfly charges to
the source voltage, Vs. During the next clock cycle, Q3 is turned off and the current source charges the drive
pin, DRP, up to the supply voltage, VSUP. Because the flying capacitor voltage sits on top of the drive pin
voltage, the maximum output voltage is Vsup+Vs. The SUP pin can be connected either to the input voltage Vin
of the TPS65161 or the output voltage of the main boost converter Vs.
SUP = Vin or Vs
Vs
I DRVP
Current
DRP
Cfly
VG
VGH
23 V/50 mA
Control
Soft Start
Q3
R5
FBP
R6
Figure 16. Extract of the Positive Charge-Pump Driver
If higher output voltages are required, another charge-pump stage can be added to the output.
Setting the output voltage:
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DETAILED DESCRIPTION (continued)
V out 1.213 1 R5
R6
R5 R6 Vout
V
FB
1
R6 V out
1
1.213
Negative Charge Pump
The negative charge pump provides a regulated output voltage set by the external resistor divider. The negative
charge pump operates similar to the positive charge pump with the difference that it runs from the input voltage
VIN. The negative charge pump driver inverts the input voltage. The maximum negative output voltage is VGL =
(–VIN)+Vdrop. Vdrop is the voltage drop across the external diodes and internal charge-pump MOSFETs. In
case VGL needs to be lower than –VIN, an additional charge-pump stage needs to be added.
Setting the output voltage:
V out V
R3 1.213 V R3
REF R4
R4
|Vout|
|Vout|
R3 R4 R4 1.213
V
REF
The lower feedback resistor value, R4, should be in a range between 40 kΩ to 120 kΩ or the overall feedback
resistance should be within 500 kΩ to 1 MΩ. Smaller values load the reference too heavily, and larger values
may cause stability problems. The negative charge pump requires two external Schottky diodes. The peak
current rating of the Schottky diode has to be twice the load current of the output. For a 20-mA output current,
the dual-Schottky diode BAV99 is a good choice.
Power-On Sequencing (EN1, EN2, DLY1, DLY2)
The TPS65161 has an adjustable power-on sequencing set by the capacitors connected to DLY1 and DLY2 and
controlled by EN1 and EN2. Pulling EN1 high enables the step-down converter and then the negative
charge-pump driver. DLY1 sets the delay time between the step-down converter and negative charge-pump
driver. EN2 enables the boost converter and positive charge-pump driver at the same time. DLY2 sets the delay
time between the step-down converter Vlogic and the boost converter Vs. This is especially useful to adjust the
delay when EN2 is always connected to Vin. If EN2 goes high after the step-down converter is already enabled,
then the delay DLY2 starts when EN2 goes high. See Figure 17 and Figure 18.
EN2
EN1
DLY2
VGH
V s, VGH
Vs
Vin
Vin
VLogic
Fall Time Depends on Load
Current and Feedback Resistor
VGL
DLY1
GD
Figure 17. Power-On Sequencing With EN2 Always High (EN2=Vin)
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DETAILED DESCRIPTION (continued)
EN2
EN1
DLY2
VGH
Vs
VGH ,Vs
Vin
Vin
Fall Time Depends on Load
Current and Feedback Resistor
VLogic
DLY1
VGL
GD
Figure 18. Power-On Sequencing Using EN1 and EN2
Setting the Delay Times DLY1, DLY2
Connecting an external capacitor to the DLY1 and DLY2 pins sets the delay time. If no delay time is required,
these pins can be left open. To set the delay time, the external capacitor connected to DLY1 and DLY2 is
charged with a constant current source of typically 4.8 µA. The delay time is terminated when the capacitor
voltage has reached the internal reference voltage of Vref = 1.213 V. The external delay capacitor is calculated:
4.8 A td
4.8 A td
C
with td Desired delay time
dly
Vref
1.213 V
Example for setting a delay time of 2.3 ms:
4.8 A 2.3 ms
C
9.4 nF Cdly 10 nF
dly
1.213 V
Gate Drive Pin (GD)
This is an open-drain output that goes low when the boost converter, Vs, is within regulation. The gate drive pin
GD remains low until the input voltage or enable EN2 is cycled to ground.
Undervoltage Lockout
To avoid misoperation of the device at low input voltages, an undervoltage lockout is included which shuts down
the device at voltages lower than 6 V.
Input Capacitor Selection
For good input voltage filtering, low ESR ceramic capacitors are recommended. The TPS65161 has an analog
input, AVIN, and two input pins for the buck converter VINB. A 1-µF input capacitor should be connected directly
from the AVIN to GND. Two 22-µF ceramic capacitors are connected in parallel from the buck converter input
VINB to GND. For better input voltage filtering, the input capacitor values can be increased. See Table 1 and the
Application Information section for input capacitor recommendations.
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DETAILED DESCRIPTION (continued)
Table 1. Input Capacitor Selection
CAPACITOR
VOLTAGE RATING
COMPONENT SUPPLIER
COMMENTS
22 µF/1210
16 V
Taiyo Yuden EMK325BY226MM
CIN (VINB)
1 µF/1206
16 V
Taiyo Yuden EMK316BJ106KL
CIN (AVIN)
Boost Converter Design Procedure
The first step in the design procedure is to verify whether the maximum possible output current of the boost
converter supports the specific application requirements. A simple approach is to use the converter efficiency, by
taking the efficiency numbers from the provided efficiency curves or to use a worst-case assumption for the
expected efficiency, e.g., 80%.
1. Duty Cycle:
D 1
Vin Vout
Vin
2. Maximum output current: I
avg (1 D) lsw Vout 2.8 A with lsw minimum switch current of the TPS65161 (2.8 A).
3. Peak switch current:
I
swpeak
I
Vin D out
2 ƒs L 1 D
With
Isw = converter switch current (minimum switch current limit = 2.8 A)
fs = converter switching frequency (typical 500 kHz/750 kHz)
L = Selected inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.8 as an estimation)
The peak switch current is the steady-state peak switch current that the integrated switch, inductor, and external
Schottky diode must be able to handle. The calculation must be done for the minimum input voltage where the
peak switch current is highest.
Inductor Selection (Boost Converter)
The TPS65161 operates typically with a 10-µH inductor. Other possible inductor values are 6.8-µH or 22-µH.
The main parameter for the inductor selection is the saturation current of the inductor, which should be higher
than the peak switch current as previously calculated, with additional margin to cover for heavy load transients.
The alternative, more conservative approach, is to choose the inductor with saturation current at least as high as
the typical switch current limit of 3.5 A. The second important parameter is the inductor DC resistance. Usually,
the lower the DC resistance the higher the efficiency. The efficiency difference between different inductors can
vary between 2% to 10%. Possible inductors are shown in Table 2.
Table 2. Inductor Selection (Boost Converter)
INDUCTOR VALUE
DIMENSIONS in mm
Isat/DCR
22 µH
Coilcraft MSS1038-103NX
COMPONENT SUPPLIER
10,2 x 10,2 x 3,6
2.9 A/73 mΩ
22 µH
Coilcraft DO3316-103
12,85 x 9,4 x 5,21
3.8 A/38 mΩ
10 µH
Sumida CDRH8D43-100
8,3 x 8,3 x 4,5
4.0 A/29 mΩ
10 µH
Sumida CDH74-100
7,3 x 8,0 x 5,2
2.75 A/43 mΩ
10 µH
Coilcraft MSS1038-103NX
10,2 x 10,2 x 3,6
4.4 A/35 mΩ
6.8 µH
Wuerth Elektronik 7447789006
7,3 x 7,3 x 3,2
2.5 A/44 mΩ
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Output Capacitor Selection (Boost Converter)
For best output voltage filtering, a low ESR output capacitor is recommended. Ceramic capacitors have a low
ESR value and work best with the TPS65161. Usually, three 22-µF ceramic output capacitors in parallel are
sufficient for most applications. If a lower voltage drop during load transients is required, more output
capacitance can be added. See Table 3 for the selection of the output capacitor.
Table 3. Output Capacitor Selection (Boost Converter)
CAPACITOR
VOLTAGE RATING
22 µF/1812
16 V
COMPONENT SUPPLIER
Taiyo Yuden EMK432BJ226MM
Rectifier Diode Selection (Boost Converter)
To achieve high efficiency, a Schottky diode should be used. The reverse voltage rating should be higher than
the maximum output voltage of the converter. The average rectified forward-current rating needed for the
Schottky diode is calculated as the off-time of the converter times the maximum switch current of the TPS65161:
D 1 Vout
Vin
I avg (1 D) lsw Vin 2.8 A with lsw minimum switch current of the TPS65161 (2.8 A).
Vout
Usually, a Schottky diode with 2-A maximum average rectified forward-current rating is sufficient for most
applications. Secondly, the Schottky rectifier has to be able to dissipate the power. The dissipated power is the
average rectified forward current times the diode forward voltage.
PD = Iavg x VF = Isw x (1 x D) x VF (with Isw = minimum switch current of the TPS65161 (2.6 A)
Table 4. Rectifier Diode Selection (Boost Converter)
CURRENT RATING
Iavg
Vr
3A
20 V
2A
20 V
2A
20 V
Vforward
RθJA
SIZE
COMPONENT SUPPLIER
0.36 at 3 A
46°C/W
SMC
MBRS320, International Rectifier
0.44 V at 3 A
75°C/W
SMB
SL22, Vishay Semiconductor
0.5 at 2 A
75°C/W
SMB
SS22, Fairchild Semiconductor
Setting the Output Voltage and Selecting the Feedforward Capacitor (Boost Converter)
The output voltage is set by the external resistor divider and is calculated as:
V out 1.146 V 1 R1
R2
Across the upper resistor, a bypass capacitor is required to achieve a good load transients response and to
have a stable converter loop. Together with R1, the bypass capacitor Cff sets a zero in the control loop.
Depending on the inductor value, the zero frequency needs to be set. For a 6.8-µH or 10-µH inductor, fz = 10
kHz and for a 22-µH inductor, fz = 7 kHz.
1
1
Cƒƒ 2 ƒ z R1
2 10 kHz R1
A value coming closest to the calculated value should be used.
Compensation (COMP) (Boost Converter)
The regulator loop can be compensated by adjusting the external components connected to the COMP pin. The
COMP pin is the output of the internal transconductance error amplifier. A single capacitor connected to this pin
sets the low-frequency gain. Usually, a 22-nF capacitor is sufficient for most of the applications. Adding a series
resistor sets an additional zero and increases the high-frequency gain. The following formula calculates at what
frequency the resistor increases the high-frequency gain.
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ƒz 1
2 Cc Rc
Lower input voltages require a higher gain and therefore a lower compensation capacitor value.
Step-Down Converter Design Procedure
Setting the Output Voltage
The step-down converter uses an external voltage divider to set the output voltage. The output voltage is
calculated as:
V out 1.213 V 1 R1
R2
with R1 as 1.2 kΩ, and internal reference voltage V(ref)typ = 1.213 V
At load current <1 mA, the device operates in discontinuous conduction mode. When the load current is reduced
to zero, the output voltage rises slightly above the nominal output voltage. At zero load current, the device skips
clock cycles but does not completely stop switching; thus, the output voltage sits slightly higher than the nominal
output voltage. Therefore, the lower feedback resistor is selected to be around 1.2 kΩ to always have around
1-mA minimum load current.
Selecting the Feedforward Capacitor
The feedforward capacitor across the upper feedback resistor divider sets a zero in the converter loop transfer
function. For a 15-µH inductor, fz = 8 kHz and when a 22-µH inductor is used, fz = 17 kHz.
(Example for the 3.3-V output)
Cz 1
1
9.9 nF 10 nF
2 8 kHz R1
2 8 kHz 2k
Usually a capacitor value closest to the calculated value is selected.
Inductor Selection (Step-Down Converter)
The TPS65161 operates typically with a 15-µH inductor value. For high efficiencies the inductor should have a
low DC resistance to minimize conduction losses. This needs to be considered when selecting the appropriate
inductor. In order to avoid saturation of the inductor, the inductor should be rated at least for the maximum
output current of the converter, plus the inductor ripple current that is calculated as:
1 Vout
I
Vin
I
I outmax L
I Vout Lmax
L
2
Lƒ
With:
f = Switching frequency (750 kHz, 500 kHz minimal)
L = Inductor value (typically 15 µH)
∆IL= Peak-to-peak inductor ripple current
ILmax = Maximum inductor current
The highest inductor current occurs at maximum Vin. A more conservative approach is to select the inductor
current rating just for the typical switch current of 3.2 A.
Table 5. Inductor Selection (Step-Down Converter)
INDUCTOR VALUE
COMPONENT SUPPLIER
DIMENSIONS in mm
Isat/DCR
15 µH
Wuerth 7447789115
7,3 x 7,3 x 3,2
1.75 A/100 mΩ
15 µH
Sumida CDRH8D28-150
8,3 x 8,3 x 3,0
1.9 A/53 mΩ
15 µH
Sumida CDRH8D38-150
8,3 x 8,3 x 4,0
2.3 A/53 mΩ
15 µH
Coilcraft MSS1038-153NX
10,2 x 10,2 x 3,6
2.7 A/50 mΩ
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Rectifier Diode Selection (Step-Down Converter)
To achieve high efficiency, a Schottky diode should be used. The reverse voltage rating should be higher than
the maximum output voltage of the step-down converter. The averaged rectified forward current at which the
Schottky diode needs to be rated is calculated as the off-time of the step-down converter times the maximum
switch current of the TPS65161:
D 1 Vout
Vin
I avg (1 D) Isw 1 Vout 2.5 A with Isw minimum switch current of the TPS65161 (2.5 A)
Vin
Usually, a Schottky diode with 1.5-A or 2-A maximum average rectified forward current rating is sufficient for
most applications. Secondly, the Schottky rectifier has to be able to dissipate the power. The dissipated power is
the average rectified forward current times the diode forward voltage.
PD = Iavg x VF = Isw x (1 – D) x VF with Isw = minimum switch current of the TPS65161 (2 A).
Table 6. Rectifier Diode Selection (Step-Down Converter)
CURRENT RATING
Iavg
Vr
3A
20 V
2A
20 V
2A
1.5 A
Vforward
RθJA
SIZE
COMPONENT SUPPLIER
0.36 V at 3 A
46°C/W
SMC
MBRS320, International Rectifier
0.44 V at 2 A
75°C/W
SMB
SL22, Vishay Semiconductor
20 V
0.5 V at 2 A
75°C/W
SMB
SS22, Fairchild Semiconductor
20 V
0.445 V at 1.0 A
88°C/W
SMA
SL12, Vishay Semiconductor
Output Capacitor Selection (Step-Down Converter)
The device is designed to work with ceramic output capacitors. When using a 15-µH inductor, two 22-µF
ceramic output capacitors are recommended. More capacitance can be added to improve the load transient
response.
Table 7. Output Selection (Boost Converter)
CAPACITOR
VOLTAGE RATING
22 µF/0805
6.3 V
COMPONENT SUPPLIER
Taiyo Yuden JMK212BJ226MG
Layout Consideration
The PCB layout is an important step in the power supply design. An incorrect layout could cause converter
instability, load regulation problems, noise, and EMI issues. Especially with a switching dc-dc converter at high
load currents, too-thin PCB traces can cause significant voltage spikes. Good grounding becomes important as
well. If possible, a common ground plane to minimize ground shifts between analog (GND) and power ground
(PGND) is recommended. Additionally, the following PCB design layout guidelines are recommended for the
TPS65161:
1. Separate the power supply traces for AVIN and VINB, and use separate bypass capacitors.
2. Use a short and wide trace to connect the OS pin to the output of the boost converter.
3. To minimize noise coupling into the OS pin, use a 470-pF bypass capacitor to GND.
4. Place the rectifier diode of the step down converter as close as possible to the SWB pin.
5. Use short traces for the charge-pump drive pins (DRN, DRP) of VGH and VGL because these traces carry
switching waveforms.
6. Place a 1-µF bypass capacitor from the SUP pin to GND.
7. Place the flying capacitors as close as possible to the DRP and DRN pin, avoiding a high voltage spike at
these pins.
8. Place the Schottky diodes as close as possible to the IC, respective to the flying capacitors connected to the
DRP and DRN.
9. Route the feedback network of the negative charge pump away from the drive pin traces (DRN) of the
negative charge pump. This avoids parasitic coupling into the feedback network of the negative charge
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pump giving good output voltage accuracy and load regulation. To do this, use the FREQ pin and trace to
isolate DRN from FBN.
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APPLICATION INFORMATION
C1
2 * 22 μF
8
12
20
21
22
C6
0.47 μF
D2
D3
16
9
11
13
24
6
7
SUP
FREQ
VINB
VINB
AVIN
EN1
EN2
DRN
FBN
REF
PGND
PGND
28
SS
25
DLY1
R3
620 kΩ
R4
150 kΩ
C9
22 nF
C8
220 nF
SW
SW
FB
OS
GND
GD
DRP
FBP
Boot
SWB
NC
FBB
COMP
DLY2
4
5
1
3
23
27
R1
680 kΩ
C15
470 nF
C2
3 * 22 μF
R2
56 kΩ
D4
GD
C5
10
14
17
18
19
15
D5
0.47 μF
VGH
26 V/50 mA
R5
909 kΩ
2
26
C13
0.47 μF
R6
44.2 kΩ
Cb
100 nF
Vlogic
3.3 V/2.3 A
L2
15 μH
C17
22 nF
C11
10 nF
C10
10 nF
Vs
15 V/1.5 A
C4
22 pF
TPS65161
C3
1 μF
C16
1 μF
VGL
−5 V/50 mA
C7
0.47 μF
D1
SL22
L1
10 μH
Vin
12 V
D6
SL22
R7
2 kΩ
C14
10 nF
C12
2 * 22 μF
R8
1.2 kΩ
Figure 19. Standard 12-V to 15-V Conversion
C1
2 * 22 μF
VGL
−5 V/50 mA
C16
1 μF
8
12
20
21
22
C6
0.47 μF
D2
AVIN
EN1
EN2
DRN
FBN
REF
PGND
PGND
28
SS
25
DLY1
R3
620 kΩ
R4
150 kΩ
C8
220 nF
16
9
11
13
24
6
7
SUP
FREQ
VINB
VINB
C9
22 nF
C10
10 nF
SW
SW
FB
OS
GND
GD
DRP
FBP
Boot
SWB
NC
FBB
COMP
DLY2
C11
10 nF
4
5
1
3
23
27
Vs
18 V/1.3 A
C4
22 pF
TPS65161
C3
1 μF
D3
C7
0.47 μF
D1
SL22
L1
10 μH
Vin
12 V
R1
825 kΩ
C15
470 nF
C2
3 * 22 μF
R2
56 kΩ
D4
GD
10
14
17
18
19
15
C5
D5
0.47 μF
VGH
32 V/50 mA
R5
560 kΩ
2
26
Cb
100 nF
C17
22 nF
C13
0.47 μF
R6
22 kΩ
Vlogic
3.3 V/2.3 A
L2
15 μH
D6
SL22
R7
2 kΩ
R8
1.2 kΩ
Figure 20. Standard 12-V to 18-V Conversion
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10 nF
C12
2 * 22 μF
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APPLICATION INFORMATION (continued)
L1
10 µH
Vin
12 V
C1
2*22 µF
C3
VGL
–5 V/50 mA
D2
C6
0.47µF
D3
C7
0.47 µF
REF
PGND
PGND
SS
DLY1
R3
620 kΩ
R4
150 kΩ
C8
220 nF
SUP
FREQ
VINB
VINB
AVIN
EN1
EN2
DRN
FBN
C9
22 nF
C10
10 nF
SW
SW
FB
OS
GND
GD
DRP
FBP
Boot
SWB
NC
FBB
COMP
DLY2
C11
10 nF
Vs
18 V/1.3 A
SI2343
R1
C4
22 pF
TPS65161
1 µF
C16
1 µF
D1
SL22
825 kΩ
C15
470 nF
D4
C19
1 µF
GD
D5
VGH
32 V/50 mA
R5
560 kΩ
C17
22nF
R9
510
kΩ
R10
100 kΩ
R2
56 kΩ
C5
0.47 µF
GD
C18
220 nF
C2
3* 22 µF
C13
0.47 µF
R6
22 kΩ
Cb
100 nF
L2
15 µH
D6
SL22
Vlogic
3.3 V/2.3 A
C14
R7
2 kΩ
10 nF
C12
2*22 µF
R8
1.2 kΩ
Figure 21. Standard 12-V to 18-V Conversion Using an External Isolation MOSFET to Isolate Vs as well
as VGH
Submit Documentation Feedback
23
TPS65161
www.ti.com
SLVS617 – APRIL 2006
APPLICATION INFORMATION (continued)
C1
2 * 22 μF
C6
0.47 μF
D2
D3
C7
0.47 μF
R3
620 kΩ
R4
150 kΩ
C8
220 nF
C4
22 pF
TPS65161
C3
1 μF
C16
1 μF
VGL
−5 V/50 mA
D1
SL22
L1
6.9 μH
Vin
12 V 10%
C9
22 nF
8
SUP
12
FREQ
20
VINB
21
VINB
22
AVIN
16
EN1
9
EN2
11
DRN
13
FBN
24
6 REF
PGND
7
PGND
28
25 SS
DLY1
C10
10 nF
SW
SW
FB
OS
GND
GD
DRP
FBP
Boot
SWB
NC
FBB
COMP
DLY2
C11
10 nF
4
5
1
3
23
27
10
14
17
18
C15
470 nF
Vs
13.5 V/2 A
R1
820 kΩ
C2
3 * 22 μF
R2
75 kΩ
D4
GD
C5
VGH
23 V/50 mA
D5
0.47 μF
R5
1 MΩ
19
15
2
26
R6
76 kΩ
Cb
100 nF
C17
22 nF
Vlogic
3.3 V/2.3 A
L2
15 μH
D6
SL22
R7
2 kΩ
R8
1.2 kΩ
Figure 22. Standard 12-V to 13.5-V Conversion
24
C13
0.47 μF
Submit Documentation Feedback
C14
10 nF
C12
2 * 22 μF
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