TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 TRIPLE OUTPUT LCD SUPPLY WITH LINEAR REGULATOR AND VCOM BUFFER FEATURES • • • • • • • • • • • • • • • DESCRIPTION 2.7-V to 5.8-V Input Voltage Range 1.6-MHz Fixed Switching Frequency 3 Independent Adjustable Outputs Main Output of up to 15 V With < 1% Output Voltage Accuracy Virtual Sychronous Converter Technology Negative Regulated Charge Pump Driver VO2 Positive Charge Pump Converter VO3 Integrated VCOM Buffer Auxiliary 3.3-V Linear Regulator Controller Internal Soft Start Internal Power-On Sequencing Fault Detection of all Outputs (TPS65100/05) No Fault Detection (TPS65101) Thermal Shutdown Available in TSSOP-24 and QFN-24 PowerPAD™ Packages The main output, VO1, is a 1.6-MHz, fixed-frequency PWM boost converter providing the source drive voltage for the LCD display. The device is available in two versions with different internal switch current limits to allow the use of a smaller external inductor when lower output power is required. The TPS65100/01 has a typical switch current limit of 2.3 A, and the TPS65105 has a typical switch current limit of 1.37 A. A fully integrated adjustable charge pump doubler/tripler provides the positive LCD gate drive voltage. An externally adjustable negative charge pump provides the negative gate drive voltage. Due to the high 1.6-MHz switching frequency of the charge pumps, inexpensive and small 220-nF capacitors can be used. The TPS6510x series has an integrated VCOM buffer to power the LCD backplane. For LCD panels powered by 5 V only, the TPS6510x series has a linear regulator controller using an external transistor to provide a regulated 3.3-V output for the digital circuits. For maximum safety, the TPS65100/05 goes into shutdown as soon as one of the outputs is out of regulation. The device can be enabled again by toggling the input or the enable (EN) pin to GND. The TPS65101 does not enter shutdown when one of the outputs is below its power good threshold. APPLICATIONS • • • • • • The TPS6510x series offers a compact and small power supply solution that provides all three voltages required by thin film transistor (TFT) LCD displays. The auxiliary linear regulator controller can be used to generate a 3.3-V logic power rail for systems powered by a 5-V supply rail only. TFT LCD Displays for Notebooks TFT LCD Displays for Monitors Portable DVD Players Tablet PCs Car Navigation Systems Industrial Displays TPS6510x Vin 2.7 V to 5.8 V Boost Converter Vo1 Up to 15 V / 400 mA Positive Charge Pump Vo3 Up to 30 V / 20 mA Negative Charge Pump Vo2 Up to 12 V / 20 mA Vcom Buffer Vcom Linear Regulator Controller Vo4 3.3 V Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2006, Texas Instruments Incorporated TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. TYPICAL APPLICATION CIRCUIT L1 4.7 µH VI 2.7 to 5.8 V C3 22 µF TPS65100 VIN COMP R7 C1 0.22 µF R8 VO2 Up to 12 V/20 mA D2 C12 C4 22 µF 0.22 µF SW SW VCOMIN FB1 EN SUP C2 ENR D3 R3 C6 0.22 µF C5 R1 C11 10 nF VO1 VO1 Up to 15 V/350 mA D1 C2+ C2−/MODE C1+ C1− 0.22 µF R2 Vo3 up to 30 V/20 mA OUT3 DRV FB3 FB2 VCOM REF FB4 PGND R5 PGND BASE C7 0.22 µF GND R4 R6 C11 220 nF Q1 BCP68 VI VO4 3.3 V C9 1 µF Vcom C8 1 µF C10 4.7 µF ORDERING INFORMATION TA -40°C to 85°C (1) (2) 2 PACKAGE (1) (2) LINEAR REGULATOR OUTPUT VOLTAGE MINIMUM SWITCH CURRENT LIMIT TSSOP QFN PACKAGE MARKING 3.3 V 1.6 A TPS65100PWP TPS65100RGE TPS65100 3.3 V 1.6 A TPS65101PWP TPS65101RGE TPS65101 3.3 V 0.96 A TPS65105PWP TPS65105RGE TPS65105 The PWP and RGE packages are available taped and reeled. Add an R suffix to the device type (TPS65100PWPR) to order the device taped and reeled. The PWPR package has quantities of 2000 devices per reel, and the the RGER package has 3000 devices per reel. Without suffix the PWP package only, is shipped in tubes with 60 devices per tube. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT Voltages on pin VIN (2) -0.3 V to 6 V (2) -0.3 V to 15.5 V ENR (2) -0.3 V to VI + 0.3 V Voltages on pin VO1, SUP, PG Voltages on pin EN, MODE, Voltage on VCOMIN 14 V Voltage on pin SW (2) 20 V Continuous power dissipation See Dissipation Rating Table Operating junction temperature range -40°C to 150°C Storage temperature range -65°C to 150°C Lead temperature (soldering, 10 sec) (1) (2) 260°C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. DISSIPATION RATINGS PACKAGE RΘJA TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING 24-Pin TSSOP 30.13 C°/W (PWP soldered) 3.3 W 1.83 W 1.32 W 24-Pin QFN 30 C°/W 3.3 W 1.8 W 1.3 W RECOMMENDED OPERATING CONDITIONS MIN TYP MAX VIN Input voltage range L Inductor (1) TA Operating free-air temperature -40 85 °C TJ Operating junction temperature -40 125 °C (1) 2.7 UNIT 5.8 V µH 4.7 See the application information section for further information. ELECTRICAL CHARACTERISTICS Vin = 3.3 V, EN = VIN, VO1 = 10 V, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT Vi Input voltage range IQ Quiescent current into VIN IQCharge 2.7 5.8 V mA ENR = VCOMIN = GND, VO3 = 2 x VO1, Boost converter not switching 0.7 0.9 Charge pump quiescent current into SUP VO1 = SUP = 10 V, VO3 = 2 x VO1 1.7 2.7 VO1 = SUP = 10 V, VO3 = 3 x VO1 3.9 6 IQVCOM VCOM quiescent current into SUP ENR = GND, VO1 = SUP = 10 V 750 1300 µA IQEN LDO controller quiescent current into VIN ENR = VIN, EN = GND 300 800 µA ISD Shutdown current into VIN EN = ENR = GND 1 10 µA VUVLO Undervoltage lockout threshold VIN falling 2.2 2.4 V Thermal shutdown Temperature rising 160 mA °C LOGIC SIGNALS EN, ENR VIH High-level input voltage VIL Low-level input voltage 1.5 V 0.4 Submit Documentation Feedback V 3 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 ELECTRICAL CHARACTERISTICS (continued) Vin = 3.3 V, EN = VIN, VO1 = 10 V, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER IIleak Input leakage current TEST CONDITIONS MIN EN = GND or VIN TYP MAX UNIT 0.01 0.1 µA 15 V MAIN BOOST CONVERTER VO1 Output voltage range 5 VO1 - VI Minimum input to output voltage difference 1 VREF Reference voltage 1.205 1.213 1.219 VFB Feedback regulation voltage 1.136 1.146 1.154 V IFB Feedback input bias current 10 100 nA rDS(ON) N-MOSFET on-resistance (Q1) VO1 = 10 V, Isw = 500 mA 195 290 VO1 = 5 V, Isw = 500 mA 285 420 ILIM N-MOSFET switch current limit (Q1) TPS65100, TPS65101 rDS(ON) P-MOSFET on-resistance (Q2) IMAX Maximum P-MOSFET peak switch current Ileak Switch leakage current fSW Oscillator frequency V V mΩ 1.6 2.3 2.6 A 0.96 1.37 1.56 A VO1 = 10 V, Isw = 100 mA 9 15 VO1 = 5 V, Isw = 100 mA 14 22 TPS65105 Vsw = 15 V 1 A 1 10 µA 0°C ≤ TA ≤ 85°C 1.295 1.6 2.1 -40°C ≤ TA ≤ 85°C 1.191 1.6 2.1 Line regulation 2.7 V ≤ VI ≤ 5.7 V, Iload = 100 mA Load regulation 0 mA ≤ IO ≤ 300 mA Ω MHz 0.012 %/V 0.2 %/A NEGATIVE CHARGE PUMP VO2 VO2 Output voltage range Vref Reference voltage VFB Feedback regulation voltage IFB rDS(ON) IO -2 V 1.205 1.213 1.219 -36 0 36 mV Feedback input bias current 10 100 nA Q8 P-Channel switch rDS(ON) 4.3 8 2.9 4.4 Q9 N-Channel switch rDS(ON) IO = 20 mA Maximum output current 20 Line regulation 7 V ≤ VO1 ≤ 15 V, Iload = 10 mA, VO2 = -5 V Load regulation 1 mA ≤ IO ≤ 20 mA, VO2 = -5 V V Ω mA 0.09 %/V 0.126 %/mA POSITIVE CHARGE PUMP VO3 VO3 Output voltage range Vref Reference voltage 1.205 VFB Feedback regulation voltage 1.187 IFB rDS(ON) 30 V 1.213 1.219 V 1.214 1.238 V Feedback input bias current 10 100 nA Q3 P-Channel switch rDS(ON) 9.9 15.5 1.1 1.8 4.6 8.5 1.2 2.2 610 720 Q4 N-Channel switch rDS(ON) Q5 P-Channel switch rDS(ON) IO = 20 mA Q6 N-Channel switch rDS(ON) Vd D1 – D4 Shottky diode forward voltage IO Maximum output current ID1-D4 = 40 mA 20 Ω mV mA Line regulation 10 V ≤ VO1 ≤ 15 V, Iload = 10 mA, VO3 = 27 V 0.56 %/V Load regulation 1 mA ≤ IO ≤ 20 mA, VO3 = 27 V 0.05 %/mA LINEAR REGULATOR CONTROLLER VO4 VO4 4 Output voltage 4.5 V ≤ VI ≤ 5.5V, 10 mA ≤ IO ≤ 500 mA Submit Documentation Feedback 3.2 3.3 3.4 V TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 ELECTRICAL CHARACTERISTICS (continued) Vin = 3.3 V, EN = VIN, VO1 = 10 V, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER IBASE TEST CONDITIONS Maximum base drive current VI - VO4 - VBE ≥ 0.5 V (1) VI - VO4 - VBE ≥ 0.75 V MIN TYP 13.5 19 20 27 (1) Line regulation 4.75 V ≤ VI ≤ 5.5 V, Iload = 500 mA Load regulation 1 mA ≤ IO ≤ 500 mA, VI = 5 V Start up current VO4 ≤ 0.8 V MAX mA 0.186 %/V 0.064 11 UNIT %/A 20 25 mA VCOM BUFFER Vcm Common mode input range Vos Input offset voltage DC Load regulation 2.25 (VO1)-2 IO = 0 mA -25 +25 IO = ±25 mA -30 37 IO = ±50 mA -45 55 IO = ±100 mA -72 85 IO = ±150 mA IB VCOMIN Input bias current Ipeak Peak output current -97 -300 V mV mV 110 -30 300 nA VO1 = 15 V 1.2 A VO1 = 10 V 0.65 A VO1 = 5 V 0.15 A VO1 Rising -12 -8.75% VO1 -6 V VO2 Rising -13 -9% VO2 -5 V VO3 Rising -11 -8% VO3 -5 V FAULT PROTECTION THRESHOLDS V(th, Vo1) V(th, Vo2) Shutdown threshold V(th, Vo3) With VI = supply voltage of the TPS6510x, VO4 = output voltage of the regulator, VBE = basis emitter voltage of external transistor DEVICE INFORMATION 7 8 20 19 18 17 9 16 10 15 11 14 12 13 C1+ DRV COMP 1 24 23 22 21 20 19 18 ENR 2 17 C2+ 16 OUT3 15 FB3 14 VCOMIN EN 3 FB1 4 FB4 5 BASE 6 Exposed Thermal Die* 7 8 Submit Documentation Feedback 9 10 11 1213 C2−/MODE VCOM SUP 5 6 C1− 21 PGND 22 4 GND 3 EN ENR COMP FB2 REF GND DRV C1− C1+ C2−/MODE C2+ OUT3 PGND 23 REF 2 SW 24 SW 1 VIN FB1 FB4 BASE VIN SW SW PGND PGND SUP VCOM VCOMIN FB3 RGE PACKAGE TOP VIEW FB2 PWP PACKAGE TOP VIEW Thermal PAD* (1) 5 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 DEVICE INFORMATION (continued) Terminal Functions TERMINAL NO. (PWP) NO. (RGE) I/O VIN 4 7 I Input voltage pin of the device EN 24 3 I Enable pin of the device. This pin should be terminated and not be left floating. A logic high enables the device and a logic low shuts down the device. COMP 22 1 VCOMIN 11 14 I Positive input terminal of the VCOM buffer. When the VCOM buffer is not used, this terminal can be connected to GND to reduce the overall quiescent current of the IC. ENR 23 2 I Enable pin of the linear regulator controller. This pin should be terminated and not be left floating. Logic high enables the regulator and a logic low puts the regulator in shutdown. C1+ 16 19 Positive terminal of the charge pump flying capacitor C1- 17 20 Negative terminal of the charge pump flying capacitor DRV 18 21 O External charge pump driver FB2 21 24 I Feedback pin of negative charge pump REF 20 23 O Internal reference output typically 1.23 V FB4 2 5 I Feedback pin of the linear regulator controller. The linear regulator controller is set to a fixed output voltage of 3.3 V or 3 V depending on the version. O Base drive output for the external transistor NAME Compensation pin for the main boost converter. A small capacitor is connected to this pin. BASE 3 6 GND 19 22 PGND 7, 8 10, 11 VCOM 10 13 O VCOM buffer output FB3 12 15 I Feedback pin of positive charge pump OUT3 13 16 O Positive charge pump output C2-/MODE 15 18 Negative terminal of the charge pump flying capacitor and charge pump MODE pin. If the flying capacitor is connected to this pin, the converter operates in a voltage tripler mode. If the charge pump needs to operate in a voltage doubler mode, the flying capacitor is removed and the C2-/MODE pin should be connected to GND. C2+ 14 17 Positive terminal for the charge pump flying capacitor. If the device runs in voltage doubler mode, this pin should be left open. 12 I Supply pin of the positive, negative charge pump, boost converter gate drive circuit, and VCOM buffer. This pin should be connected to the output of the main boost converter and cannot be connected to any other voltage source. For performance reasons, it is not recommended for a bypass capacitor to be connected directly to this pin. SUP 9 Ground Power ground FB1 1 4 I Feedback pin of the boost converter SW 5, 6 8, 9 I Switch pin of the boost converter PowerPAD™/ Thermal Die 6 DESCRIPTION The PowerPad or exposed thermal die needs to be connected to the power ground pins (PGND) Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 FUNCTIONAL BLOCK DIAGRAM VIN SW SW Q2 FB1 FB2 FB3 Bias Vref = 1.213 V Thermal Shutdown Start-Up Sequencing Undervoltage Detection Short-Circuit Protection S D Main boost converter EN Current Limit and Soft Start 1.6-MHz Oscillator SUP Control Logic Gate Drive Circuit D Q1 S COMP GM Amplifier Comparator Sawtooth Generator FB1 VFB 1.146 V SUP SUP (VO) FB3 Positive Charge Pump GM Amplifier Low Gain VFB 1.146 V Vref 1.214 V Negative Charge Pump SUP Q8 D Q3 S Current Control C1− Gain Select (Doubler or Tripple Mode) D Q4 S SUP Soft Start D C1+ Current Control Soft Start S DRV D Q7 S D Q9 SUP SUP S Vo3 D1 D2 D Q5 D4 S C2+ FB2 D Vref 0V S D3 Q6 C2− Reference Output REF Vref 1.213 V SUP Vin Soft Start Iref = 20 mA Soft Start Short Circuit Detect D Q11 S ~1 V FB4 VCOM D Linear Regulator Controller S Vref 1.213 V D Q12 S Q10 Disable VCOM Buffer ENR BASE VCOMIN Submit Documentation Feedback GND PGND PGND 7 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Main Boost Converter Efficiency, main boost converter VO1 vs Load current 1 Efficiency, main boost converter VO1 vs Load current 2 Efficiency vs Input voltage 3 fsw Switching frequency vs Free-air temperature 4 rDS(on) rDS(on) N-Channel main switch Q1 vs Free-air temperature 5 η PWM operation, continuous mode 6 PWM operation at light load 7 Load transient response, CO = 22 µF 8 Load transient response, CO = 2 x 22 µF 9 Power-up sequencing 10 Soft start VO1 11 Negative Charge Pump Imax VO2 Maximum load current vs Output voltage VO1 12 Positive Charge Pump Imax VO3 Maximum load current vs Output voltage VO1 (doubler mode) 13 Imax VO3 Maximum load current vs Output voltage VO1 (tripler mode) 14 EFFICIENCY vs LOAD CURRENT 100 100 90 90 Vo1 = 15 V 40 30 70 Vo1 = 10 V 60 50 Vo1 = 15 V 40 Vo1 = 6 V 90 Vo1 = 10 V 85 Vo1 = 15 V 80 30 VI = 3.3 V Vo2, Vo3 = No Load, Switching 20 10 10 100 IL − Load Current − mA Figure 1. 1k 75 VI = 5 V Vo2, Vo3 = No Load, Switching 20 10 1 8 ILoad at Vo1 = 100 mA Vo2, Vo3 = No Load, Switching Efficiency - % Efficiency − % 60 50 100 80 Vo1 = 10 V 70 EFFICIENCY vs INPUT VOLTAGE 95 Vo1 = 6 V 80 Efficiency − % EFFICIENCY vs LOAD CURRENT 1 10 100 IL − Load Current − mA Figure 2. Submit Documentation Feedback 1k 70 2.5 3 3.5 4 4.5 5 VI - Input V oltage - V Figure 3. 5.5 6 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 SWITCHING FREQUENCY vs FREE-AIR TEMPERATURE rDS(on) N-CHANNEL MAIN SWITCH vs FREE-AIR TEMPERATURE 350 r − N−Channel Main Switch − mΩ DS(on) Switching Frequency − MHz 1.9 1.8 VI = 2.7 V 1.7 VI = 3.3 V 1.6 VI = 5.8 V 1.5 1.4 1.3 −40 PWM OPERATION CONTINUOUS MODE −20 0 20 40 60 80 100 VSW 10 V/div 300 Vo1 = 5 V 250 VO 50 mV/div 200 Vo1 = 10 V 150 IL 1 A/div Vo1 = 15 V 100 −40 −20 0 20 40 60 80 VI = 3.3 V VO = 10 V/300 mA 100 250 ns/div TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C Figure 4. Figure 5. Figure 6. PWM OPERATION AT LIGHT LOAD LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE VI = 3.3 V Vo1 = 10 V, CO= 2*22 µF Vo1 200 mV/div VSW 10 V/div Vo1 100 mV/div VO 50 mV/div VI = 3.3 V VO = 10 V/10 mA IO 50 mA to 250 mA IL 500 mA/div VI = 3.3 V Vo1 = 10 V, CO= 22 µF IO 50 mA to 250 mA 100 µs/div 100 µs/div 250 ns/div Figure 7. Figure 8. POWER-UP SEQUENCING SOFT START VO1 Figure 9. VO2 MAXIMUM LOAD CURRENT 0.20 VI = 3.3 V VO = 10 V, IO = 300 mA Vo2 = −8 V 0.18 I O − Output Current − A Vo1 5 V/div Vo1 5 V/div Vo2 5 V/div Vo3 10 V/div VCOM 2 V/div VI = 3.3 V VO = 10 V, VCOM CI = 1 nF 500 µs/div TA = −40°C 0.16 II 500 mA/div 0.14 TA = 85°C 0.12 0.10 TA = 25°C 0.08 0.06 0.04 0.02 500 µs/div 0 8.8 9.8 10.8 11.8 12.8 13.8 14.8 Vo1 − Output Voltage − V Figure 10. Figure 11. Submit Documentation Feedback Figure 12. 9 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 VO3 MAXIMUM LOAD CURRENT VO3 MAXIMUM LOAD CURRENT 0.14 0.12 TA = −40°C Vo3 = 18 V (Doubler Mode) 0.10 TA = −40°C I O − Output Current − A I O − Output Current − A 0.12 TA = 85°C 0.10 TA = 25°C 0.08 0.06 0.04 TA = 25°C 0.08 TA = 85°C 0.06 0.04 0.02 0.02 Vo3 = 28 V (Tripler Mode) 0 9 10 11 12 13 14 15 0 9 10 Vo1 − Output Voltage − V 11 12 13 14 15 Vo1 − Output Voltage − V Figure 13. Figure 14. DETAILED DESCRIPTION The TPS6510x series consists of a main boost converter operating with a fixed switching frequency of 1.6 MHz to allow for small external components. The boost converter output voltage VO1 is also the input voltage, connected via the pin SUP, for the positive and negative charge pumps and the bias supply for the VCOM buffer. The linear regulator controller is independent from this system with its own enable pin. This allows the linear regulator controller to continue to operate while the other supply rails are disabled or in shutdown due to a fault condition on one of their outputs. See the functional block diagram for more information. Main Boost Converter The main boost converter operates with PWM and a fixed switching frequency of 1.6 MHz. The converter uses a unique fast response, voltage mode controller scheme with input voltage feedforward. This achieves excellent line and load regulation (0.2% A load regulation typical) and allows the use of small external components. To add higher flexibility to the selection of external component values the device uses external loop compensation. Although the boost converter looks like a nonsynchronous boost converter topology operating in discontinuous mode at light load, the TPS6510x series maintains continuous conduction even at light load currents. This is accoplished using the Virtual Synchronous Converter Technology for improved load transient response. This architecture uses an external Schottky diode and an integrated MOSFET in parallel connected between SW and SUP (see the functional block diagram). The integrated MOSFET Q2 allows the inductor current to become negative at light load conditions. For this purpose, a small integrated P-channel MOSFET with typically 10 Ω rDSon is sufficient. When the inductor current is positive, the external Schottky diode with the lower forward voltage conducts the current. This causes the converter to operate with a fixed frequency in continuous conduction mode over the entire load current range. This avoids the ringing on the switch pin as seen with a standard nonsynchronous boost converter and allows a simpler compensation for the boost converter. VCOM Buffer VCOMIN is the input of the VCOM buffer. If the VCOM buffer is not required for certain applications, it is possible to shut down the VCOM buffer by statically connecting VCOMIN to ground, reducing the overall quiescent current. The VCOM buffer features soft start avoiding a large voltage drop at VO1 during start-up. The VCOMIN cannot be pulled dynamically to ground during operation. Enable and Power On Sequencing (EN, ENR) The device has two enable pins. These pins should be terminated and not left floating to prevent unpredictable operation. Pulling the enable pin (EN) high enables the device and starts the power on sequencing with the main boost converter VO1 coming up first then the negative and positive charge pump and the VCOM buffer. If the VCOMIN pin is held low, the VCOM buffer remains disabled. The linear regulator has an independent enable pin (ENR). Pulling this pin low disables the regulator, and pulling this pin high enables this regulator. If the enable pin EN is pulled high, the device starts its power on sequencing. The main boost converter starts up first with its soft start. If the output voltage has reached 91.25% of its output voltage, the negative charge 10 Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 DETAILED DESCRIPTION (continued) pump comes up next. The negative charge pump starts with a soft start and when the output voltage has reached 91% of the nominal value, the positive charge pump comes up with a soft start. The VCOM buffer is enabled as soon as the positive charge pump has reached its nominal value and VCOMIN is greater than typically 1.0 V. Pulling the enable pin low shuts down the device. Depended on load current and output capacitance, each of the outputs goes down. Positive Charge Pump The TPS6510x series has a fully regulated integrated positive charge pump generating VO3. The input voltage for the charge pump is applied to the SUP pin that is equal to the output of the main boost converter VO1. The charge pump is capable of supplying a minimum load current of 20 mA. Depending on the voltage difference between VO1 and VO3 higher load currents are possible. See Figure 13 and Figure 14. Negative Charge Pump The TPS6510x series has a regulated negative charge pump using two external Schottky diodes. The input voltage for the charge pump is applied to the SUP pin that is connected to the output of the main boost converter VO1. The charge pump inverts the main boost converter output voltage and is capable of supplying a minimum load current of 20 mA. Depending on the voltage difference between VO1 and VO2, higher load currents are possible. See Figure 12. Linear Regulator Controller The TPS6510x series includes a linear regulator controller to generate a 3.3-V rail which is useful when the system is powered from a 5-V supply. The regulator is independent from the other voltage rails of the device and has its own enable (ENR). Since most of the systems require this voltage rail to come up first it is recommended to use a R-C delay on EN. This delays the start-up of the main boost converter which will reduce the inrush current as well. Soft Start The main boost converter as well as the charge pumps, linear regulator, and VCOM buffer have an internal soft start. This avoids heavy voltage drops at the input voltage rail or at the output of the main boost converter VO1 during start-up caused by high inrush currents. See Figure 10 and Figure 11. During softstart of the main boost converter VO1 the internal current limit threshold is increased in three steps. The device starts with the first step where the current limit is set to 2/5 of the typical current limit (2/5 of 2.3A) for 1024 clock cycles then increased to 3/5 of the current limit for 1024 clock cycles and the 3rd step is the full current limit. The TPS65101 has an extended softstart time where each step is 2048 clock cycles. Fault Protection All the outputs of the TPS65100/05 have short circuit detection where the device enters shutdown. The TPS65101, as an exception, does not enter shutdown in case one of the outputs falls below its power good threshold. The main boost converter has overvoltage and undervoltage protection. If the output voltage VO1 rises above the overvoltage protection threshold of typically 5% of VO1, then the device stops switching but remains operational. When the output voltage falls below this threshold again, then the converter continues operation. When the output voltage falls below power good threshold of typically 8.75% of VO1, in case of a short circuit condition, then the TPS65100/05 goes into shutdown. Because there is a direct pass from the input to the output through the diode, the short circuit condition remains. If this condition needs to be avoided, a fuse at the input or an output disconnect using a single transistor and resistor is required. The negative and positive charge pumps have an undervoltage lockout to protect the LCD panel of possible latch-up conditions in case of a short circuit condition or faulty operation. When the negative output voltage is typically above 9.5% of its output voltage (closer to ground), then the device enters shutdown. When the positive charge pump output voltage VO3 is below 8% typ of its output voltage, then the device goes into shutdown as well. See the electrical characteristics table under fault protection thresholds. The device can be enabled again by toggling the enable pin (EN) below 0.4 V or by cycling the input voltage below the UVLO of 1.7 V. The linear regulator reduces the output current to typical 20 mA under a short circuit condition when the output voltage is typically < 1 V. See the functional block diagram. The linear regulator does not go into shutdown under a short-circuit condition. Submit Documentation Feedback 11 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 DETAILED DESCRIPTION (continued) Thermal Shutdown A thermal shutdown is implemented to prevent damage due to excessive heat and power dissipation. Typically, the thermal shutdown threshold is 160°C. If this temperature is reached, the device goes into shutdown. The device can be enabled by toggling the enable pin to low and back to high or by cycling the input voltage to GND and back to VI again. 12 Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 APPLICATION INFORMATION BOOST CONVERTER DESIGN PROCEDURE The first step in the design procedure is to calculate the maximum possible output current of the main boost converter under certain input and output voltage conditions. The following example is for a 3.3-V to 10-V conversion: Vin = 3.3 V, Vout = 10 V, Switch voltage drop Vsw = 0.5 V, Schottky diode forward voltage VD = 0.8 V 1. Duty cycle: Vout V V D in 10 V 0.8 V 3.3 V 0.73 D V out V V sw 10 V 0.8 V 0.5 V D 2. Average inductor current: I I out 300 mA 1.11 A L 1 0.73 1D 3. Inductor peak-to-peak ripple current: i L Vin Vsw D fs L (3.3 V 0.5 V) 0.73 304 mA 1.6 MHz 4.2 H 4. Peak switch current: i I I L 1.11 A 304 mA 1.26 A swpeak L 2 2 The integrated switch, the inductor, and the external Schottky diode must be able to handle the peak switch current. The calculated peak switch current has to be equal to or lower than the minimum N-MOSFET switch current limit as specified in the electrical characteristics table (1.6 A for the TPS65100/01 and 0.96 A for the TPS65105). If the peak switch current is higher, then the converter cannot support the required load current. This calculation must be done for the minimum input voltage where the peak switch current is highest. The calculation includes conduction losses like switch rDSon (0.5 V) and diode forward drop voltage losses (0.8 V). Additional switching losses, inductor core and winding losses, etc., require a slightly higher peak switch current in the actual application. The above calculation still allows a for good design and component selection. Inductor Selection Several inductors work with the TPS6510x series. Especially with the external compensation, the performance can be adjusted to the specific application requirements. The main parameter for inductor selection is the saturation current of the inductor which should be higher than the peak switch current as calculated above with additional margin to cover for heavy load transients and extreme start-up conditions. Another method is to choose the inductor with a saturation current at least as high as the minimum switch current limit of 1.6 A for the TPS65100/01 and 0.96 A for the TPS65105. The different switch current limits allow selection of a physically smaller inductor when less output current is required. The second important parameter is inductor dc resistance. Usually, the lower the DC resistance, the higher the efficiency. However, inductor DC resistance, is not the only parameter determining the efficiency. Especially for a boost converter where the inductor is the energy storage elemen,t the type and material of the inductor influences the efficiency as well. Especially at the high switching frequency of 1.6 MHz, inductor core losses, proximity effects, and skin effects become more important. Usually, an inductor with a larger form factor yields higher efficiency. The efficiency difference between different inductors can vary between 2% to 10%. For the TPS6510x series, inductor values between 3.3 µH and 6.8 µH are a good choice but other values can be used as well. Possible inductors are shown in Table 1. Submit Documentation Feedback 13 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 APPLICATION INFORMATION (continued) Table 1. Inductor Selection DEVICE TPS65100 TPS65105 INDUCTOR VALUE COMPONENT SUPPLIER DIMENSIONS / mm ISAT/DCR 4.7 µH Coilcraft DO1813P-472HC 8,89 x 6,1 x 5 2.6 A/54 mΩ 4.2 µH Sumida CDRH5D28 4R2 5,7 x 5,7 x 3 2.2 A/23 mΩ 4.7 µH Sumida CDC5D23 4R7 6 x 6 x 2,5 1.6 A/48 mΩ 3.3 µH Wuerth Elektronik 744042003 4,8 x 4,8 x 2 1.8 A/65 mΩ 4.2 µH Sumida CDRH6D12 4R2 6,5 x 6,5 x 1,5 1.8 A/60 mΩ 3.3 µH Sumida CDRH6D12 3R3 6,5 x 6,5 x 1,5 1.9 A/50 mΩ 3.3 µH Sumida CDPH4D19 3R3 5,1 x 5,1 x 2 1.5 A/26 mΩ 3.3 µH Coilcraft DO1606T-332 6,5 x 5,2 x 2 1.4 A/120 mΩ 3.3 µH Sumida CDRH2D18/HP 3R3 3,2 x 3,2 x 2 1.45 A/69 mΩ 4.7 µH Wuerth Elektronik 744010004 5,5 x 3,5 x 1 1.0 A/260 mΩ 3.3 µH Coilcraft LPO6610-332M 6,6 x 5,5 x 1 1.3 A/160 mΩ Output Capacitor Selection For the best output voltage filtering, a low ESR output capacitor is recommended. Ceramic capacitors have a low ESR value, but depending on the application, tantalum capacitors can be used as well. A 22-µF ceramic output capacitor works for most of the applications. Higher capacitor values can be used to improve the load transient regulation. See Table 2 for selection of the output capacitor. The output voltage ripple can be calculated as: Ip L I V out out 1 I p ESR Cout f s Vout V V d in with: IP = Peak switch current as calculated in the previous section with ISW(peak). L = Selected inductor value IOUT = Normal load current fs = Switching frequency Vd = Rectifier diode forward voltage (typical 0.3 V) COUT = Selected output capacitor ESR = Output capacitor ESR value Input Capacitor Selection For good input voltage filtering, low ESR ceramic capacitors are recommended. A 22-µF ceramic input capacitor is sufficient for most of the applications. For better input voltage filtering, this value can be increased. See Table 2 and the typical applications for input capacitor recommendations. Table 2. Input and Output Capacitors Selection CAPACITOR VOLTAGE RATING COMPONENT SUPPLIER COMMENTS 22 µF/1210 16 V Taiyo Yuden EMK325BY226MM Cout 22 µF/1206 6.3 V Taiyo Yuden JMK316BJ226 Cin Rectifier Diode Selection To achieve high efficiency, a Schottky diode should be used. The voltage rating should be higher than the maximum output voltage of the converter. The average forward current should be equal to the average inductor current of the converter. The main parameter influencing the efficiency of the converter is the forward voltage and the reverse leakage current of the diode; both should be as low as possible. Possible diodes are: On Semiconductor MBRM120L, Microsemi UPS120E, and Fairchild Semiconductor MBRS130L. 14 Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 Converter Loop Design and Stability The TPS6510x series converter loop can be externally compensated and allows access to the internal transconductance error amplifier output at the COMP pin. A small feedforward capacitor across the upper feedback resistor divider speeds up the circuit as well. To test the converter stability and load transient performance of the converter, a load step from 50 mA to 250 mA is applied, and the output voltage of the converter is monitored. Applying load steps to the converter output is a good tool to judge the stability of such a boost converter. Design Procedure Quick Steps 1. Select the feedback resistor divider to set the output voltage. 2. Select the feedforward capacitor to place a zero at 50 kHz. 3. Select the compensation capacitor on pin COMP. The smaller the value, the higher the low frequency gain. 4. Use a 50-kΩ potentiometer in series to Cc and monitor Vout during load transients. Fine tune the load transient by adjusting the potentiometer. Select a resistor value that comes closest to the potentiometer resistor value. This needs to be done at the highest Vin and highest load current since the stability is most critical at these conditions. Setting the Output Voltage and Selecting the Feedforward Capacitor The output voltage is set by the external resistor divider and is calculated as: V out 1.146 V 1 R1 R2 Across the upper resistor a bypass capacitor is required to speed up the circuit during load transients as shown in Figure 15. VO1 Up to 10 V/150 mA D1 C8 6.8 pF SW SW R1 430 kΩ C4 22 µF FB1 SUP C2+ C2−/MODE C2 0.22 µF R2 56 kΩ Figure 15. Feedforward Capacitor Together with R1 the bypass capacitor C8 sets a zero in the control loop at approximately 50 kHz: 1 ƒz 2 C8 R1 A value closest to the calculated value should be used. Larger feedforward capacitor values reduce the load regulation of the converter and cause load steps as shown in Figure 16. Submit Documentation Feedback 15 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 Load Step Figure 16. Load Step Caused By A Too Large Feedforward Capacitor Value Compensation The regulator loop can be compensated by adjusting the external components connected to the COMP pin. The COMP pin is connected to the output of the internal transconductance error amplifier. A typical compensation scheme is shown in Figure 17. RC 15 kΩ CC VIN COMP 1 nF Figure 17. Compensation Network The compensation capacitor CC adjusts the low frequency gain and the resistor value adjusts the high frequency gain. The formula below calculates at what frequency the resistor increases the high frequency gain. 1 fz 2 Cc Rc Lower input voltages require a higher gain and therefore a lower compensation capacitor value. A good start is CC = 1 nF for a 3.3-V input and CC = 2.2 nF for a 5-V input. If the device operates over the entire input voltage range from 2.7 V to 5.8 V, a large compensation capacitor up to 10 nF is recommended. Figure 18 shows the load transient with a larger compensation capacitor, and Figure 19 shows a smaller compensation capacitor. Figure 18. Cc = 4.7 nF 16 Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 Figure 19. Cc = 1 nF Lastly, Rc needs to be selected. A good practice is to use a 50-kΩ potentiometer and adjust the potentiometer for best load transient where no oscillations should occur. These tests have to be done at the highest Vin and highest load current because converter stability is most critical under these conditions. Figure 20, Figure 21, and Figure 22 show the fine tuning of the loop with Rc. Figure 20. Overcompensated (Damped Oscillation), Rc Is Too Large Figure 21. Undercompensated (Loop Is Too Slow), Rc Is Too Small Submit Documentation Feedback 17 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 Figure 22. Optimum, Rc Is Ideal Negative Charge Pump The negative charge pump provides a regulated output voltage by inverting the main output voltage VO1. The negative charge pump output voltage is set with external feedback resistors. The maximum load current of the negative charge pump depends on the voltage drop across the external Schottky diodes, the internal on resistance of the charge pump MOSFETS Q8 and Q9, and the impedance of the flying capacitor C12. When the voltage drop across these components is larger than the voltage difference from VO1 to VO2, the charge pump is in dropout, providing the maximum possible output current. Therefore, the higher the voltage difference between VO1 and VO2, the higher the possible load current. See Figure 12 for the possible output current versus boost converter voltage VO1. VO(min) = -(VO - 2 VD - Io (2 x rDS(on)Q8 + 2 x rDS(on)Q9 + Xcfly)) Setting the output voltage: VOUT = -VREF x R3 = -1.213 V x R3 R4 R4 |VOUT| |VOUT| R3 = R4 x = R4 x VREF 1.213 The lower feedback resistor value R4 should be in a range between 40 kΩ to 120 kΩ or the overall feedback resistance should be within 500 kΩ to 1 MΩ. Smaller values load the reference too heavily and larger values may cause stability problems. The negative charge pump requires two external Schottky diodes. The peak current rating of the Schottky diode has to be twice the load current of the output. For a 20-mA output current, the dual Schottky diode BAT54 or similar is a good choice. Positive Charge Pump The positive charge pump can be operated in a voltage doubler mode or a voltage tripler mode depending on the configuration of the C2+ and C2-/MODE pins. Leaving the C2+ pin open and connecting C2-/MODE to GND forces the positive charge pump to operate in a voltage doubler mode. If higher output voltages are required, the positive charge pump can be operated as a voltage tripler. To operate the charge pump in the voltage tripler mode, a flying capacitor needs to be connected to C2+ and C2-/MODE. The maximum load current of the positive charge pump depends on the voltage drop across the internal Schottky diodes, the internal on resistance of the charge pump MOSFETS, and the impedance of the flying capacitor. When the voltage drop across these components is larger than the voltage difference VO1 x 2 to VO3 (doubler mode) or VO1 x 3 to VO3 (tripler mode), then the charge pump is in dropout, providing the maximum possible output current. Therefore, the higher the voltage difference between VO1 x 2 (doubler) or VO1 x 3 (tripler) to VO3, the higher the possible load current. See Figure 13 and Figure 14 for the output current versus boost converter voltage VO1 and the following calculations. Voltage doubler: VO3max = 2 x VO1 - (2 VD + 2 x Io x (2 x rDS(on)Q5 + rDS(on)Q3 + rDS(on)Q4 + XC1)) Voltage tripler: VO3max = 3 x VO1 - (3 x VD + 2 x Io x (3 x rDS(on)Q5 + rDS(on)Q3 + rDS(on)Q4 + XC1 + XC2)) 18 Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 The output voltage is set by the external resistor divider and is calculated as: V out 1.214 1 R5 R6 R5 R6 Vout V FB 1 R6 V out 1 1.214 VCOM Buffer The VCOM buffer is typically used to drive the backplane of a TFT panel. The VCOM output voltage is typically set to half of the main output voltage VO1 plus a small shift to implement the specific compensation voltage. The TFT video signal gets coupled through the TFT storage capacitor plus the LCD cell capacitance to the output of the VCOM buffer. Because of these, short current pulses in the positive and negative direction appear at the output of the VCOM buffer. To minimize the output voltage ripple caused by the current pulses, a transconductance amplifier having a current source output and an output capacitor is used. The output capacitor supports the high frequency part of the current pulses drawn from the LCD panel. The VCOM buffer only needs to handle the low frequency portion of the current pulses. A 1-µF ceramic output capacitor is sufficient for most of the applications. When using other output capacitor values it is important to keep in mind that the output capacitor is part of the VCOM buffer loop stabilization. The VCOM buffer has an integrated soft start to avoid voltage drops on VO1 during start-up. The soft start is implemented as such that the VCOMIN is held low until the VCOM buffer is fully biased and the common mode range is reached. Then the positive input is released and the VCOM buffer output slowly comes up. Usually a 1-nF capacitor on VCOMIN to GND is used to filter high frequency noise coupled in from VO1. The size of this capacitor together with the upper feedback resistor value determines the start-up time. The larger the capacitor from VCOMIN to GND, the slower the soft start. Linear Regulator Controller The TPS6510x series includes a linear regulator controller to generate a 3.3-V rail when the system is powered from a 5-V supply. Because an external npn transistor is required, the input voltage of the TPS6510x series applied to VIN needs to be higher than the output voltage of the regulator. To provide a minimum base drive current of 13.5 mA, a minimum internal voltage drop of 500 mV from Vin to Vbase is required. This can be translated into a minimum input voltage on VIN for a certain output voltage as the following calculation shows: VINmin= VO4 + VBE + 0.5 V The base drive current together with the hFE of the external transistor determines the possible output current. Using a standard npn transistor like the BCP68 allows an output current of 1 A and using the BCP54 allows a load current of 337 mA for an input voltage of 5 V. Other transistors can be used as well depending on the required output current, power dissipation, and PCB space. The device is stable with a 4.7-µF ceramic output capacitor. Larger output capacitor values can be used to improve the load transient response when higher load currents are required. Layout Considerations For all switching power supplies, the layout is an important step in the design, especially at high-peak currents and switching frequencies. If the layout is not carefully designed, the regulator might show stability and EMI problems. Therefore, the traces carrying high-switching currents should be routed first using wide and short traces. The input filter capacitor should be placed as close as possible to the input pin VIN of the IC. See the evaluation module (EVM) for a layout example. Thermal Information An influential component of thermal performance of a package is board design. To take full advantage of the heat dissipation abilities of the PowerPAD or QFN package with exposed thermal die, a board that acts similar to a heat sink and allows the use of an exposed (and solderable) deep downset pad should be used. For further information, see the Texas Instrumens application notes (SLMA002) PowerPAD Thermally Enhanced Package, and (SLMA004) PowerPAD Made Easy. For the QFN package, see the application report (SLUA271) QFN/SON PCB Attachement. Especially for the QFN package it is required to solder down the Thermal Pad to achieve the required thermal resistance. Submit Documentation Feedback 19 TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 VI 3.3 V L1 3.3 µH C3 22 µF Vo1 R9 15 kΩ R7 500 kΩ C14 1 nF C5 0.22 µF VIN COMP R8 500 kΩ D2 VO2 −5 V/20 mA R3 620 kΩ C8 6.8 pF TPS65100 C9 1 nF C1 0.22 µF C12 0.22 µF D3 SW SW VCOMIN FB1 EN SUP ENR C1+ C1− DRV C2+ C2−/MODE C2 0.22 µF R1 430 kΩ VO3 23 V/20 mA FB3 VCOM REF FB4 PGND PGND C4 22 µF R2 56 kΩ OUT3 FB2 BASE VO1 10 V/300 mA D1 R5 1M C6 0.22 µF GND R3 150 kΩ R6 56 kΩ C11 220 nF Vcom 5V C7 1 µF Figure 23. Typical Application, Notebook supply 20 Submit Documentation Feedback TPS65100, TPS65101 TPS65105 www.ti.com SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 L1 4.7 µH CDRH5D18−4R1 Vin 5V C3 22 µF R9 4.3 kΩ R7 500 kΩ VO1 VIN COMP VCOMIN C14 1 nF VO2 −7 V/20 mA R8 500 kΩ C1 0.22 µF C12 0.22 µF D2 C6 0.22 µF C5 3.3 pF TPS65100 C9 2.2 nF R3 750 kΩ D3 EN ENR C1+ C1− DRV FB2 REF FB4 BASE VO1 13.5 V/400 mA D1 SW SW FB1 SUP R2 75 kΩ C2+ C2−/MODE VO3 23 V/20 mA OUT3 FB3 VCOM PGND PGND C7 0.22 µF R5 1 MΩ GND R4 130 kΩ C11 220 nF C4 22 µF R1 820 kΩ R6 56 kΩ Q1 BCP68 Vin C12 1 µF VO4 3.3 V/500 mA C10 4.7 µF Vcom 7V C8 1 µF Figure 24. Typical Application, Monitor Supply Submit Documentation Feedback 21 PACKAGE OPTION ADDENDUM www.ti.com 19-Oct-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS65100PWP ACTIVE HTSSOP PWP 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65100PWPG4 ACTIVE HTSSOP PWP 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65100PWPR ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65100PWPRG4 ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65100RGER ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65100RGERG4 ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65101PWP ACTIVE HTSSOP PWP 24 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65101PWPG4 ACTIVE HTSSOP PWP 24 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65101PWPR ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65101PWPRG4 ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65101RGER ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65101RGERG4 ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65105PWP ACTIVE HTSSOP PWP 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65105PWPG4 ACTIVE HTSSOP PWP 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65105PWPR ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65105PWPRG4 ACTIVE HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65105RGER ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS65105RGERG4 ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 19-Oct-2007 package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS65100PWPR PWP 24 SITE 60 330 16 6.95 8.3 1.6 8 16 Q1 TPS65100RGER RGE 24 SITE 41 330 12 4.3 4.3 1.5 8 12 Q2 TPS65101PWPR PWP 24 SITE 60 330 16 6.95 8.3 1.6 8 16 Q1 TPS65101RGER RGE 24 SITE 41 330 12 4.3 4.3 1.5 8 12 Q2 TPS65105PWPR PWP 24 SITE 60 330 16 6.95 8.3 1.6 8 16 Q1 TPS65105RGER RGE 24 SITE 28 330 12 4.3 4.3 1.5 8 12 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) TPS65100PWPR PWP 24 SITE 60 346.0 346.0 33.0 TPS65100RGER RGE 24 SITE 41 346.0 346.0 29.0 TPS65101PWPR PWP 24 SITE 60 346.0 346.0 33.0 TPS65101RGER RGE 24 SITE 41 346.0 346.0 29.0 TPS65105PWPR PWP 24 SITE 60 346.0 346.0 33.0 TPS65105RGER RGE 24 SITE 28 342.9 336.6 28.58 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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