Ordering number : EN6792 LC75814V CMOS LSI 1/4 Duty General-Purpose LCD Driver http://onsemi.com Overview The LC75814V is a 1/4 duty general-purpose LCD driver that can be used for frequency display in electronic tuners under the control of a microcontroller. The LC75814V can drive an LCD with up to 64 segments directly. The LC75814V can also control up to 4 generalpurpose output ports. Since the LC75814V uses separate power supply systems for the LCD drive block and the logic block, the LCD driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage. SSOP30(275mil) Package Dimensions unit : mm (typ) 9.75 0.5 5.6 7.6 30 1 0.65 0.15 0.22 1.5 MAX (0.33) 0.1 Support for 1/4 duty 1/2 bias or 1/4 duty 1/3 bias drive of up to 64 segments under serial data control. Serial data input supports CCB format communication with the system controller. Serial data control of the power-saving mode based backup function and all the segments forced off function Serial data control of switching between the segment output port and the general-purpose output port functions High generality, since display data is displayed directly without decoder intervention. Independent VLCD for the LCD driver block (VLCD can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.) The INH pin can force the display to the off state. RC oscillator circuit (1.3) Features CCB is ON Semiconductor® ’s original format. All addresses are managed by ON Semiconductor® for this format. CCB is a registered trademark of Semiconductor Components Industries, LLC. ORDERING INFORMATION See detailed ordering and shipping information on page 14 of this data sheet. Semiconductor Components Industries, LLC, 2013 October, 2013 71001TN (OT) No.6792-1/14 LC75814V Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Symbol Maximum supply voltage Conditions Ratings Unit VDD max VDD –0.3 to +7.0 V VLCD max VLCD –0.3 to +7.0 V VIN 1 CE, CL, DI, INH –0.3 to +7.0 V VIN 2 OSC –0.3 to VDD + 0.3 V VIN 3 VLCD 1, VLCD 2 –0.3 to VLCD + 0.3 V –0.3 to VDD + 0.3 V Input voltage Output voltage Output current Allowable power dissipation VOUT 1 OSC VOUT 2 S1 to S16, COM1 to COM4, P1 to P4 IOUT 1 S1 to S16 IOUT 2 IOUT 3 Pd max –0.3 to VLCD + 0.3 V 300 µA COM1 to COM4 3 mA P1 to P4 5 mA 100 mW Ta = 85°C Operating temperature Topr –40 to +85 °C Storage temperature Tstg –55 to +125 °C Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Ratings Parameter Supply voltage Input voltage Input high level voltage Input low level voltage Symbol Conditions min typ Unit max VDD VDD 2.7 6.0 V VLCD VLCD 2.7 6.0 V VLCD1 VLCD1 2/3 VLCD VLCD V VLCD2 VLCD2 1/3 VLCD VLCD V 6.0 V VIH CE, CL, DI, INH 0.8 VDD VIL CE, CL, DI, INH 0 Recommended external resistance ROSC OSC Recommended external capacitance COSC OSC Guaranteed oscillation range fOSC OSC 0.2 VDD 43 680 25 50 V kΩ pF 100 kHz Data setup time tds CL, DI: Figure 2 160 ns Data hold time tdh CL, DI: Figure 2 160 ns CE wait time tcp CE, CL: Figure 2 160 ns CE setup time tcs CE, CL: Figure 2 160 ns CE hold time tch CE, CL: Figure 2 160 ns High level clock pulse width tøH CL: Figure 2 160 ns Low level clock pulse width tøL CL: Figure 2 160 Rise time tr CE, CL, DI: Figure 2 Fall time tf CE, CL, DI: Figure 2 INH switching time tc INH, CE: Figure 3 ns 160 ns 160 ns 10 µs VDD COM4 COM3 COM2 COM1 S16 S11 S12 S13 S14 S15 VLCD S10 VLCD1 VLCD2 VSS OSC INH CE CL DI Pin Assignment S9 S8 S7 S6 S5 P4/S4 P3/S3 P2/S2 P1/S1 LC75814V Top view ILC00283 No. 6792-2/14 LC75814V Electrical Characteristics for the Allowable Operating Ranges Ratings Parameter Symbol Conditions Hysteresis VH CE, CL, DI, INH Input high level current IIH CE, CL, DI, INH; VI = 6.0 V IIL CE, CL, DI, INH; VI = 0 V Input low level current Output high level voltage Output low level voltage Output middle level voltage*1 Oscillator frequency Current drain min typ Unit max 0.1 VDD V 5.0 µA –5.0 µA VOH 1 S1 to S16; IO = –20 µA VLCD – 0.9 V VOH 2 COM1 to COM4; IO = –100 µA VLCD – 0.9 V VOH 3 P1 to P4; IO = –1 mA VLCD – 0.9 VOL 1 S1 to S16; IO = 20 µA 0.9 VOL 2 COM1 to COM4; IO = 100 µA 0.9 V VOL 3 P1 to P4; IO = 1 mA 0.9 V VMID 1 COM1 to COM4; 1/2 bias, IO = ±100 µA 1/2 VLCD – 0.9 1/2 VLCD + 0.9 V VMID 2 S1 to S16; 1/3 bias, IO = ±20 µA 2/3 VLCD – 0.9 2/3 VLCD + 0.9 V VMID 3 S1 to S16; 1/3 bias, IO = ±20 µA 1/3 VLCD – 0.9 1/3 VLCD + 0.9 V VMID 4 COM1 to COM4; 1/3 bias, IO = ±100 µA 2/3 VLCD – 0.9 2/3 VLCD + 0.9 V VMID 5 COM1 to COM4; 1/3 bias, IO = ±100 µA 1/3 VLCD – 0.9 1/3 VLCD + 0.9 V fOSC OSC; ROSC = 43 kΩ, COSC = 680 pF IDD 1 VDD; power saving mode IDD 2 VDD; VDD = 6.0 V, output open, fosc = 50 k Hz ILCD 1 VLCD; power saving mode ILCD 2 VLCD; VLCD = 6.0 V, output open 1/2 bias, fosc = 50 k Hz ILCD 3 VLCD; VLCD = 6.0 V, output open 1/3 bias, fosc = 50 k Hz 40 V 50 60 V kHz 5 µA 460 µA 5 µA 100 200 µA 60 120 µA 230 Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.) VLCD VLCD1 To the common segments drivers VLCD2 Except these resistors VSS ILC00269 Figure 1 No. 6792-3/14 LC75814V 1. When CL is stopped at the low level VIH CE VIL tøH CL tøL VIH 50% VIL tf tr DI tcp tcs tch VIH VIL tds tdh ILC00270 2. When CL is stopped at the high level VIH CE VIL tøL tøH VIH 50% VIL CL tr tf tcp tcs tch VIH VIL DI tds tdh ILC00271 Figure 2 COMMON DRIVER SEGMENT DRIVER & LATCH CLOCK GENERATOR SHIFT REGISTER S1 / P1 S2 / P2 S3 / P3 S4 / P4 S5 S15 S16 COM1 COM2 COM3 COM4 Block Diagram INH OSC VDD VLCD VLCD1 ADDRESS DETECTOR VLCD2 CE CL DI VSS ILC00272 No. 6792-4/14 LC75814V Pin Functions Pin Pin No. S1/P1 to S4/P4 S5 to S16 1 to 4 Active I/O Handling when unused Segment outputs for displaying the display data transferred by serial data input. The pins S1/P1 to S4/P4 can be used as general-purpose output ports when so set up by the control data. — O Open Common driver outputs. The frame frequency fO is given by: fO = (fOSC/512) Hz. — O Open — I/O VDD I GND Function 5 to 16 COM1 COM2 COM3 COM4 17 to 20 OSC 26 Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitor to this pin. CE CL DI 28 29 30 Serial data transfer inputs. These pins are connected to the control microprocessor. INH 27 Display off control input •INH = low (VSS): Off S1/P1 to S4/P4 = Low (These pins are forcibly set to the segment output port function and fixed at the VSS level.) S5 to S16 = Low (VSS), COM1 to COM4 = Low (VSS) •INH = high (VDD): On Note that serial data transfers can be performed when the display is forced off by this pin. L I GND VLCD1 23 Used to apply the LCD drive 2/3 bias voltage externally. This pin must be connected to VLCD2 when 1/2 bias drive is used. — I Open VLCD2 24 Used to apply the LCD drive 1/3 bias voltage externally. This pin must be connected to VLCD1 when 1/2 bias drive is used. — I Open H CE: Chip enable CL: Synchronization clock DI: Transfer data — VDD 21 Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V. — — — VLCD 22 LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V. — — — VSS 25 Ground pin. Connect to ground. — — — Serial Data Transfer Format 1. When CL is stopped at the low level CE CL DI 1 1 1 1 0 0 1 0 D1 D2 D3 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 0 P0 P1 P2 DR SC BU 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits 1 1 1 1 0 0 Display data 32 bits 1 0 D33 D34 D35 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64 0 Control data 7 bits 0 0 0 0 DD 1 bit 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits Display data 32 bits Fixed data 7 bits DD 1 bit ILC00273 Note: DD ... Direction data No. 6792-5/14 LC75814V 2. When CL is stopped at the high level CE CL DI 1 1 1 1 0 0 1 B0 B1 B2 B3 A0 A1 A2 0 D1 D2 D3 CCB address 8 bits 1 1 1 1 0 0 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 0 P0 P1 P2 DR SC BU 0 A3 Display data 32 bits 1 B0 B1 B2 B3 A0 A1 A2 0 D33 D34 D35 Control data 7 bits D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64 0 0 0 0 0 DD 1 bit 0 0 1 A3 CCB address 8 bits Display data 32 bits Fixed data 7 bits DD 1 bit ILC00274 Note: DD ... Direction data • • • • • • CCB address...............4FH D1 to D64...................Display data P0 to P2 ......................Segment output port/general-purpose output port switching control data DR ..............................1/2 bias drive or 1/3 bias drive switching control data SC...............................Segments on/off control data BU ..............................Normal mode/power-saving mode control data Serial Data Transfer Examples • When 33 or more segments are used, all 80 bits of the serial data must be sent. 8 bits 1 1 1 1 0 40 bits 0 1 0 D1 D2 D3 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 0 D33 D34 D35 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64 0 P0 P1 P2 DR SC BU 0 B0 B1 B2 B3 A0 A1 A2 A3 1 1 1 1 0 0 1 0 0 0 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 • When fewer than 33 segments are used, only 40 bits of serial data need to be sent. However, the display data D1 to D32 and the control data must be sent. 8 bits 1 1 1 1 0 40 bits 0 1 0 D1 D2 D3 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 0 P0 P1 P2 DR SC BU 0 B0 B1 B2 B3 A0 A1 A2 A3 Note: When fewer than 33 segments are used, transfers such as that shown in the figure below cannot be used. 8 bits 1 1 1 1 0 40 bits 0 1 0 D33 D34 D35 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64 0 0 0 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 ILC00275 No. 6792-6/14 LC75814V Control Data Functions 1. P0 to P2: Segment output port/general-purpose output port switching control data. These control data bits switch the S1/P1 to S4/P4 output pins between their segment output port and general-purpose output port functions. Control data Output pin states P0 P1 P2 S1/P1 S2/P2 S3/P3 0 0 0 S1 S2 S3 S4/P4 S4 0 0 1 P1 S2 S3 S4 0 1 0 P1 P2 S3 S4 0 1 1 P1 P2 P3 S4 1 0 0 P1 P2 P3 P4 Note: Sn (n = 1 to 4): Segment output ports Pn (n = 1 to 4): General-purpose output ports Also note that when the general-purpose output port function is selected, the output pins and the display data will have the correspondences listed in the tables below. Output pin Corresponding display data S1/P1 D1 S2/P2 D5 S3/P3 D9 S4/P4 D13 For example, if the output pin S4/P4 has the general-purpose output port function selected, it will output a high level (VLCD) when the display data D13 is 1, and will output a low level (VSS) when D13 is 0. 2. DR: 1/2 bias drive or 1/3 bias drive switching control data This control data bit selects either 1/2 bias drive or 1/3 bias drive. DR Drive type 0 1/3 bias drive 1 1/2 bias drive 3. SC: Segments on/off control data This control data bit controls the on/off state of the segments. SC Display state 0 On 1 Off However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off waveforms from the segment output pins. 4. BU: Normal mode/power-saving mode control data This control data bit selects either normal mode or power-saving mode. BU Mode 0 Normal mode 1 Power saving mode (The OSC pin oscillator is stopped, and the common and segment output pins go to the VSS level. However, the S1/P1 to S4/P4 output pins that are set to be general-purpose output ports by the control data P0 to P2 can be used as generalpurpose output ports.) No. 6792-7/14 LC75814V Display Data to Segment Output Pin Correspondence Segment output pin COM1 COM2 COM3 COM4 S1/P1 D1 D2 D3 D4 S2/P2 D5 D6 D7 D8 S3/P3 D9 D10 D11 D12 S4/P4 D13 D14 D15 D16 S5 D17 D18 D19 D20 S6 D21 D22 D23 D24 S7 D25 D26 D27 D28 S8 D29 D30 D31 D32 S9 D33 D34 D35 D36 S10 D37 D38 D39 D40 S11 D41 D42 D43 D44 D48 S12 D45 D46 D47 S13 D49 D50 D51 D52 S14 D53 D54 D55 D56 S15 D57 D58 D59 D60 S16 D61 D62 D63 D64 Note: This applies to the case where the S1/P1 to S4/P4 output pins are set to be segment output ports. For example, the table below lists the segment output states for the S11 output pin. Display data D41 D42 D43 D44 Segment output pin (S11) state 0 0 0 0 The LCD segments corresponding to COM1 to COM4 are off. 0 0 0 1 The LCD segment corresponding to COM4 is on. 0 0 1 0 The LCD segment corresponding to COM3 is on. 0 0 1 1 The LCD segments corresponding to COM3 and COM4 are on. 0 1 0 0 The LCD segment corresponding to COM2 is on. 0 1 0 1 The LCD segments corresponding to COM2 and COM4 are on. 0 1 1 0 The LCD segments corresponding to COM2 and COM3 are on. 0 1 1 1 The LCD segments corresponding to COM2, COM3 and COM4 are on. 1 0 0 0 The LCD segment corresponding to COM1 is on. 1 0 0 1 The LCD segments corresponding to COM1 and COM4 are on. 1 0 1 0 The LCD segments corresponding to COM1 and COM3 are on. 1 0 1 1 The LCD segments corresponding to COM1, COM3 and COM4 are on. 1 1 0 0 The LCD segments corresponding to COM1 and COM2 are on. 1 1 0 1 The LCD segments corresponding to COM1, COM2 and COM4 are on. 1 1 1 0 The LCD segments corresponding to COM1 to COM3 are on. 1 1 1 1 The LCD segments corresponding to COM1 to COM4 are on. No. 6792-8/14 LC75814V 1/4 Duty, 1/2 Bias Drive Technique fOSC [Hz] 512 VLCD VLCD1, VLCD2 COM1 0V VLCD VLCD1, VLCD2 COM2 0V VLCD VLCD1, VLCD2 COM3 0V VLCD VLCD1, VLCD2 COM4 0V LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. VLCD VLCD1, VLCD2 LCD driver output when only LCD segments corresponding to COM1 are on. VLCD VLCD1, VLCD2 LCD driver output when only LCD segments corresponding to COM2 are on. VLCD VLCD1, VLCD2 LCD driver output when LCD segments corresponding to COM1 and COM2 are on. VLCD VLCD1, VLCD2 LCD driver output when only LCD segments corresponding to COM3 are on. VLCD VLCD1, VLCD2 LCD driver output when LCD segments corresponding to COM1 and COM3 are on. VLCD VLCD1, VLCD2 LCD driver output when LCD segments corresponding to COM2 and COM3 are on. VLCD VLCD1, VLCD2 LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. VLCD VLCD1, VLCD2 LCD driver output when only LCD segments corresponding to COM4 are on. VLCD VLCD1, VLCD2 LCD driver output when LCD segments corresponding to COM2 and COM4 are on. VLCD VLCD1, VLCD2 LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. VLCD VLCD1, VLCD2 0V 0V 0V 0V 0V 0V 0V 0V 0V 0V 0V ILC00276 1/4 Duty, 1/2 Bias Waveforms No. 6792-9/14 LC75814V 1/4 Duty, 1/3 Bias Drive Technique fOSC [Hz] 512 COM1 VLCD VLCD1 VLCD2 0V COM2 VLCD VLCD1 VLCD2 0V COM3 VLCD VLCD1 VLCD2 0V COM4 VLCD VLCD1 VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. VLCD VLCD1 VLCD2 0V LCD driver output when only LCD segments corresponding to COM1 are on. VLCD VLCD1 VLCD2 0V LCD driver output when only LCD segments corresponding to COM2 are on. VLCD VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM2 are on. VLCD VLCD1 VLCD2 0V LCD driver output when only LCD segments corresponding to COM3 are on. VLCD VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM3 are on. VLCD VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM2 and COM3 are on. VLCD VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. VLCD VLCD1 VLCD2 0V LCD driver output when only LCD segments corresponding to COM4 are on. VLCD VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM2 and COM4 are on. VLCD VLCD1 VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. VLCD VLCD1 VLCD2 0V ILC00277 1/4 Duty, 1/3 Bias Waveforms No. 6792-10/14 LC75814V The INH pin and Display Control Since the IC internal data (the display data D1 to D64 and the control data) is undefined when power is first applied, applications should set the INH pin low at the same time as power is applied to turn off the display (This sets the S1/P1 to S4/P4, S5 to S16, and COM1 to COM4 to the VSS level.) and during this period send serial data from the controller. The controller should then set the INH pin high after the data transfer has completed. This procedure prevents meaningless displays at power on. (See Figure 3.) Notes on the Power On/Off Sequences Applications should observe the following sequence when turning the LC75814V power on and off. • At power on: Logic block power supply (VDD) on → LCD driver block power supply (VLCD) on • At power off: LCD driver block power supply (VLCD) off → Logic block power supply (VDD) off However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and off at the same time. t2 t1 t3 VDD VLCD INH VIL tc CE VIL Display and control data transfer Internal data D1 to D32 P0 to P2 DR, SC, BU Internal data (D33 to D64) Undefined Undefined Defined Undefined Defined Note: t1 ≥ 0 t2 > 0 t3 ≥ 0 (t2 > t3) tc ... 10 µs min Undefined ILC00278 Figure 3 Notes on Controller Transfer of Display Data Since the LC75814V accept display data (D1 to D64) divided into two separate transfer operations, we recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observable degradation of display quality. No. 6792-11/14 LC75814V Sample Application Circuit 1 1/2 Bias (for use with normal panels) (P1) (P2) (P3) *2 (P4) General-purpose output ports Used for functions such as backlight control OSC +3V COM1 VDD COM2 COM3 VSS LCD panel (up to 64 segments) COM4 P1 / S1 +5V P2 / S2 VLCD P3 / S3 P4 / S4 VLCD1 S5 VLCD2 C ≥ 0.047 µF C INH From the microcontroller CE S14 CL S15 DI S16 ILC00279 Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. Sample Application Circuit 2 1/2 Bias (for use with large panels) (P1) (P2) (P3) *2 (P4) General-purpose output ports Used for functions such as backlight control OSC +3V VDD COM1 COM2 COM3 COM4 P1 / S1 +5V VLCD P2 / S2 P3 / S3 R VLCD1 P4 / S4 S5 10 kΩ ≥ R ≥ 1 kΩ C ≥ 0.047 µF VLCD2 C R LCD panel (up to 64 segments) VSS INH From the microcontroller CE S14 CL S15 DI S16 ILC00280 Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. No. 6792-12/14 LC75814V Sample Application Circuit 3 1/3 Bias (for use with normal panels) (P1) (P2) (P3) *2 (P4) General-purpose output ports Used for functions such as backlight control OSC +3V COM1 VDD COM2 COM3 VSS LCD panel (up to 64 segments) COM4 P1 / S1 +5V P2 / S2 VLCD P3 / S3 P4 / S4 VLCD1 S5 VLCD2 C ≥ 0.047µF C C INH From the microcontroller CE S14 CL S15 DI S16 ILC00281 Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. Sample Application Circuit 4 1/3 Bias (for use with large panels) (P1) (P2) (P3) *2 (P4) General-purpose output ports Used for functions such as backlight control OSC +3V VDD COM1 COM2 COM3 COM4 P1 / S1 +5V VLCD VLCD1 P4 / S4 S5 R 10 kΩ ≥ R ≥ 1 kΩ C ≥ 0.047 µF P2 / S2 P3 / S3 R VLCD2 C C R LCD panel (up to 64 segments) VSS INH From the microcontroller CE S14 CL S15 DI S16 ILC00282 Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. No. 6792-13/14 LC75814V ORDERING INFORMATION Device LC75814V-TLM-E Package SSOP30(275mil) (Pb-Free) LC75814VS-TLM-E SSOP30(275mil) (Pb-Free) Shipping (Qty / Packing) 1000 / Tape & Reel 1000 / Tape & Reel ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 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SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No.6792-14/14