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Tel: 886-2-66296288
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URL: http://www.princeton.com.tw
LCD Driver IC
PT6574
DESCRIPTION
PT6574 is a 1/4 -duty general purpose LCD Driver IC utilizing CMOS Technology. It can drive up to 264
segments and control up to 8 general purpose output ports. The LCD drive block voltage range is from
2.7V to 6.0V and is independent of the logic block power supply voltage. Under a serial data interface,
PT6574 can support 1/4 duty, 1/2 bias or 1/4 duty, 1/3 bias drive techniques. Display data is displayed
directly without the need for a decoder circuit. Pin assignments and application circuit are optimized for
easy PCB Layout and cost saving advantages.
FEATURES
•
•
•
•
•
CMOS Technology
RC Oscillator Circuit
Up to 264 Segments
Supports 1/4 Duty, 1/2 Bias Drive or 1/4 Duty 1/3 Bias Drive Techniques (Serial Data Control)
RC Oscillation Circuit
APPLICATIONS
•
•
•
•
•
•
•
•
Cellular Phone
Data Bank/Organizer
Electronic Dictionary/Translator
P.O.S.
Information Appliance
Caller ID
Pager
Electronic equipment with LCD Display Panel
PT6574 V1.4
-1-
October, 2006
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LCD Driver IC
PT6574
BLOCK DIAGRAM
COM 1
COM 2
COM 3
COM 4
S G1/P1
S G8/P8 SG 9
S G66
COM MON DRIVER
SE GME NT DRIVE R & LATCH
CLOCK G ENERATO R
SHIF T REGIS TER
/INH
OS C
VDD
V LCD
V LCD1
A DDRE SS
DE TECT OR
V LCD2
VSS
DI
PT6574 V1.4
-2-
CLK
CE
October, 2006
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LCD Driver IC
PT6574
PIN CONFIGURATION
SG64
SG63
SG62
SG61
SG60
SG59
SG58
SG57
SG56
SG55
SG54
SG53
SG52
SG51
SG50
SG49
SG48
SG47
SG46
SG45
SG44
SG43
SG42
SG41
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
80PINS, QFP
SG65
65
40
SG40
SG66
66
39
SG39
COM1
67
38
SG38
COM2
68
37
SG37
COM3
69
36
SG36
COM4
70
35
SG35
VDD
71
34
SG34
VLCD
72
33
SG33
P T 6574
80
25
SG25
PT6574 V1.4
-3-
SG24
DI
SG23
SG26
SG22
26
SG21
79
SG20
CLK
SG19
SG27
SG18
27
SG17
SG28
78
SG16
28
CE
SG15
/INH
SG14
SG29
SG13
29
77
SG12
76
SG11
OSC
SG10
SG30
SG9
30
SG8/P8
75
SG7/P7
VSS
SG6/P6
SG31
SG5/P5
31
SG4/P4
SG32
SG3/P3
32
74
SG2/P2
73
SG1/P1
VLCD1
VLCD2
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LCD Driver IC
PT6574
SG62
SG61
SG60
SG59
SG58
SG57
SG56
SG55
SG54
SG53
SG52
SG51
SG50
SG49
SG48
SG47
SG46
SG45
SG44
SG43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
80PINS, LQFP
SG 63
61
40
SG42
SG 64
62
39
SG41
SG 65
63
38
SG40
SG 66
64
37
SG39
COM1
65
36
SG38
COM2
66
35
SG37
COM3
67
34
SG36
COM4
68
33
SG35
VDD
69
32
SG34
VLCD
70
31
SG33
VLCD1
71
30
SG32
P T 6574L Q
VLCD2
72
29
SG31
VSS
73
28
SG30
OSC
74
27
SG29
/INH
75
26
SG28
PT6574 V1.4
9
10
11
12
13
14
15
16
17
18
19
20
SG 12
SG 13
SG 14
SG 15
SG 16
SG 17
SG 18
SG 19
SG 20
SG 21
SG 22
SG23
SG 11
21
8
80
SG 10
SG2/P2
7
SG24
SG9
22
6
79
SG8/P8
SG1/P1
5
SG25
SG7/P7
23
4
78
SG6/P6
DI
3
SG26
SG5/P5
24
2
SG27
SG4/P4
25
77
1
76
SG3/P3
CE
CLK
-4-
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LCD Driver IC
PT6574
INPUT/OUPUT CONFIGURATIONS
The schematic diagrams of the input and output circuits of the logic section are shown below:
INPUT PIN: CLK, CE, DI, /INH
VDD
VSS
OUTPUT PIN: SG1/P1 TO SG8/P8, SG9 TO SG66
VLCD
VLCD
VSS
VSS
VLCD1
VLCD2
OUTPUT PIN: COM1 TO COM4
VLCD
VLCD1
VLCD2
VSS
PT6574 V1.4
-5-
October, 2006
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LCD Driver IC
PT6574
PIN DESCRIPTION
Pin Name
I/O
SG1/P1 ~ SG2/P2
O
SG3/P3 ~ SG8/P8
SG9 ~ SG66
COM1 ~ COM4
OSC
CE
CLK
DI
/INH
VLCD1
VLCD2
VDD
VLCD
VSS
Description
Pin No.
QFP
LQFP
1,2
79, 80
Segment Output Driver/General Purpose Output Pin
Under the Serial Data Control, these pins may be used
O
3~8
1~6
as General Purpose Output Pins.
O Segment Output Driver
9 ~ 66 7 ~ 64
O Common Driver Output Pin
67 ~ 70 65 ~ 68
Oscillator Input / Output Pin
I/O The oscillation circuit may be constructed by connecting
76
74
external resistor and capacitor to this pin.
I Chip Enable Pin
78
76
I Clock Input Pin
79
77
I Data Input Pin
80
78
Display Off Control Input Pin
When this pin is set to "LOW", the display is forcibly
OFF. SG1/P1 to SG8/P8 are forced to function as the
Segment Output Pins and are held at the Vss Level.
I
77
75
SG9 to S66 and COM1 to COM4 are all set to "LOW" or
Vss Level. (see Notes)
When this pin is set to "HIGH" or VDD level, the display
is turned ON.
LCD Drive Bias Voltage
This pin is used to externally apply 2/3 Bias LCD Drive
73
71
Voltage. When the 1/2 Bias Drive technique is used, this
pin must be set to VLCD2.
LCD Drive Bias Voltage
This pin is used to externally apply the 1/3 Bias LCD
74
72
Drive Voltage. When the 1/2 Bias Drive Technique is
used, this pin must be connected to VLCD1
Logic Power Supply
71
69
(2.7V to 6.0V)
LCD Drive Block Power Supply
72
70
(2.7V to 6.0V)
- Ground Pin
75
73
Note: It must be noted that Serial Data Transfer is possible when the display is turned of forcible via the
/INH Pin.
PT6574 V1.4
-6-
October, 2006
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LCD Driver IC
PT6574
FUNCTION DESCRIPTION
CONTROL DATA
P0 TO P3: Segment Output Port/General - Purpose Output Port Select Control Data Bits
P0 to P3 are used to control the function of the pins -- SG1/P1 to SG8/P8. This means that P0 to
P3 control data bits are used to select either segment output port or general-output port function for
the SG1/P1 to SG8/P8. Please refer to the table below.
P0
0
0
0
0
0
0
0
0
1
CONTROL DATA
P1
P2
P3
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
SG1/P1
SG1
P1
P1
P1
P1
P1
P1
P1
P1
SG2/P2
SG2
SG2
P2
P2
P2
P2
P2
P2
P2
SG3/P3
SG3
SG3
SG3
P3
P3
P3
P3
P3
P3
OUTPUT PIN STATUS
SG4/P4 SG5/P5 SG6/P6
SG4
SG5
SG6
SG4
SG5
SG6
SG4
SG5
SG6
SG4
SG5
SG6
P4
SG5
SG6
P4
P5
SG6
P4
P5
P6
P4
P5
P6
P4
P5
P6
SG7/P7
SG7
SG7
SG7
SG7
SG7
SG7
SG7
P7
P7
SG8/P8
SG8
SG8
SG8
SG8
SG8
SG8
SG8
SG8
P8
Notes:
1. SG1 to SG8=Segment Output Port Function.
2. P1 to P8=General Purpose Output Port Function.
The relationship between the output pins and the display data when the General Purpose Output Port
Function is selected, are shown below.
Output Pin Display Data Output Pin Display Data
SG1/P1
D1
SG5/P5
D17
SG2/P2
D5
SG6/P6
D21
SG3/P3
D9
SG7/P7
D25
SG4/P4
D13
SG8/P8
D29
For example, the general purpose output port function was selected for output pin SG4/P4, then the
corresponding display data would be D13. The SG4/P4 output pin will output a high level (VLCD) when
the display data D13 is "1" and a low level (Vss) when the D13 is "0".
DR: 1/2 Bias Drive or 1/3 Bias Drive Control Data Bit
DR is used to select either 1/2 bias or 1/3 bias drive. Please refer to the table below.
DR
0
1
PT6574 V1.4
Drive Technique
1/3 Bias Drive
1/2 Bias Drive
-7-
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LCD Driver IC
PT6574
SC: Segment ON/OFF Control Data Bit
SC is used to control the ON or OFF state of the Segment Drivers.
SC
0
1
Display State
ON
OFF
Note: When the segments are turned OFF by setting SC to "1" means that the segments are turned
OFF by outputting the segment OFF waveform from the Segment Output Pins
BU: Normal Mode/Power Saving Mode Control Data Bit
BU is used to select either the normal or the power saving mode. Please refer to the table below.
BU
0
1
Mode
Normal Mode
Power Saving Mode
When BU is set to "1", the Power Saving Mode is enabled. Under this mode, the OSC Pin operation is
terminated, the segment output pins are set to the Vss level. However, the output pins SG1/P1 to
SG8/P8 may be used as a General Purpose Output Port via the control data bits -- P0 to P3.
PT6574 V1.4
-8-
October, 2006
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LCD Driver IC
PT6574
DISPLAY DATA AND OUTPUT PIN RELATIONSHIP
OUTPUT PIN
SG1/P1
SG2/P2
SG3/P3
SG4/P4
SG5/P5
SG6/P6
SG7/P7
SG8/P8
SG9
SG10
SG11
SG12
SG13
SG14
SG15
SG16
SG17
SG18
SG19
SG20
SG21
SG22
SG23
SG24
SG25
SG26
SG27
SG28
SG29
SG30
SG31
SG32
SG33
COM1
D1
D5
D9
D13
D17
D21
D25
D29
D33
D37
D41
D45
D49
D53
D57
D61
D65
D69
D73
D77
D81
D85
D89
D93
D97
D101
D105
D109
D113
D117
D121
D125
D129
COM2
D2
D6
D10
D14
D18
D22
D26
D30
D34
D38
D42
D46
D50
D54
D58
D62
D66
D70
D74
D78
D82
D86
D90
D94
D98
D102
D106
D110
D114
D118
D122
D126
D130
COM3
D3
D7
D11
D15
D19
D23
D27
D31
D35
D39
D43
D47
D51
D55
D58
D63
D67
D71
D75
D79
D83
D87
D91
D95
D99
D103
D107
D111
D115
D119
D123
D127
D131
COM4
D4
D8
D12
D16
D20
D24
D28
D32
D36
D40
D44
D48
D52
D56
D60
D64
D68
D72
D76
D80
D84
D88
D92
D96
D100
D104
D108
D112
D116
D120
D124
D128
D132
OUTPUT PIN
SG34
SG35
SG36
SG37
SG38
SG39
SG40
SG41
SG42
SG43
SG44
SG45
SG46
SG47
SG48
SG49
SG50
SG51
SG52
SG53
SG54
SG55
SG56
SG57
SG58
SG58
SG60
SG61
SG62
SG63
SG64
SG65
SG66
COM1
D133
D137
D141
D145
D149
D153
D157
D161
D165
D169
D173
D177
D181
D185
D189
D193
D197
D201
D205
D209
D213
D217
D221
D225
D229
D233
D237
D241
D245
D249
D253
D257
D261
COM2
D134
D138
D142
D146
D150
D154
D158
D162
D166
D170
D174
D178
D182
D186
D190
D194
D198
D202
D206
D210
D214
D218
D222
D226
D230
D234
D238
D242
D246
D250
D254
D258
D262
COM3
D135
D139
D143
D147
D151
D155
D159
D163
D167
D171
D175
D179
D183
D187
D191
D195
D199
D203
D207
D211
D215
D219
D223
D227
D231
D235
D239
D243
D247
D251
D255
D259
D263
COM4
D136
D140
D144
D148
D152
D156
D160
D164
F168
D172
D176
D180
D184
D188
D192
D196
D200
D204
D208
D212
D216
D220
D224
D228
D232
D236
D240
D244
D248
D252
D256
D260
D264
Note: The above table assumes that the Segment Output Port Function is selected for the SG1/P1 to
SG8/P8 output pins.
PT6574 V1.4
-9-
October, 2006
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LCD Driver IC
PT6574
As an example, the table below lists the output states of the SG11 Pin.
D41
Display Data
D42 D43 D44
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
PT6574 V1.4
Output Pin -- SG11 State
LCD Segments corresponding to COM1, COM2, COM3, and COM4
are OFF
LCD Segments corresponding to COM4 are ON
LCD Segments corresponding to COM3 are ON.
LCD Segments corresponding to COM3 and COM4 are ON.
LCD Segments corresponding to COM2 are ON.
LCD Segments corresponding to COM2 and COM4 are ON.
LCD Segments corresponding to COM2 and COM3 are ON.
LCD Segments corresponding to COM2, COM3, and COM4 are ON.
LCD Segments corresponding to COM1 are ON.
LCD Segments corresponding to COM1 and COM4 are ON.
LCD Segments corresponding to COM1 and COM3 are ON.
LCD Segments corresponding to COM1, COM3, and COM4 are ON.
LCD Segments corresponding to COM1 and COM2 are ON.
LCD Segments corresponding to COM1, COM2, and COM4 are ON.
LCD Segments corresponding to COM1, COM2, and COM3 are ON.
LCD Segments corresponding to COM1, COM2, COM3, and COM4
are ON.
- 10 -
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LCD Driver IC
PT6574
1/4 DUTY, 1/2 BIAS DRIVE TECHNIQUE
fosc/512 [Hz]
COM1
VLCD
VLCD1, VLCD2
0V
COM2
VLCD
VLCD1, VLCD2
0V
COM3
VLCD
VLCD1, VLCD2
0V
COM4
VLCD
VLCD1, VLCD2
0V
LCD driver output when all LCD
segments corresponding to
COM1,COM2, COM3 and COM4
are off)
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM1
are on (lit).
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM2
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM1 and COM2
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM3
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM1 and COM3 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM2 and COM3
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM1, COM2 and COM3
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM4
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM2 and COM4
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM1, COM2, COM3
and COM4 are on.
VLCD
VLCD1, VLCD2
0V
PT6574 V1.4
- 11 -
October, 2006
Tel: 886-2-66296288
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LCD Driver IC
PT6574
1/4 DUTY, 1/3 BIAS DRIVE TECHNIQUE
fosc/512 [Hz]
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
COM1
COM2
COM3
COM4
LCD driver output when all LCD
segments corresponding to
COM1,COM2, COM3 are off)
LCD driver output when only LCD
segments corresponding to COM1
are on (lit).
LCD driver output when only LCD
segments corresponding to COM2
are on.
LCD driver output when LCD segments
corresponding to COM1, COM2 are on.
LCD driver output when only LCD
segments corresponding to COM3
are on.
LCD driver output when LCD segments
corresponding to COM1 and COM3 are on.
LCD driver output when LCD segments
corresponding to COM2 and COM3
are on.
LCD driver output when LCD segments
corresponding to COM1, COM2 and COM3
are on.
LCD driver output when only LCD
segments corresponding to COM4
are on.
LCD driver output when LCD segments
corresponding to COM2 and COM4
are on.
LCD driver output when LCD segments
corresponding to COM1, COM2, COM3
and COM4 are on.
PT6574 V1.4
- 12 -
October, 2006
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LCD Driver IC
PT6574
/INH PIN AND DISPLAY CONTROL
When PT6574 is initialized (power is first applied), the display data D1 to D264 and the control data are
not defined. In order to prevent meaningless displays, it is recommended that the following procedures
be followed. The /INH Pin must be set to "LOW" level at the same the power is applied to turn OFF the
display. This will then set the SG1/P1 to SG8/P8, SG9 to SG66 and COM1 to COM4 pins to "LOW"
level. When the /INH Pin is kept at LOW" level, the microprocessor sends the serial data. The /INH Pin
is set to "HIGH" Level via an application. Please refer to the diagram below.
t2
t1
t3
VDD
VLCD
/INH
VIL
tc
CE
VIL
Transfer of display and control data
D1 to D68, P0 to P3,
DR, SC, BU
Undefined
Defined
Undefined
D69 to D136
Undefined
Defined
Undefined
D137 to D200
Undefined
Defined
Undefined
D201 to D264
Undefined
Defined
Undefined
Notes:
1. t1 ≥ 0
2. t2 > 0
3. t3 ≥ 0 (t2 > t3)
4. tc ......10µs min.
PT6574 V1.4
- 13 -
October, 2006
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LCD Driver IC
PT6574
POWER SUPPLY SEQUENCES
The various applications must observe the sequences when turning the power turn ON/OFF.
When turning ON the power, the logic power supply (VDD) must be first turned ON followed by the LCD
Drive Power Supply (VLCD). Conversely, when turning the power OFF, the LCD Drive power supply
(VLCD) must first be turned OFF, followed by the logic power supply (VDD). During instances when the
Logic and the LCD Driver Block share the same power supply, the power supply can be turned ON or
OFF simultaneously.
DISPLAY DATA CONTROLLER TRANSFER
PT6574 accepts four separate transfer operations of display data -- D1 to D264, therefore it is
recommended that the applications must complete all four data transfers within a period of less than
30ms in order to prevent visible reduction of display quality.
PT6574 V1.4
- 14 -
October, 2006
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LCD Driver IC
PT6574
SERIAL DATA FORMAT
CASE 1: WHEN CLK IS TERMINATED AT "LOW" LEVEL
CE
CLK
DI
1
0
1
0
0
0
1
0
B0
B1
B2
B3
A0
A1
A2
A3
D1
D2
8 ADDRESS BITS
1
0
1
0
0
0
1
0
B1
B2
B3
A0
A1
A2
A3
D69
D70
D63
D64
D65
D66
D67
D68
0
0
0
0
0
0
68 DISPLAY DATA BITS
1
0
1
0
0
0
1
0
B0
B1
B2
B3
A0
A1
A2
A3
D137
D138 D139
D197 D198 D199 D200
1
0
1
0
0
0
1
0
B0
B1
B2
B3
A0
A1
A2
A3
D201
D202 D203
P1
P2
P3
DR
SC
BU
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
64 DISPLAY DATA BITS
0
0
0
0
0
0
0
0
14 FIXED DATA BITS
- 15 -
0
0
1
2 DIRECTION
DATA BITS
0
0
0
14 FIXED BITS
D261 D262 D263 D264
0
2 DIRECTION
DATA BITS
10 FIXED DATA BITS
64 DISPLAY DATA BITS
8 ADDRESS BITS
P0
10 CONTROL DATA BITS
D129 D130 D131 D132 D133 D134 D135 D136
D71
8 ADDRESS BITS
PT6574 V1.4
D62
68 DISPLAY DATA BITS
B0
8 ADDRESS BITS
D61
D3
1
0
2 DIRECTION
DATA BITS
0
0
0
0
0
0
1
1
2 DIRECTION
DATA BITS
October, 2006
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LCD Driver IC
PT6574
CASE 2: WHEN CLK IS TERMINATED AT HIGH" LEVEL
CE
CLK
DI
1
0
1
0
0
0
1
B0
B1
B2
B3
A0
A1
A2
0
D1
D2
D3
D62
D63
D64
D65
D66
D67
D68
0
0
0
68 DISPLAY DATA BITS
8 ADDRESS BITS
1
0
1
0
0
0
1
B0
B1
B2
B3
A0
A1
A2
1
0
1
0
0
0
1
B1
B2
B3
A0
A1
A2
0
D69
D70
D71
D129 D130 D131 D132 D133 D134 D135 D136
0
0
1
0
0
0
1
B1
B2
B3
A0
A1
A2
P3
DR
SC
BU
0
0
0
0
0
0
0
0
2 DIRECTION
DATA BITS
0
0
0
0
D137 D138 D139
D197 D198 D199 D200
10 CONTROL DATA BITS
0
0
0
0
0
64 DISPLAY DATA BITS
1
P2
0
1
0
0
0
0
0
0
2 DIRECTION
DATA BITS
0
0
0
1
0
A3
8 ADDRESS BITS
B0
P1
10 CONTROL DATA BITS
68 DISPLAY DATA BITS
B0
P0
A3
8 ADDRESS BITS
8 ADDRESS BITS
D61
A3
0
D200 D201 D202
D261 D262 D263 D264
14 CONTROL DATA BITS
0
0
0
0
0
0
0
0
0
2 DIRECTION
DATA BITS
0
0
0
0
0
1
1
A3
64 DISPLAY DATA BITS
14 CONTROL DATA BITS
2 DIRECTION
DATA BITS
Notes:
1. Address: 45H
2. D1 to D264=Display Data
3. P0 to P3=Segment Output Port/General Purpose Output Port Switching Control Data
4. DR=1/2 Bias Drive or 1/3 Bias Drive Switching Control Data
5. SC=Segment ON/OFF Control Data
6. BU=Normal Mode / Power Saving Mode Control Data
PT6574 V1.4
- 16 -
October, 2006
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LCD Driver IC
PT6574
Example 1:
If 201 or more segments are used, all 320 bits of serial data must be sent. Please refer to the diagram
below.
8 BITS
1 0
1 0
0 0
80 BITS
1 0
D1
D2
D63 D64 D65 D66 D67 D68
0
0
0
P0
P1
P2
P3
DR
SC
BU
0
0
D131 D132 D133 D134 D135 D136
0
0
0
0
0
0
0
0
0
0
0
1
D137 D138
D199
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
D201 D202
D263 D264
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
B0 B1 B2 B3 A0 A1 A2 A3
1 0
1 0
0 0
1 0
D69 D70
B0 B1 B2 B3 A0 A1 A2 A3
1 0
1 0
0 0
1 0
B0 B1 B2 B3 A0 A1 A2 A3
1 0
1 0
0 0
1 0
B0 B1 B2 B3 A0 A1 A2 A3
Example 2:
If less than 201 segments are used. 80, 160 or 240 bits of serial data may be sent depending on the
number of segments used. For this illustration, D1 to D68 and the control data are sent
8 BITS
1 0
1 0
0 0
80 BITS
1 0
D1
D2
D63 D64 D65 D66 D67 D68
0
0
0
P0
P1
P2
P3
DR
SC
BU
0
0
B0 B1 B2 B3 A0 A1 A2 A3
PT6574 V1.4
- 17 -
October, 2006
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LCD Driver IC
PT6574
ABSOLUTE MAXIMUM RATINGS
(Unless otherwise specified, Ta=25℃, Vss=0V)
Parameter
Symbol
Condition
VDD max
VDD
Minimum Supply Voltage
VLCD max
VLCD
VIN1
CE, CLK, DI, /INH
Input Voltage
VIN2
OSC
VLCD1, VLCD2
VIN3
VOUT1
OSC
Output Voltage
SG1 to SG66,
VOUT2
COM1 to COM4, P1 to P8
IOUT1
SG1 to SG66
Output Current
IOUT2
COM1 to COM4
P1 to P8
IOUT3
Allowable Power
Ta=85℃
Pd max
Dissipation
Operating Temperature
Topr
Storage Temperature
Tstg
PT6574 V1.4
- 18 -
Ratings
-0.3 to +7.0
-0.3 to +7.0
-0.3 to +7.0
-0.3 to VDD+0.3
-0.3 to VLCD+0.3
-0.3 to VDD+0.3
Unit
V
V
V
V
V
V
-0.3 to VLCD+0.3
V
300
3
5
µA
mA
mA
200
mW
-40 to +85
-65 to +150
℃
℃
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LCD Driver IC
PT6574
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, Ta=25℃, VSS=0V)
Parameter
Hysteresis
High Level Input
Current
Low level Input
Current
Symbol
VH
IIH
IIL
VOH1
High Level
Output Voltage
VOH2
VOH3
VOL1
Low Level
Output Voltage
VOL2
VOL3
VMID1
VMID2
Middle Level
Output Voltage
(see Notes)
VMID3
VMID4
VMID5
Oscillation
Frequency
fosc
IDD1
IDD2
Current Drain
ILCD1
ILCD2
ILCD3
PT6574 V1.4
Condition
CE, CLK, DI, /INH
CE, CLK, DI, /INH
VI=6.0V
CE, CLK, DI, /INH
VI=0V
SG1 to SG66
Io=-20µA
COM1 to COM4
Io=-100µA
P1 to P8
Io=-1mA
SG1 to SG66
Io=20µA
COM1 to COM4
Io=100µA
P1 to P8
Io=1mA
COM1 to COM4
1/2 Bias, Io=±100µA
SG1 to SG66
1/3 Bias, Io=±20µA
SG1 to SG66
1/3 Bias, Io=±20µA
COM1 to COM4
1/3 Bias, Io=±100µA
COM1 to COM4
1/3 Bias, Io=±100µA
OSC
Rosc=43K, Cosc=680pF
VDD
Power Saving Mode
VDD
VDD=6V, All outputs open.
fosc=50KHz
VLCD
Power Saving Mode
VLCD
VLCD=6V, All outputs open.
1/2 Bias, fosc=50KHz
VLCD
VLCD=6V, All outputs open.
1/3 Bias, fosc=50KHz
- 19 -
Min.
-
Typ.
0.1VDD
Max.
-
Unit
V
-
-
5.0
µA
-5.0
-
-
µA
VLCD-0.9
-
-
V
VLCD-0.9
-
-
V
VLCD-0.9
-
-
V
-
-
0.9
V
-
-
0.9
V
-
-
0.9
V
1/2VLCD-0.9
-
1/2VLCD+0.9
V
2/3VLCD-0.9
-
2/3VLCD+0.9
V
1/3VLCD-0.9
-
1/3VLCD+0.9
V
2/3VLCD-0.9
-
2/3VLCD+0.9
V
1/3VLCD-0.9
-
1/3VLCD+0.9
V
40
50
60
KHz
-
-
5
µA
-
230
460
µA
-
-
5
µA
-
200
400
µA
-
120
240
µA
October, 2006
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LCD Driver IC
PT6574
Note: The VLCD and VLCD1 internal bias voltage generation divider resistors are not included. Please
refer to the diagram below.
VLCD1
VLCD2
To The Common / Segment Drivers
These resistors are not included.
PT6574 V1.4
- 20 -
October, 2006
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LCD Driver IC
PT6574
ALLOWABLE OPERATING RANGE
(Unless otherwise stated, Ta=25℃, VSS=0V)
Parameter
Symbol
Condition
VDD
VDD
Supply Voltage
VLCD
VLCD
VLCD1
VLCD1
Input Voltage
VLCD2
VLCD2
High Level Input
VIH
CE. CLK, DI, /INH
Voltage
Low Level Input
VIL
CE, CLK, DI, /INH
Voltage
Recommended
Rosc
OSC
External Impedance
Recommended
Cosc
OSC
External Capacitance
Oscillation Range
fosc
OSC
Data Setup Time
tDS
CLK, DI
Data Hold Time
tDH
CLK, DI
CE Wait Time
tCP
CE, CLK
CE Hold Time
tCH
CE, CLK
CE Setup Time
tCS
CE, CLK
High Level Clock
tH
CLK
Pulse Width
Low Level Clock
tL
CLK
Pulse Width
Rise Time
tr
CE, CLK, DI
Fall Time
tf
CE, CLK, DI
/INH Switching Time
tc
/INH, CE
PT6574 V1.4
- 21 -
Min.
2.7
2.7
-
Typ.
2/3VLCD
1/3VLCD
Max.
6.0
6.0
VLCD
VLCD
Unit
V
V
V
V
0.8VDD
-
6.0
V
0
-
0.2VDD
V
-
43
-
KΩ
-
680
-
pF
25
160
160
160
160
160
50
-
100
-
KHz
ns
ns
ns
ns
ns
160
-
-
ns
160
-
-
ns
10
160
160
-
-
ns
ns
µs
October, 2006
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LCD Driver IC
PT6574
CASE 1: CLK IS TERMINATED AT "LOW" LEVEL
V IH
V IL
CE
tψH
CLK
t ψL
V IH
50%
V IL
tr
DI
tf
tcp
tcs
tch
V IH
V IL
tds
tdh
CASE 2: CLK IS TERMINATED AT "HIGH" LEVEL
V IH
V IL
CE
tψL
tψH
V IH
50%
V IL
CLK
tf
tr
tcs
tch
V IH
DI
V IL
tds
PT6574 V1.4
tcp
tdh
- 22 -
October, 2006
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LCD Driver IC
PT6574
1/2 BIAS APPLICATION CIRCUIT
44
43
42
41
SG45
SG44
SG43
38
SG39
37
65 COM1
SG38
36
66 COM2
SG37
35
67 COM3
SG36
34
68 COM4
SG35
33
69 VDD
SG34
32
70 VLCD
SG33
31
SG32
30
P T 6574LQ
40
SG23
21
SG22
22
SG21
SG24
80 SG2/P2
SG20
79 SG1/P1
SG19
23
SG18
SG25
SG17
24
78 DI
SG16
SG26
SG15
25
77 CLK
SG14
SG27
SG13
26
76 CE
SG12
SG28
SG11
27
75 /INH
SG10
SG29
SG9
28
74 OSC
SG8/P8
SG31 29
SG30
SG7/P7
72 VLCD2
73 VSS
LCD Panel
45
SG46
SG52
46
51
50
SG53
SG47
52
SG54
47
53
SG55
SG48
54
SG56
48
55
SG57
SG40
64 SG66
SG6/P6
MCU
SG49
56
SG58
63 SG65
SG5/P5
43K
SG51 49
57
SG59
SG41 39
71 VLCD1
C
SG50
58
SG60
60
SG62
680p
SG42
SG4/P4
+5V
C
61 SG63
62 SG64
SG3/P3
+5V
SG61 59
(FOR NORMAL LCD PANELS)
Notes:
1. C≥0.047µF
2. Recommended Capacitor Value: Range: 220<Cosc<2200pF
PT6574 V1.4
- 23 -
October, 2006
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LCD Driver IC
PT6574
1/2 BIAS APPLICATION CIRCUIT
43
42
41
SG44
SG43
37
65 COM1
SG38
36
66 COM2
SG37
35
67 COM3
SG36
34
68 COM4
SG35
33
69 VDD
SG34
32
70 VLCD
SG33
31
SG32
30
72 VLCD2
SG31
29
73 VSS
SG30
28
74 OSC
SG29
27
75 /INH
SG28
26
76 CE
SG27
25
77 CLK
SG26
24
78 DI
SG25
23
79 SG1/P1
SG24
22
80 SG2/P2
SG23
21
SG22
SG21
SG20
SG19
SG18
SG17
SG16
SG15
SG14
SG13
SG12
SG10
SG11
P T 6574LQ
71 VLCD1
LCD Panel
44
46
45
SG47
SG46
47
SG48
SG45
48
51
50
SG52
SG49
52
SG53
SG51 49
53
SG54
SG50
54
56
55
SG57
SG56
57
SG58
SG55
58
SG59
38
SG39
SG9
MCU
SG40
64 SG66
SG8/P8
43K
63 SG65
SG7/P7
680p
39
SG6/P6
10K
0.047
40
SG41
SG5/P5
10K
SG60
60
SG62
C
SG42
SG4/P4
+5V
C
61 SG63
62 SG64
SG3/P3
+5V
SG61 59
(FOR LARGE LCD PANELS)
Notes:
1. C≥0.047µF
2. Recommended Cosc=680pF. Recommended Cosc Range: 220<Cosc<2200pF.
3. 10KΩ≥R≥1K
PT6574 V1.4
- 24 -
October, 2006
Tel: 886-2-66296288
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LCD Driver IC
PT6574
1/3 BIAS APPLICATION CIRCUIT
43
42
41
SG44
SG43
63 SG65
SG40
38
64 SG66
SG39
37
65 COM1
SG38
36
66 COM2
SG37
35
67 COM3
SG36
34
68 COM4
SG35
33
69 VDD
SG34
32
70 VLCD
SG33
31
SG32
30
72 VLCD2
SG31
29
73 VSS
SG30
28
74 OSC
SG29
27
75 /INH
SG28
26
76 CE
SG27
25
77 CLK
SG26
24
78 DI
SG25
23
79 SG1/P1
SG24
22
80 SG2/P2
SG23
21
SG22
SG21
SG20
SG19
SG18
SG17
SG16
SG15
SG14
SG13
SG12
SG10
SG9
SG8/P8
SG7/P7
SG6/P6
SG11
P T 6574LQ
LCD Panel
44
46
45
SG47
SG46
47
SG48
SG45
48
51
50
SG52
SG49
52
SG53
39
SG5/P5
MCU
SG51 49
53
SG54
40
SG41
SG4/P4
43K
SG50
54
56
55
SG57
SG56
57
SG58
SG55
58
SG59
SG42
71 VLCD1
C
680p
61 SG63
62 SG64
SG3/P3
+5V
C
SG60
60
SG62
+5V
SG61 59
(FOR NORMAL LCD PANELS)
Notes:
1. C≥0.047µF
2. Recommended Cosc=680pF. Recommended Cosc Range: 220<Cosc<2200pF.
3. 10KΩ≥R≥1K
PT6574 V1.4
- 25 -
October, 2006
Tel: 886-2-66296288
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URL: http://www.princeton.com.tw
LCD Driver IC
PT6574
1/3 BIAS APPLICATION CIRCUIT
44
43
42
41
SG46
SG45
SG44
SG43
SG40
38
64 SG66
SG39
37
65 COM1
SG38
36
66 COM2
SG37
35
67 COM3
SG36
34
68 COM4
SG35
33
69 VDD
SG34
32
70 VLCD
SG33
31
SG32
30
72 VLCD2
SG31
29
73 VSS
SG30
28
74 OSC
SG29
27
75 /INH
SG28
26
76 CE
SG27
25
77 CLK
SG26
24
78 DI
SG25
23
79 SG1/P1
SG24
22
80 SG2/P2
SG23
21
SG22
SG21
SG20
SG19
SG18
SG17
SG16
SG15
SG14
SG13
SG12
SG10
SG9
SG8/P8
SG7/P7
SG11
P T 6574LQ
LCD Panel
46
45
SG47
47
SG52
SG48
51
50
SG53
48
52
SG54
SG49
53
SG55
SG51 49
54
SG56
63 SG65
SG6/P6
MCU
SG50
56
55
SG57
57
SG58
58
SG60
39
SG5/P5
43K
40
SG41
71 VLCD1
R
R
R
680p
SG59
60
SG62
C
SG42
SG4/P4
+5V
C
61 SG63
62 SG64
SG3/P3
+5V
SG61 59
(FOR LARGE LCD PANELS)
Notes:
1. C≥0.047µF
2. Recommended Cosc=680pF. Recommended Cosc Range: 220<Cosc<2200pF.
3. 10KΩ≥R≥1K
PT6574 V1.4
- 26 -
October, 2006
Tel: 886-2-66296288
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LCD Driver IC
PT6574
ORDER INFORMATION
Valid Part Number
PT6574
PT6574LQ
PT6574 V1.4
Package Type
80 Pin, QFP
80 Pin, LQFP
- 27 -
Top Code
PT6574
PT6574LQ
October, 2006
Tel: 886-2-66296288
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LCD Driver IC
PT6574
PACKAGE INFORMATION
80 PINS, QFP PACKAGE (BODY SIZE: 20MM X 14MM, PITCH: 0.80MM)
D
D1
A
A2
D2
A1
-B-
-A-
L1
E1
E2
E
-D-
e
c
b
θ1
C SEATING PLANE
θ
0.10
C
θ2
R1
R2
-H-
GAUGE PLANE
0.25mm
S
L
θ3
PT6574 V1.4
- 28 -
October, 2006
Tel: 886-2-66296288
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LCD Driver IC
PT6574
Symbol
A
A1
A2
b
D
D1
E
E1
e
c
c1
L
L1
S
R1
R2
θ
θ1
θ2
θ3
Min.
0.00
2.50
0.29
Nom.
2.70
23.20 BSC.
20.00 BSC.
17.20 BSC.
14.00 BSC.
0.80 BSC.
0.15
0.88
1.60 BSC.
-
0.11
0.11
0.73
0.20
0.13
0.13
0o
0o
5o
5o
Max.
3.15
0.25
2.90
0.45
0.23
0.19
1.03
0.30
7o
16o
16o
Notes:
1. All dimensioning and tolerancing conform to ASME Y14.5M-1994.
2. Datum Plane H is located at the bottom of the mold parting line coincident with where the lead exits
the body.
3. Datums A-B and D to be determined at Datum Plane H.
4. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side.
Dimensions D1 and E1 do not include mismatch and are determined at the datum plane H.
5. Details of Pin 1 identifier are optional but must be located within the zone indicated.
6. Regardless of the relative size of the upper and lower body sections, Dimensions D1 and E1 are
determined at the largest feature of the body exclusive of mold flash and gate burrs, but including
any mismatch between the upper and lower section of the molded body.
7. Controlling Dimension: Millimeters
8. Dimension b does not include dambar protrusion. The dambar protrusion(s) shall not cause the lead
width to exceed b maximum by more than 0.08 mm. Dambar cannot be located on the lower radius
or the lead foot.
9. N = No. of leads (N=80)
10. A1 is defined as the distance from the seating plane to the lowest point of the package body.
11. Please refer to JEDEC MS-022 Variation GB-2.
JEDEC is the trademark of the JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
PT6574 V1.4
- 29 -
October, 2006
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
LCD Driver IC
PT6574
80 PINS, LQFP PACKAGE (BODY SIZE: 12X12, PITCH: 0.50, THK BODY:
1.40MM)
D
D1
A
A2
A1
-B-
-A-
L1
E1
E
-D-
e
c
b
θ1
C SEATING PLANE
θ
ccc
θ2
C
R1
R2
-H-
GAUGE PLANE
0.25mm
S
L
θ3
PT6574 V1.4
- 30 -
October, 2006
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
LCD Driver IC
PT6574
Symbol
A
A1
A2
b
b1
D
D1
e
E
E1
S
R1
R2
L
L1
C
θ
θ1
θ2
θ3
ccc
Min.
0.05
1.35
0.17
0.17
0.20
0.08
0.08
0.45
0.09
0o
0o
11o
11o
Nom.
1.40
0.22
0.20
14.00 BSC.
12.00 BSC.
0.50 BSC.
14.00 BSC.
12.00 BSC.
0.60
1.00 REF.
3.5o
12o
12o
0.08
Max.
1.60
0.15
1.45
0.27
0.23
0.20
0.75
0.20
7o
13o
13o
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. The top package body may be smaller than the bottom package size as much as 0.15mm.
3. Datum A-B and D to be determined at the datum plane H.
4. Dimensions D1 and E1 do not include mold protrusions. Allowable protrusion is 0.25mm per side.
D1 and E1 are maximum plastic body size dimensions including mold mismatch.
5. Controlling Dimensions: Millimeters
6. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall not cause the
lead width to exceed the maximum b dimension by more than 0.08mm. Dambar cannot be located
on the lower radius or the foot. Minimum space between protrusion and an adjacent lead is 0.07 mm
for 0.4mm and 0.5mm pitch package.
7. A1 is defined as the distance from the seating plane to the lowest point on the package body.
8. Refer to JEDEC MS-026 Variation BDD.
JEDEC is the trademark of JEDEC SOLID STATE TECHNOLOGY CORPORAITON.
PT6574 V1.4
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October, 2006