NCP45540 D

NCP45540
ecoSWITCHt
Advanced Load Management
Controlled Load Switch with Low RON
The NCP45540 load switch provides a component and
area-reducing solution for efficient power domain switching with
inrush current limit via soft−start. In addition to integrated control
functionality with ultra low on−resistance, this device offers system
safeguards and monitoring via fault protection and power good
signaling. This cost effective solution is ideal for power management
and hot-swap applications requiring low power consumption in a
small footprint.
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RON TYP
VCC
VIN
3.3 mW
3.3 V
1.8 V
3.6 mW
3.3 V
5.0 V
4.8 mW
3.3 V
12 V
IMAX
20 A
Features
•
•
•
•
•
•
•
•
•
•
•
•
Advanced Controller with Charge Pump
Integrated N-Channel MOSFET with Low RON
Input Voltage Range 0.5 V to 13.5 V
Soft-Start via Controlled Slew Rate
Adjustable Slew Rate Control
Power Good Signal
Thermal Shutdown
Undervoltage Lockout
Short-Circuit Protection
Extremely Low Standby Current
Load Bleed (Quick Discharge)
This is a Pb−Free Device
1
DFN12, 3x3
CASE 506CD
MARKING DIAGRAM
NCP45
540−x
ALYWG
G
x = H for NCP45540−H
= L for NCP45540−L
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
Typical Applications
•
•
•
•
•
Portable Electronics and Systems
Notebook and Tablet Computers
Telecom, Networking, Medical, and Industrial Equipment
Set−Top Boxes, Servers, and Gateways
Hot−Swap Devices and Peripheral Ports
VCC
Bandgap
&
Biases
Charge
Pump
EN
(Note: Microdot may be in either location)
Thermal,
Undervoltage
&
Short−Circuit
Protection
Control
Logic
PIN CONFIGURATION
VIN
PG
VIN
1
12
VOUT
EN
2
11
VOUT
VCC
3
10
VOUT
13: VIN
Delay and
Slew Rate
Control
GND
4
9
VOUT
SR
5
8
NC
PG
6
7
BLEED
(Top View)
ORDERING INFORMATION
SR
GND
BLEED
VOUT
See detailed ordering and shipping information on page 12 of
this data sheet.
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2015
February, 2015 − Rev. 3
1
Publication Order Number:
NCP45540/D
NCP45540
Table 1. PIN DESCRIPTION
Pin
Name
Function
1, 13
VIN
Drain of MOSFET (0.5 V – 13.5 V), Pin 1 must be connected to Pin 13
2
EN
NCP45540−H − Active−high digital input used to turn on the MOSFET, pin has an internal pull down resistor to
GND
NCP45540−L − Active−low digital input used to turn on the MOSFET, pin has an internal pull up resistor to VCC
3
VCC
Supply voltage to controller (3.0 V − 5.5 V)
4
GND
Controller ground
5
SR
Slew rate adjustment; float if not used
6
PG
Active−high, open−drain output that indicates when the gate of the MOSFET is fully driven, external pull up
resistor ≥ 1 kW to an external voltage source required; tie to GND if not used.
7
BLEED
8
NC
9−12
VOUT
Load bleed connection, must be tied to VOUT either directly or through a resistor
≤ 1 kW
No connect, internally floating but pin may be tied to VOUT
Source of MOSFET connected to load
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
−0.3 to 6
V
Supply Voltage Range
Input Voltage Range
VIN
−0.3 to 18
V
Output Voltage Range
VOUT
−0.3 to 18
V
EN Digital Input Range
VEN
−0.3 to (VCC + 0.3)
V
PG Output Voltage Range (Note 1)
VPG
−0.3 to 6
V
Thermal Resistance, Junction−to−Ambient, Steady State (Note 2)
RθJA
30.9
°C/W
Thermal Resistance, Junction−to−Ambient, Steady State (Note 3)
RθJA
51.3
°C/W
Thermal Resistance, Junction−to−Case (VIN Paddle)
RθJC
3.5
°C/W
Continuous MOSFET Current @ TA = 25°C (Notes 2 and 4)
IMAX
20
A
Continuous MOSFET Current @ TA = 25°C (Notes 3 and 4)
IMAX
15.5
A
Total Power Dissipation @ TA = 25°C (Note 2)
Derate above TA = 25°C
PD
3.24
32.4
W
mW/°C
Total Power Dissipation @ TA = 25°C (Note 3)
Derate above TA = 25°C
PD
1.95
19.5
W
mW/°C
Storage Temperature Range
TSTG
−40 to 150
°C
Lead Temperature, Soldering (10 sec.)
TSLD
260
°C
ESD Capability, Human Body Model (Notes 5 and 6)
ESDHBM
3.0
kV
ESD Capability, Charged Device Model (Note 5)
ESDCDM
1.0
kV
LU
100
mA
Latch−up Current Immunity (Notes 5 and 6)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. PG is an open−drain output that requires an external pull up resistor ≥ 1 kW to an external voltage source.
2. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
3. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu.
4. Ensure that the expected operating MOSFET current will not cause the Short−Circuit Protection to turn the MOSFET off undesirably.
5. Tested by the following methods @ TA = 25°C:
ESD Human Body Model tested per JESD22−A114
ESD Charged Device Model per ESD STM5.3.1
Latch−up Current tested per JESD78
6. Rating is for all pins except for VIN and VOUT which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance
for VIN and VOUT should be expected and these devices should be treated as ESD sensitive.
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2
NCP45540
Table 3. OPERATING RANGES
Rating
Symbol
Min
Max
Unit
Supply Voltage
VCC
3
5.5
V
Input Voltage
VIN
0.5
13.5
V
0
V
Ground
GND
Ambient Temperature
TA
−40
85
°C
Junction Temperature
TJ
−40
125
°C
Table 4. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Conditions (Note 7)
Typ
Max
Unit
3.3
4.5
mW
VCC = 3.3 V; VIN = 5 V
3.6
4.9
VCC = 3.3 V; VIN = 12 V
4.8
7.7
Parameter
Symbol
Min
MOSFET
On−Resistance
Leakage Current (Note 8)
VCC = 3.3 V; VIN = 1.8 V
RON
VEN = 0 V; VIN = 13.5 V
ILEAK
0.1
1.0
mA
VEN = 0 V; VCC = 3 V
ISTBY
0.65
2.0
mA
3.2
4.5
IDYN
280
400
530
750
86
115
144
72
97
121
6.0
10
60
70
CONTROLLER
Supply Standby Current (Note 9)
VEN = 0 V; VCC = 5.5 V
Supply Dynamic Current (Note 10)
VEN = VCC = 3 V; VIN = 12 V
VEN = VCC = 5.5 V; VIN = 1.8 V
Bleed Resistance
RBLEED
VEN = 0 V; VCC = 3 V
VEN = 0 V; VCC = 5.5 V
Bleed Pin Leakage Current
VEN = VCC = 3 V, VIN = 1.8 V
IBLEED
VEN = VCC = 3 V, VIN = 12 V
EN Input High Voltage
VCC = 3 V − 5.5 V
VIH
EN Input Low Voltage
VCC = 3 V − 5.5 V
VIL
EN Input Leakage Current
NCP45540−H; VEN = 0 V
IIL
NCP45540−L; VEN = VCC
IIH
2.0
mA
W
mA
V
0.8
V
90
500
nA
90
500
EN Pull Down Resistance
NCP45540−H
RPD
76
100
124
kW
EN Pull Up Resistance
NCP45540−L
RPU
76
100
124
kW
PG Output Low Voltage (Note 11)
VCC = 3 V; ISINK = 5 mA
VOL
0.2
V
PG Output Leakage Current (Note 12)
VCC = 3 V; VTERM = 3.3 V
IOH
5.0
100
nA
Slew Rate Control Constant (Note 13)
VCC = 3 V
KSR
33
40
mA
Thermal Shutdown Threshold (Note 14)
VCC = 3 V − 5.5 V
TSDT
145
°C
Thermal Shutdown Hysteresis (Note 14)
VCC = 3 V − 5.5 V
THYS
20
°C
VIN Undervoltage Lockout Threshold
VCC = 3 V
VUVLO
VIN Undervoltage Lockout Hysteresis
VCC = 3 V
VHYS
25
Short−Circuit Protection Threshold
VCC = 3 V; VIN = 0.5 V
VSC
200
100
285
500
26
FAULT PROTECTIONS
VCC = 3 V; VIN = 13.5 V
0.25
0.35
0.45
V
40
60
mV
265
350
mV
7. VEN shown only for NCP45540−H, (EN Active−High) unless otherwise specified.
8. Average current from VIN to VOUT with MOSFET turned off.
9. Average current from VCC to GND with MOSFET turned off.
10. Average current from VCC to GND after charge up time of MOSFET.
11. PG is an open-drain output that is pulled low when the MOSFET is disabled.
12. PG is an open-drain output that is not driven when the gate of the MOSFET is fully charged, requires an external pull up resistor ≥ 1 kW to
an external voltage source, VTERM.
13. See Applications Information section for details on how to adjust the slew rate.
14. Operation above TJ = 125°C is not guaranteed.
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NCP45540
Table 5. SWITCHING CHARACTERISTICS (TJ = 25°C unless otherwise specified) (Notes 15 and 16)
Parameter
Conditions
Output Slew Rate
Symbol
SR
VCC = 3.3 V; VIN = 1.8 V
Output Turn−on Delay
Min
11.8
VCC = 5.0 V; VIN = 1.8 V
12.0
VCC = 3.3 V; VIN = 12 V
13.3
VCC = 5.0 V; VIN = 12 V
13.5
TON
VCC = 3.3 V; VIN = 1.8 V
200
VCC = 5.0 V; VIN = 1.8 V
170
VCC = 3.3 V; VIN = 12 V
260
VCC = 5.0 V; VIN = 12 V
Output Turn−off Delay
2.0
VCC = 5.0 V; VIN = 1.8 V
1.6
VCC = 3.3 V; VIN = 12 V
0.7
VCC = 5.0 V; VIN = 12 V
0.4
TPG,ON
VCC = 3.3 V; VIN = 1.8 V
Power Good Turn−off Time
1.02
VCC = 5.0 V; VIN = 1.8 V
0.95
VCC = 3.3 V; VIN = 12 V
1.52
VCC = 5.0 V; VIN = 12 V
1.23
TPG,OFF
VCC = 3.3 V; VIN = 1.8 V
20
VCC = 5.0 V; VIN = 1.8 V
14
VCC = 3.3 V; VIN = 12 V
20
VCC = 5.0 V; VIN = 12 V
14
15. See below figure for Test Circuit and Timing Diagram.
16. Tested with the following conditions: VTERM = VCC; RPG = 100 kW; RL = 10 W; CL = 0.1 mF.
VTERM
RPG
OFF ON
EN
VIN
PG
NCP45540−H
VOUT
BLEED
VCC
GND
RL
SR
50%
CL
50%
VEN
TON
Dt
TOFF
90%
VOUT
10%
DV
SR =
TPG,ON
VPG
Max
Unit
kV/s
ms
250
TOFF
VCC = 3.3 V; VIN = 1.8 V
Power Good Turn−on Time
Typ
DV
90%
Dt
TPG,OFF
50%
50%
Figure 2. Switching Characteristics Test Circuit and Timing Diagrams
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4
ms
ms
ns
NCP45540
TYPICAL CHARACTERISTICS
6.0
9
5.5
8
RON, ON−RESISTANCE (mW)
RON, ON−RESISTANCE (mW)
(TJ = 25°C unless otherwise specified)
5.0
4.5
VCC = 3 V
4.0
VCC = 5.5 V
3.5
7
6
6.5
8.5
10.5
4
VIN = 1.8 V
3
2
−45 −30 −15
12.5
0
15
30
45
60
75
90 105 120
TJ, JUNCTION TEMPERATURE (°C)
Figure 3. On−Resistance vs. Input Voltage
Figure 4. On−Resistance vs. Temperature
ISTBY, SUPPLY STANDBY CURRENT (mA)
VIN, INPUT VOLTAGE (V)
3.0
2.5
2.0
1.5
1.0
0.5
3.5
4.0
4.5
5.0
5.5
7
6
5
4
VCC = 5.5 V
3
2
1
VCC = 3 V
0
−45 −30 −15
0
15
30
45
60
75
90 105 120
VCC, SUPPLY VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Supply Standby Current vs. Supply
Voltage
Figure 6. Supply Standby Current vs.
Temperature
IDYN, SUPPLY DYNAMIC CURRENT (mA)
ISTBY, SUPPLY STANDBY CURRENT (mA)
4.5
3.5
3.0
IDYN, SUPPLY DYNAMIC CURRENT (mA)
2.5
VIN = 5.0 V
5
3.0
0.5
VIN = 12 V
VCC = 3.3 V
550
500
450
400
350
300
VCC = 5.5 V
250
VCC = 3 V
200
150
0.5
2.5
4.5
6.5
8.5
10.5
600
550
500
VIN = 1.8 V
450
400
350
300
VIN = 12 V
250
200
150
3.0
12.5
3.5
4.0
4.5
5.0
5.5
VIN, INPUT VOLTAGE (V)
VCC, SUPPLY VOLTAGE (V)
Figure 7. Supply Dynamic Current vs. Input
Voltage
Figure 8. Supply Dynamic Current vs. Supply
Voltage
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NCP45540
TYPICAL CHARACTERISTICS
115
700
RBLEED, BLEED RESISTANCE (W)
IDYN, SUPPLY DYNAMIC CURRENT (mA)
(TJ = 25°C unless otherwise specified)
VCC = 5.5 V, VIN = 1.8 V
650
600
550
500
450
400
350
300
250
200
−45
VCC = 3.0 V, VIN = 12 V
110
105
100
95
−15
15
45
75
3.0
105
4.5
5.0
5.5
TJ, JUNCTION TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
Figure 10. Bleed Resistance vs. Supply
Voltage
IBLEED, BLEED PIN LEAKAGE
CURRENT (mA)
70
135
VCC = 3 V
125
115
VCC = 5.5 V
105
95
85
−45
60
VCC = 3 V
50
VCC = 5.5 V
40
30
20
10
0
−15
15
45
75
105
0.5
2.5
4.5
6.5
8.5
10.5
12.5
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 11. Bleed Resistance vs. Temperature
Figure 12. Bleed Pin Leakage Current vs. Input
Voltage
IPD/PU, EN PULL DOWN/UP RESISTANCE (kW)
RBLEED, BLEED RESISTANCE (W)
4.0
Figure 9. Supply Dynamic Current vs.
Temperature
145
IBLEED, BLEED PIN LEAKAGE CURRENT (mA)
3.5
80
70
VCC = 3 V, VIN = 12 V
60
50
40
30
20
VCC = 3 V, VIN = 1.8 V
10
0
−45
−15
15
45
75
105
120
115
110
105
100
95
90
85
−45
−15
15
45
75
105
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 13. Bleed Pin Leakage Current vs.
Temperature
Figure 14. EN Pull Down/Up Resistance vs.
Temperature
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NCP45540
TYPICAL CHARACTERISTICS
ISINK = 5 mA
0.135
0.130
0.125
0.120
0.115
0.110
3.0
KSR, SLEW RATE CONTROL CONSTANT (mA)
VOL, PG OUTPUT LOW VOLTAGE (V)
0.140
3.5
4.0
4.5
5.0
5.5
0.20
ISINK = 5 mA
0.18
VCC = 3 V
0.16
0.14
VCC = 5.5 V
0.12
0.10
0.08
−45
15
45
75
105
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. PG Output Low Voltage vs. Supply
Voltage
Figure 16. PG Output Low Voltage vs.
Temperature
37
36
VCC = 5.5 V
35
34
VCC = 3 V
33
32
31
30
29
28
0.5
2.5
4.5
6.5
8.5
10.5
12.5
35.5
35.0
VCC = 5.5 V
34.5
34.0
33.5
VCC = 3 V
33.0
32.5
32.0
−45
VIN, INPUT VOLTAGE (V)
−15
15
45
75
105
TJ, JUNCTION TEMPERATURE (°C)
Figure 17. Slew Rate Control Constant vs.
Input Voltage
Figure 18. Slew Rate Control Constant vs.
Temperature
320
14
SR, OUTPUT SLEW RATE (kV/s)
VSC, SHORT−CIRCUIT PROTECTION
THRESHOLD (mV)
−15
VCC, SUPPLY VOLTAGE (V)
KSR, SLEW RATE CONTROL CONSTANT (mA)
VOL, PG OUTPUT LOW VOLTAGE (V)
(TJ = 25°C unless otherwise specified)
310
VCC = 5.5 V
300
290
VCC = 3 V
280
270
260
250
VCC = 5.5 V
13
VCC = 3 V
12
11
10
9
0.5
2.5
4.5
6.5
8.5
10.5
0.5
12.5
2.5
4.5
6.5
8.5
10.5
12.5
VIN, INPUT VOLTAGE (V)
VIN, INPUT VOLTAGE (V)
Figure 19. Short−Circuit Protection Threshold
vs. Input Voltage
Figure 20. Output Slew Rate vs. Input Voltage
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NCP45540
TYPICAL CHARACTERISTICS
(TJ = 25°C unless otherwise specified)
VCC = 3.3 V, VIN = 12 V
13.0
12.5
12.0
VCC = 5 V, VIN = 1.8 V
11.5
11.0
−20
0
20
40
60
80
100
290
270
VCC = 3 V
250
230
VCC = 5.5 V
210
190
170
150
120
0.5
2.5
4.5
6.5
8.5
10.5
12.5
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 21. Output Slew Rate vs. Temperature
Figure 22. Output Turn−on Delay vs. Input
Voltage
275
TOFF, OUTPUT TURN−OFF DELAY (ms)
TON, OUTPUT TURN−ON DELAY (ms)
10.5
−40
TOFF, OUTPUT TURN−OFF DELAY (ms)
TON, OUTPUT TURN−ON DELAY (ms)
13.5
VCC = 3.3 V, VIN = 12 V
250
225
200
175
150
−40
VCC = 5 V, VIN = 1.8 V
−20
0
20
40
60
80
100
2.5
2.0
VCC = 3 V
1.5
1.0
VCC = 5.5 V
0.5
0
0.5
2.5
4.5
6.5
8.5
10.5
12.5
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 23. Output Turn−on Delay vs.
Temperature
Figure 24. Output Turn−off Delay vs. Input
Voltage
2.0
2.00
1.75
VCC = 5 V, VIN = 1.8 V
1.50
1.25
1.00
VCC = 3.3 V, VIN = 12 V
0.75
0.50
−40
3.0
120
TPG,ON, PG TURN−ON TIME (ms)
SR, OUTPUT SLEW RATE (kV/s)
14.0
1.8
VCC = 3 V
1.6
1.4
VCC = 5.5 V
1.2
1.0
0.8
−20
0
20
40
60
80
100
120
0.5
2.5
4.5
6.5
8.5
10.5
12.5
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 25. Output Turn−off Delay vs.
Temperature
Figure 26. Power Good Turn−on Time vs. Input
Voltage
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NCP45540
TYPICAL CHARACTERISTICS
(TJ = 25°C unless otherwise specified)
24
TPG,OFF, PG TURN−OFF TIME (ns)
1.7
1.6
VCC = 3.3 V, VIN = 12 V
1.5
1.4
1.3
1.2
1.1
1.0
VCC = 5 V, VIN = 1.8 V
0.9
0.8
−40
22
VIN = 13.5 V
20
18
VIN = 0.5 V
16
14
12
−20
0
20
40
60
80
120
100
3.0
3.5
4.0
4.5
5.0
TJ, JUNCTION TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
Figure 27. Power Good Turn−on Time vs.
Temperature
Figure 28. Power Good Turn−off Time vs.
Supply Voltage
26
TPG,OFF, PG TURN−OFF TIME (ns)
TPG,ON, PG TURN−ON TIME (ms)
1.8
24
VCC = 3.3 V, VIN = 12 V
22
20
18
16
VCC = 5 V, VIN = 1.8 V
14
12
10
−40 −20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 29. Power Good Turn−off Time vs.
Temperature
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120
5.5
NCP45540
APPLICATIONS INFORMATION
Enable Control
The power good output can be used as the enable signal for
other active−high devices in the system (as shown in
Figure 32). This allows for guaranteed by design power
sequencing and reduces the number of enable signals needed
from the system controller. If the power good feature is not
used in the application, the PG pin should be tied to GND.
The NCP45540 has two part numbers, NCP45540−H and
NCP45540−L, that only differ in the polarity of the enable
control.
The NCP45540−H device allows for enabling the
MOSFET in an active−high configuration. When the VCC
supply pin has an adequate voltage applied and the EN pin
is at a logic high level, the MOSFET will be enabled.
Similarly, when the EN pin is at a logic low level, the
MOSFET will be disabled. An internal pull down resistor to
ground on the EN pin ensures that the MOSFET will be
disabled when not being driven.
The NCP45540−L device allows for enabling the
MOSFET in an active−low configuration. When the VCC
supply pin has an adequate voltage applied and the EN pin
is at a logic low level, the MOSFET will be enabled.
Similarly, when the EN pin is at a logic high level, the
MOSFET will be disabled. An internal pull up resistor to
VCC on the EN pin ensures that the MOSFET will be
disabled when not being driven.
Slew Rate Control
The NCP45540 devices are equipped with controlled
output slew rate which provides soft start functionality. This
limits the inrush current caused by capacitor charging and
enables these devices to be used in hot swap applications.
The slew rate can be decreased with an external capacitor
added between the SR pin and ground (as shown in
Figures 30 and 31). With an external capacitor present, the
slew rate can be determined by the following equation:
Slew Rate +
K SR
[Vńs]
C SR
(eq. 1)
The NCP45540 devices will function with any power
sequence, but the output turn−on delay performance may
vary from what is specified. To achieve the specified
performance, there are two recommended power sequences:
1. VCC → VIN → VEN
2. VIN → VCC → VEN
where KSR is the specified slew rate control constant, found
in Table 4, and CSR is the slew rate control capacitor added
between the SR pin and ground. The slew rate of the device
will always be the lower of the default slew rate and the
adjusted slew rate. Therefore, if the CSR is not large enough
to decrease the slew rate more than the specified default
value, the slew rate of the device will be the default value.
The SR pin can be left floating if the slew rate does not need
to be decreased.
Load Bleed (Quick Discharge)
Short−Circuit Protection
The NCP45540 devices have an internal bleed resistor,
RBLEED, which is used to bleed the charge off of the load to
ground after the MOSFET has been disabled. In series with
the bleed resistor is a bleed switch that is enabled whenever
the MOSFET is disabled. The MOSFET and the bleed
switch are never concurrently active.
It is required that the BLEED pin be connected to VOUT
either directly (as shown in Figure 31) or through an external
resistor, REXT (as shown in Figure 30). REXT should not
exceed 1 kW and can be used to increase the total bleed
resistance.
Care must be taken to ensure that the power dissipated
across RBLEED is kept at a safe level. The maximum
continuous power that can be dissipated across RBLEED is
0.4 W. REXT can be used to decrease the amount of power
dissipated across RBLEED.
The NCP45540 devices are equipped with short−circuit
protection that is used to help protect the part and the system
from a sudden high−current event, such as the output, VOUT,
being shorted to ground. This circuitry is only active when
the gate of the MOSFET is fully charged.
Once active, the circuitry monitors the difference in the
voltage on the VIN pin and the voltage on the BLEED pin.
In order for the VOUT voltage to be monitored through the
BLEED pin, it is required that the BLEED pin be connected
to VOUT either directly (as shown in Figure 31) or through
a resistor, REXT (as shown in Figure 30), which should not
exceed 1 kW. With the BLEED pin connected to VOUT, the
short−circuit protection is able to monitor the voltage drop
across the MOSFET.
If the voltage drop across the MOSFET is greater than or
equal to the short−circuit protection threshold voltage, the
MOSFET is immediately turned off and the load bleed is
activated. The part remains latched in this off state until EN
is toggled or VCC supply voltage is cycled, at which point the
MOSFET will be turned on in a controlled fashion with the
normal output turn−on delay and slew rate. The current
through the MOSFET that will cause a short−circuit event
can be calculated by dividing the short−circuit protection
threshold by the expected on−resistance of the MOSFET.
Power Sequencing
Power Good
The NCP45540 devices have a power good output (PG)
that can be used to indicate when the gate of the MOSFET
is fully charged. The PG pin is an active−high, open−drain
output that requires an external pull up resistor, RPG, greater
than or equal to 1 kW to an external voltage source, VTERM,
compatible with input levels of other devices connected to
this pin (as shown in Figures 30 and 31).
www.onsemi.com
10
NCP45540
Thermal Shutdown
Undervoltage Lockout
The thermal shutdown of the NCP45540 devices protects
the part from internally or externally generated excessive
temperatures. This circuitry is disabled when EN is not
active to reduce standby current. When an over−temperature
condition is detected, the MOSFET is immediately turned
off and the load bleed is activated.
The part comes out of thermal shutdown when the
junction temperature decreases to a safe operating
temperature as dictated by the thermal hysteresis. Upon
exiting a thermal shutdown state, and if EN remains active,
the MOSFET will be turned on in a controlled fashion with
the normal output turn−on delay and slew rate.
The undervoltage lockout of the NCP45540 devices turns
the MOSFET off and activates the load bleed when the input
voltage, VIN, is less than or equal to the undervoltage
lockout threshold. This circuitry is disabled when EN is not
active to reduce standby current.
If the VIN voltage rises above the undervoltage lockout
threshold, and EN remains active, the MOSFET will be
turned on in a controlled fashion with the normal output
turn−on delay and slew rate.
VTERM = 3.3 V
Power Supply
or Battery
RPG
100 kW
3.0 V − 5.5 V
0.5 V − 13.5 V
VIN
PG
EN
Thermal,
Undervoltage
&
Short−Circuit
Protection
Charge
Pump
Delay and
Slew Rate
Control
SR
CSR
VOUT
Control
Logic
GND
Bandgap
&
Biases
BLEED
VCC
Controller
REXT
Load
Figure 30. Typical Application Diagram − Load Switch
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11
NCP45540
VCC
3.0 V − 5.5 V
EN
VTERM
PG
GND
VIN
0.5 V − 13.5 V
RPG
BACKPLANE
VIN
PG
EN
Delay and
Slew Rate
Control
CSR
VOUT
Charge
Pump
SR
Control
Logic
GND
Thermal,
Undervoltage
&
Short−Circuit
Protection
Bandgap
&
Biases
BLEED
VCC
REMOVABLE
CARD
Load
Figure 31. Typical Application Diagram − Hot Swap
VTERM = 3.3 V
EN
PG
EN
PG
RPG
10 kW
Controller
RPD
100 kW
RPD
100 kW
PG
PG
NCP45540−H
NCP45540−H
Figure 32. Simplified Application Diagram − Power Sequencing with PG Output
ORDERING INFORMATION
Device
EN Polarity
Package
Shipping†
NCP45540IMNTWG−H
Active−High
NCP45540IMNTWG−L
Active−Low
DFN12
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
12
NCP45540
PACKAGE DIMENSIONS
DFN12 3x3, 0.5P
CASE 506CD
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L
A B
D
L1
PIN ONE
INDICATOR
0.10 C
2X
0.10 C
2X
DETAIL A
ÇÇÇ
ÇÇÇ
ÇÇÇ
ALTERNATE
CONSTRUCTIONS
E
MOLD CMPD
ÇÇ
ÉÉ
ÉÉ
EXPOSED Cu
TOP VIEW
A3
DETAIL B
0.05 C
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
L2
K
A1
A3
DETAIL B
A
ALTERNATE
CONSTRUCTION
0.05 C
A1
NOTE 4
0.10
M
11X
L
12X
1
RECOMMENDED
SOLDERING FOOTPRINT*
C A B
2.86
D2
DETAIL A
SEATING
PLANE
C
SIDE VIEW
6
0.32
0.10
M
C A B
L2
12X
0.48
E2
2.10
PACKAGE
OUTLINE
K
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.20
0.30
3.00 BSC
2.60
2.80
3.00 BSC
1.90
2.10
0.50 BSC
0.20
0.40
−−−
0.15
0.10 REF
0.15 MIN
12
7
12X
e
e/2
b
0.10
M
C A-B B
0.05
M
C
3.30
1
NOTE 3
0.45
BOTTOM VIEW
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ecoSWITCH is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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13
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For additional information, please contact your local
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NCP45540/D