NCP45560 ecoSWITCHt Advanced Load Management Controlled Load Switch with Low RON The NCP45560 load switch provides a component and area-reducing solution for efficient power domain switching with inrush current limit via soft−start. In addition to integrated control functionality with ultra low on−resistance, this device offers system safeguards and monitoring via fault protection and power good signaling. This cost effective solution is ideal for power management and hot-swap applications requiring low power consumption in a small footprint. http://onsemi.com RON TYP VCC VIN 2.4 mW 3.3 V 1.8 V 2.6 mW 3.3 V 5.0 V 3.2 mW 3.3 V 12 V IMAX 24 A Features • • • • • • • • • • • • Advanced Controller with Charge Pump Integrated N-Channel MOSFET with Ultra Low RON Input Voltage Range 0.5 V to 13.5 V Soft-Start via Controlled Slew Rate Adjustable Slew Rate Control Power Good Signal Thermal Shutdown Undervoltage Lockout Short-Circuit Protection Extremely Low Standby Current Load Bleed (Quick Discharge) This is a Pb−Free Device 1 DFN12, 3x3 CASE 506CD MARKING DIAGRAM NCP45 560−x ALYWG G x = H for NCP45560−H = L for NCP45560−L A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package Typical Applications • • • • • Portable Electronics and Systems Notebook and Tablet Computers Telecom, Networking, Medical, and Industrial Equipment Set−Top Boxes, Servers, and Gateways Hot−Swap Devices and Peripheral Ports VCC Bandgap & Biases Charge Pump EN (Note: Microdot may be in either location) VIN PG Thermal, Undervoltage & Short−Circuit Protection Control Logic Delay and Slew Rate Control SR May, 2013 − Rev. 0 VIN 1 12 VOUT EN 2 11 VOUT VCC 3 10 VOUT GND 4 9 VOUT SR 5 8 VOUT PG 6 7 BLEED 13: VIN (Top View) GND BLEED VOUT Figure 1. Block Diagram © Semiconductor Components Industries, LLC, 2013 PIN CONFIGURATION 1 ORDERING INFORMATION See detailed ordering and shipping information on page 7 of this data sheet. Publication Order Number: NCP45560/D NCP45560 Table 1. PIN DESCRIPTION Pin Name Function 1, 13 VIN Drain of MOSFET (0.5 V – 13.5 V), Pin 1 must be connected to Pin 13 2 EN NCP45560−H − Active−high digital input used to turn on the MOSFET, pin has an internal pull down resistor to GND NCP45560−L − Active−low digital input used to turn on the MOSFET, pin has an internal pull up resistor to VCC 3 VCC Supply voltage to controller (3.0 V − 5.5 V) 4 GND Controller ground 5 SR Slew rate adjustment; float if not used 6 PG Active−high, open−drain output that indicates when the gate of the MOSFET is fully charged, external pull up resistor ≥ 1 kW to an external voltage source required; tie to GND if not used. 7 BLEED 8−12 VOUT Load bleed connection, must be tied to VOUT either directly or through a resistor ≤ 1 kW Source of MOSFET connected to load Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage Range VCC −0.3 to 6 V Input Voltage Range VIN −0.3 to 18 V VOUT −0.3 to 18 V EN Digital Input Range VEN −0.3 to (VCC + 0.3) V PG Output Voltage Range (Note 1) VPG −0.3 to 6 V Thermal Resistance, Junction−to−Ambient, Steady State (Note 2) RθJA 28.6 °C/W Thermal Resistance, Junction−to−Ambient, Steady State (Note 3) RθJA 49.7 °C/W Thermal Resistance, Junction−to−Case (VIN Paddle) RθJC 1.7 °C/W Continuous MOSFET Current @ TA = 25°C (Notes 2 and 4) IMAX 24 A Continuous MOSFET Current @ TA = 25°C (Notes 3 and 4) Output Voltage Range IMAX 18.3 A Total Power Dissipation @ TA = 25°C (Note 2) Derate above TA = 25°C PD 3.49 34.9 W mW/°C Total Power Dissipation @ TA = 25°C (Note 3) Derate above TA = 25°C PD 2.01 20.1 W mW/°C Storage Temperature Range TSTG −40 to 150 °C Lead Temperature, Soldering (10 sec.) TSLD 260 °C ESD Capability, Human Body Model (Notes 5 and 6) ESDHBM 3.0 kV ESD Capability, Machine Model (Note 5) ESDMM 200 V ESD Capability, Charged Device Model (Note 5) ESDCDM 1.0 kV LU 100 mA Latch−up Current Immunity (Notes 5 and 6) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. PG is an open−drain output that requires an external pull up resistor ≥ 1 kW to an external voltage source. 2. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 3. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu. 4. Ensure that the expected operating MOSFET current will not cause the Short−Circuit Protection to turn the MOSFET off undesirably. 5. Tested by the following methods @ TA = 25°C: ESD Human Body Model tested per JESD22−A114 ESD Machine Model tested per JESD22−A115 ESD Charged Device Model per ESD STM5.3.1 Latch−up Current tested per JESD78 6. Rating is for all pins except for VIN and VOUT which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance for VIN and VOUT should be expected and these devices should be treated as ESD sensitive. http://onsemi.com 2 NCP45560 Table 3. OPERATING RANGES Rating Symbol Min Max Unit Supply Voltage VCC 3 5.5 V Input Voltage VIN 0.5 13.5 V 0 V Ground GND Ambient Temperature TA −40 85 °C Junction Temperature TJ −40 125 °C Table 4. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Conditions (Note 7) Typ Max Unit 2.4 3.3 mW VCC = 3.3 V; VIN = 5 V 2.6 3.6 VCC = 3.3 V; VIN = 12 V 3.2 5.1 Parameter Symbol Min MOSFET On−Resistance Leakage Current (Note 8) VCC = 3.3 V; VIN = 1.8 V RON VEN = 0 V; VIN = 13.5 V ILEAK 0.1 1.0 mA VEN = 0 V; VCC = 3 V ISTBY 0.65 2.0 mA 3.2 4.5 IDYN 280 400 530 750 86 115 144 72 97 121 6.0 10 60 70 CONTROLLER Supply Standby Current (Note 9) VEN = 0 V; VCC = 5.5 V Supply Dynamic Current (Note 10) VEN = VCC = 3 V; VIN = 12 V VEN = VCC = 5.5 V; VIN = 1.8 V Bleed Resistance RBLEED VEN = 0 V; VCC = 3 V VEN = 0 V; VCC = 5.5 V Bleed Pin Leakage Current VEN = VCC = 3 V, VIN = 1.8 V IBLEED VEN = VCC = 3 V, VIN = 12 V EN Input High Voltage VCC = 3 V − 5.5 V VIH EN Input Low Voltage VCC = 3 V − 5.5 V VIL EN Input Leakage Current NCP45560−H; VEN = 0 V IIL NCP45560−L; VEN = VCC IIH 2.0 mA W mA V 0.8 V 90 500 nA 90 500 EN Pull Down Resistance NCP45560−H RPD 76 100 124 kW EN Pull Up Resistance NCP45560−L RPU 76 100 124 kW PG Output Low Voltage (Note 11) VCC = 3 V; ISINK = 5 mA VOL 0.2 V PG Output Leakage Current (Note 12) VCC = 3 V; VTERM = 3.3 V IOH 5.0 100 nA Slew Rate Control Constant (Note 13) VCC = 3 V KSR 33 40 mA Thermal Shutdown Threshold (Note 14) VCC = 3 V − 5.5 V TSDT 145 °C Thermal Shutdown Hysteresis (Note 14) VCC = 3 V − 5.5 V THYS 20 °C VIN Undervoltage Lockout Threshold VCC = 3 V VUVLO VIN Undervoltage Lockout Hysteresis VCC = 3 V VHYS 25 Short−Circuit Protection Threshold VCC = 3 V; VIN = 0.5 V VSC 200 100 285 500 26 FAULT PROTECTIONS VCC = 3 V; VIN = 13.5 V 0.25 0.35 0.45 V 40 60 mV 265 350 mV 7. VEN shown only for NCP45560−H, (EN Active−High) unless otherwise specified. 8. Average current from VIN to VOUT with MOSFET turned off. 9. Average current from VCC to GND with MOSFET turned off. 10. Average current from VCC to GND after charge up time of MOSFET. 11. PG is an open-drain output that is pulled low when the MOSFET is disabled. 12. PG is an open-drain output that is not driven when the gate of the MOSFET is fully charged, requires an external pull up resistor ≥ 1 kW to an external voltage source, VTERM. 13. See Applications Information section for details on how to adjust the slew rate. 14. Operation above TJ = 125°C is not guaranteed. http://onsemi.com 3 NCP45560 Table 5. SWITCHING CHARACTERISTICS (TJ = 25°C unless otherwise specified) (Notes 15 and 16) Parameter Conditions Output Slew Rate Symbol SR VCC = 3.3 V; VIN = 1.8 V Output Turn−on Delay Min 12.4 VCC = 5.0 V; VIN = 1.8 V 12.6 VCC = 3.3 V; VIN = 12 V 13.7 VCC = 5.0 V; VIN = 12 V 14.0 TON VCC = 3.3 V; VIN = 1.8 V 195 VCC = 5.0 V; VIN = 1.8 V 180 VCC = 3.3 V; VIN = 12 V 280 VCC = 5.0 V; VIN = 12 V Output Turn−off Delay 4.1 VCC = 5.0 V; VIN = 1.8 V 3.5 VCC = 3.3 V; VIN = 12 V 1.4 VCC = 5.0 V; VIN = 12 V 0.8 TPG,ON VCC = 3.3 V; VIN = 1.8 V Power Good Turn−off Time 1.71 VCC = 5.0 V; VIN = 1.8 V 1.08 VCC = 3.3 V; VIN = 12 V 2.15 VCC = 5.0 V; VIN = 12 V 1.35 TPG,OFF VCC = 3.3 V; VIN = 1.8 V 28 VCC = 5.0 V; VIN = 1.8 V 21 VCC = 3.3 V; VIN = 12 V 28 VCC = 5.0 V; VIN = 12 V 21 15. See below figure for Test Circuit and Timing Diagram. 16. Tested with the following conditions: VTERM = VCC; RPG = 100 kW; RL = 10 W; CL = 0.1 mF. OFF ON RPG EN VIN VCC NCP45560−H BLEED Dt CL TOFF 10% DV SR = TPG,ON VPG RL SR 50% 90% VOUT VOUT 50% TON VTERM PG GND VEN Max Unit kV/s ms 265 TOFF VCC = 3.3 V; VIN = 1.8 V Power Good Turn−on Time Typ DV 90% Dt TPG,OFF 50% 50% Figure 2. Switching Characteristics Test Circuit and Timing Diagrams http://onsemi.com 4 ms ms ns NCP45560 APPLICATIONS INFORMATION Enable Control Figure 5). This allows for guaranteed by design power sequencing and reduces the number of enable signals needed from the system controller. If the power good feature is not used in the application, the PG pin should be tied to GND. The NCP45560 has two part numbers, NCP45560−H and NCP45560−L, that only differ in the polarity of the enable control. The NCP45560−H device allows for enabling the MOSFET in an active−high configuration. When the VCC supply pin has an adequate voltage applied and the EN pin is at a logic high level, the MOSFET will be enabled. Similarly, when the EN pin is at a logic low level, the MOSFET will be disabled. An internal pull down resistor to ground on the EN pin ensures that the MOSFET will be disabled when not being driven. The NCP45560−L device allows for enabling the MOSFET in an active−low configuration. When the VCC supply pin has an adequate voltage applied and the EN pin is at a logic low level, the MOSFET will be enabled. Similarly, when the EN pin is at a logic high level, the MOSFET will be disabled. An internal pull up resistor to VCC on the EN pin ensures that the MOSFET will be disabled when not being driven. Slew Rate Control The NCP45560 devices are equipped with controlled output slew rate which provides soft start functionality. This limits the inrush current caused by capacitor charging and enables these devices to be used in hot swap applications. The slew rate can be decreased with an external capacitor added between the SR pin and ground (as shown in Figures 3 and 4). With an external capacitor present, the slew rate can be determined by the following equation: Slew Rate + K SR [Vńs] C SR (eq. 1) where KSR is the specified slew rate control constant, found in Table 4, and CSR is the slew rate control capacitor added between the SR pin and ground. The slew rate of the device will always be the lower of the default slew rate and the adjusted slew rate. Therefore, if the CSR is not large enough to decrease the slew rate more than the specified default value, the slew rate of the device will be the default value. The SR pin can be left floating if the slew rate does not need to be decreased. Power Sequencing The NCP45560 devices will function with any power sequence, but the output turn−on delay performance may vary from what is specified. To achieve the specified performance, there are two recommended power sequences: 1. VCC → VIN → VEN 2. VIN → VCC → VEN Short−Circuit Protection The NCP45560 devices are equipped with short−circuit protection that is used to help protect the part and the system from a sudden high−current event, such as the output, VOUT, being shorted to ground. This circuitry is only active when the gate of the MOSFET is fully charged. Once active, the circuitry monitors the difference in the voltage on the VIN pin and the voltage on the BLEED pin. In order for the VOUT voltage to be monitored through the BLEED pin, it is required that the BLEED pin be connected to VOUT either directly (as shown in Figure 4) or through a resistor, REXT (as shown in Figure 3), which should not exceed 1 kW. With the BLEED pin connected to VOUT, the short−circuit protection is able to monitor the voltage drop across the MOSFET. If the voltage drop across the MOSFET is greater than or equal to the short−circuit protection threshold voltage, the MOSFET is immediately turned off and the load bleed is activated. The part remains latched in this off state until EN is toggled or VCC supply voltage is cycled, at which point the MOSFET will be turned on in a controlled fashion with the normal output turn−on delay and slew rate. The current through the MOSFET that will cause a short−circuit event can be calculated by dividing the short−circuit protection threshold by the expected on−resistance of the MOSFET. Load Bleed (Quick Discharge) The NCP45560 devices have an internal bleed resistor, RBLEED, which is used to bleed the charge off of the load to ground after the MOSFET has been disabled. In series with the bleed resistor is a bleed switch that is enabled whenever the MOSFET is disabled. The MOSFET and the bleed switch are never concurrently active. It is required that the BLEED pin be connected to VOUT either directly (as shown in Figure 4) or through an external resistor, REXT (as shown in Figure 3). REXT should not exceed 1 kW and can be used to increase the total bleed resistance. Care must be taken to ensure that the power dissipated across RBLEED is kept at a safe level. REXT can be used to decrease the amount of power dissipated across RBLEED. Power Good The NCP45560 devices have a power good output (PG) that can be used to indicate when the gate of the MOSFET is fully charged. The PG pin is an active−high, open−drain output that requires an external pull up resistor, RPG, greater than or equal to 1 kW to an external voltage source, VTERM, compatible with input levels of other devices connected to this pin (as shown in Figures 3 and 4). The power good output can be used as the enable signal for other active−high devices in the system (as shown in http://onsemi.com 5 NCP45560 Thermal Shutdown Undervoltage Lockout The thermal shutdown of the NCP45560 devices protects the part from internally or externally generated excessive temperatures. This circuitry is disabled when EN is not active to reduce standby current. When an over−temperature condition is detected, the MOSFET is immediately turned off and the load bleed is activated. The part comes out of thermal shutdown when the junction temperature decreases to a safe operating temperature as dictated by the thermal hysteresis. Upon exiting a thermal shutdown state, and if EN remains active, the MOSFET will be turned on in a controlled fashion with the normal output turn−on delay and slew rate. The undervoltage lockout of the NCP45560 devices turns the MOSFET off and activates the load bleed when the input voltage, VIN, is less than or equal to the undervoltage lockout threshold. This circuitry is disabled when EN is not active to reduce standby current. If the VIN voltage rises above the undervoltage lockout threshold, and EN remains active, the MOSFET will be turned on in a controlled fashion with the normal output turn−on delay and slew rate. VTERM = 3.3 V Power Supply or Battery RPG 100 kW 3.0 V − 5.5 V 0.5 V − 13.5 V VIN PG EN Thermal, Undervoltage & Short−Circuit Protection Charge Pump Delay and Slew Rate Control SR CSR VOUT Control Logic GND Bandgap & Biases BLEED VCC Controller REXT Load Figure 3. Typical Application Diagram − Load Switch http://onsemi.com 6 NCP45560 VCC 3.0 V − 5.5 V EN VTERM PG GND VIN 0.5 V − 13.5 V RPG BACKPLANE VIN PG EN Delay and Slew Rate Control CSR VOUT Charge Pump SR Control Logic GND Thermal, Undervoltage & Short−Circuit Protection Bandgap & Biases BLEED VCC REMOVABLE CARD Load Figure 4. Typical Application Diagram − Hot Swap VTERM = 3.3 V EN PG EN PG RPG 10 kW Controller RPD 100 kW RPD 100 kW PG PG NCP45560−H NCP45560−H Figure 5. Simplified Application Diagram − Power Sequencing with PG Output ORDERING INFORMATION Device EN Polarity Package Shipping† NCP45560IMNTWG−H Active−High NCP45560IMNTWG−L Active−Low DFN12 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 7 NCP45560 PACKAGE DIMENSIONS DFN12 3x3, 0.5P CASE 506CD ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L L A B D L1 PIN ONE INDICATOR 0.10 C 2X 2X 0.10 C ÇÇÇ ÇÇÇ ÇÇÇ DETAIL A ALTERNATE CONSTRUCTIONS E MOLD CMPD EXPOSED Cu TOP VIEW A3 DETAIL B 0.05 C A1 A 0.05 C NOTE 4 SIDE VIEW A1 D2 1 6 DETAIL B A3 ALTERNATE CONSTRUCTION SEATING PLANE C 0.10 DETAIL A ÇÇ ÉÉ DIM A A1 A3 b D D2 E E2 e L L1 L2 M RECOMMENDED SOLDERING FOOTPRINT* C A B 2.86 L 12X MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 3.00 BSC 2.60 2.80 3.00 BSC 1.90 2.10 0.50 BSC 0.20 0.40 −−− 0.15 0.10 REF 11X 0.32 0.10 M C A B L2 12X 0.48 E2 2.10 PACKAGE OUTLINE 12 7 e e/2 BOTTOM VIEW 12X b 0.10 M C A-B B 0.05 M C 3.30 1 NOTE 3 0.45 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ecoSWITCH is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 8 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP45560/D