NCP45541 D

NCP45541
ecoSWITCHt
Advanced Load Management
Controlled Load Switch with Low RON
The NCP45541 load switch provides a component and areareducing solution for efficient power domain switching with inrush
current limit via soft−start. In addition to integrated control
functionality with ultra low on−resistance, this device offers system
monitoring via power good signaling. This cost effective solution is
ideal for power management and hot-swap applications requiring low
power consumption in a small footprint.
Features
•
•
•
•
•
•
•
•
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RON TYP
VCC
VIN
3.3 mW
3.3 V
1.8 V
3.6 mW
3.3 V
5.0 V
4.8 mW
3.3 V
12 V
Advanced Controller with Charge Pump
Integrated N-Channel MOSFET with Low RON
Input Voltage Range 0.5 V to 13.5 V
Soft-Start via Controlled Slew Rate
Adjustable Slew Rate Control
Power Good Signal
Extremely Low Standby Current
Load Bleed (Quick Discharge)
This is a Pb−Free Device
1
MARKING DIAGRAM
NCP45
541−x
ALYWG
G
Portable Electronics and Systems
Notebook and Tablet Computers
Telecom, Networking, Medical, and Industrial Equipment
Set−Top Boxes, Servers, and Gateways
Hot−Swap Devices and Peripheral Ports
VCC
EN
x = H for NCP45541−H
= L for NCP45541−L
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
VIN
PG
20 A
DFN12, 3x3
CASE 506CD
Typical Applications
•
•
•
•
•
IMAX
(Note: Microdot may be in either location)
Bandgap
&
Biases
Charge
Pump
PIN CONFIGURATION
Control
Logic
1
12
VOUT
EN
2
11
VOUT
VCC
3
10
VOUT
13: VIN
Delay and
Slew Rate
Control
SR
VIN
GND
BLEED
VOUT
GND
4
9
VOUT
SR
5
8
NC
PG
6
7
BLEED
(Top View)
Figure 1. Block Diagram
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
February, 2015 − Rev. 3
1
Publication Order Number:
NCP45541/D
NCP45541
Table 1. PIN DESCRIPTION
Pin
Name
Function
1, 13
VIN
Drain of MOSFET (0.5 V – 13.5 V), Pin 1 must be connected to Pin 13
2
EN
NCP45541−H − Active−high digital input used to turn on the MOSFET, pin has an internal pull down resistor to
GND
NCP45541−L − Active−low digital input used to turn on the MOSFET, pin has an internal pull up resistor to VCC
3
VCC
Supply voltage to controller (3.0 V − 5.5 V)
4
GND
Controller ground
5
SR
Slew rate adjustment; float if not used
6
PG
Active−high, open−drain output that indicates when the gate of the MOSFET is fully driven, external pull up
resistor ≥ 1 kW to an external voltage source required; tie to GND if not used.
7
BLEED
8
NC
9−12
VOUT
Load bleed connection, must be tied to VOUT either directly or through a resistor
≤ 100 MW
No connect, internally floating but pin may be tied to VOUT
Source of MOSFET connected to load
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
−0.3 to 6
V
Supply Voltage Range
Input Voltage Range
VIN
−0.3 to 18
V
Output Voltage Range
VOUT
−0.3 to 18
V
EN Digital Input Range
VEN
−0.3 to (VCC + 0.3)
V
PG Output Voltage Range (Note 1)
VPG
−0.3 to 6
V
Thermal Resistance, Junction−to−Ambient, Steady State (Note 2)
RθJA
30.9
°C/W
Thermal Resistance, Junction−to−Ambient, Steady State (Note 3)
RθJA
51.3
°C/W
Thermal Resistance, Junction−to−Case (VIN Paddle)
RθJC
3.5
°C/W
Continuous MOSFET Current @ TA = 25°C (Note 2)
IMAX
20
A
Continuous MOSFET Current @ TA = 25°C (Note 3)
IMAX
15.5
A
Total Power Dissipation @ TA = 25°C (Note 2)
Derate above TA = 25°C
PD
3.24
32.4
W
mW/°C
Total Power Dissipation @ TA = 25°C (Note 3)
Derate above TA = 25°C
PD
1.95
19.5
W
mW/°C
Storage Temperature Range
TSTG
−40 to 150
°C
Lead Temperature, Soldering (10 sec.)
TSLD
260
°C
ESD Capability, Human Body Model (Notes 4 and 5)
ESDHBM
3.0
kV
ESD Capability, Charged Device Model (Note 4)
ESDCDM
1.0
kV
LU
100
mA
Latch−up Current Immunity (Notes 4 and 5)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. PG is an open−drain output that requires an external pull up resistor ≥ 1 kW to an external voltage source.
2. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
3. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu.
4. Tested by the following methods @ TA = 25°C:
ESD Human Body Model tested per JESD22−A114
ESD Charged Device Model per ESD STM5.3.1
Latch−up Current tested per JESD78
5. Rating is for all pins except for VIN and VOUT which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance
for VIN and VOUT should be expected and these devices should be treated as ESD sensitive.
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NCP45541
Table 3. OPERATING RANGES
Rating
Symbol
Min
Max
Unit
Supply Voltage
VCC
3
5.5
V
Input Voltage
VIN
0.5
13.5
V
0
V
Ground
GND
Ambient Temperature
TA
−40
85
°C
Junction Temperature
TJ
−40
125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Conditions (Note 6)
Typ
Max
Unit
3.3
4.5
mW
VCC = 3.3 V; VIN = 5 V
3.6
4.9
VCC = 3.3 V; VIN = 12 V
4.8
7.7
Parameter
Symbol
Min
MOSFET
On−Resistance
Leakage Current (Note 7)
VCC = 3.3 V; VIN = 1.8 V
RON
VEN = 0 V; VIN = 13.5 V
ILEAK
0.1
1.0
mA
VEN = 0 V; VCC = 3 V
ISTBY
0.65
2.0
mA
3.2
4.5
180
300
475
680
86
115
144
72
97
121
CONTROLLER
Supply Standby Current (Note 8)
VEN = 0 V; VCC = 5.5 V
Supply Dynamic Current (Note 9)
VEN = VCC = 3 V; VIN = 12 V
IDYN
VEN = VCC = 5.5 V; VIN = 1.8 V
Bleed Resistance
RBLEED
VEN = 0 V; VCC = 3 V
VEN = 0 V; VCC = 5.5 V
EN Input High Voltage
VCC = 3 V − 5.5 V
VIH
EN Input Low Voltage
VCC = 3 V − 5.5 V
VIL
EN Input Leakage Current
NCP45541−H; VEN = 0 V
IIL
NCP45541−L; VEN = VCC
IIH
2.0
mA
W
V
0.8
V
90
500
nA
90
500
EN Pull Down Resistance
NCP45541−H
RPD
76
100
124
kW
EN Pull Up Resistance
NCP45541−L
RPU
76
100
124
kW
PG Output Low Voltage (Note 10)
VCC = 3 V; ISINK = 5 mA
VOL
0.2
V
PG Output Leakage Current (Note 11)
VCC = 3 V; VTERM = 3.3 V
IOH
5.0
100
nA
Slew Rate Control Constant (Note 12)
VCC = 3 V
KSR
33
40
mA
26
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. VEN shown only for NCP45541−H, (EN Active−High) unless otherwise specified.
7. Average current from VIN to VOUT with MOSFET turned off.
8. Average current from VCC to GND with MOSFET turned off.
9. Average current from VCC to GND after charge up time of MOSFET.
10. PG is an open-drain output that is pulled low when the MOSFET is disabled.
11. PG is an open-drain output that is not driven when the gate of the MOSFET is fully charged, requires an external pull up resistor ≥ 1 kW to
an external voltage source, VTERM.
12. See Applications Information section for details on how to adjust the slew rate.
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NCP45541
Table 5. SWITCHING CHARACTERISTICS (TJ = 25°C unless otherwise specified) (Notes 13 and 14)
Parameter
Conditions
Output Slew Rate
Symbol
SR
VCC = 3.3 V; VIN = 1.8 V
Output Turn−on Delay
Min
11.8
VCC = 5.0 V; VIN = 1.8 V
12.0
VCC = 3.3 V; VIN = 12 V
13.3
VCC = 5.0 V; VIN = 12 V
13.5
TON
VCC = 3.3 V; VIN = 1.8 V
200
VCC = 5.0 V; VIN = 1.8 V
170
VCC = 3.3 V; VIN = 12 V
260
VCC = 5.0 V; VIN = 12 V
Output Turn−off Delay
2.0
VCC = 5.0 V; VIN = 1.8 V
1.6
VCC = 3.3 V; VIN = 12 V
0.7
VCC = 5.0 V; VIN = 12 V
0.4
TPG,ON
VCC = 3.3 V; VIN = 1.8 V
Power Good Turn−off Time
1.02
VCC = 5.0 V; VIN = 1.8 V
0.95
VCC = 3.3 V; VIN = 12 V
1.52
VCC = 5.0 V; VIN = 12 V
1.23
TPG,OFF
VCC = 3.3 V; VIN = 1.8 V
20
VCC = 5.0 V; VIN = 1.8 V
14
VCC = 3.3 V; VIN = 12 V
20
VCC = 5.0 V; VIN = 12 V
14
13. See below figure for Test Circuit and Timing Diagram.
14. Tested with the following conditions: VTERM = VCC; RPG = 100 kW; RL = 10 W; CL = 0.1 mF.
VTERM
RPG
OFF ON
EN
VIN
PG
NCP45541−H
VOUT
BLEED
VCC
GND
RL
SR
50%
CL
50%
VEN
TON
Dt
TOFF
90%
VOUT
10%
DV
SR =
TPG,ON
VPG
Max
Unit
kV/s
ms
250
TOFF
VCC = 3.3 V; VIN = 1.8 V
Power Good Turn−on Time
Typ
DV
90%
Dt
TPG,OFF
50%
50%
Figure 2. Switching Characteristics Test Circuit and Timing Diagrams
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4
ms
ms
ns
NCP45541
TYPICAL CHARACTERISTICS
6.0
9
5.5
8
RON, ON−RESISTANCE (mW)
RON, ON−RESISTANCE (mW)
(TJ = 25°C unless otherwise specified)
5.0
4.5
VCC = 3 V
4.0
VCC = 5.5 V
3.5
7
6
6.5
8.5
10.5
4
VIN = 1.8 V
3
2
−45 −30 −15
12.5
0
15
30
45
60
75
90 105 120
TJ, JUNCTION TEMPERATURE (°C)
Figure 3. On−Resistance vs. Input Voltage
Figure 4. On−Resistance vs. Temperature
ISTBY, SUPPLY STANDBY CURRENT (mA)
VIN, INPUT VOLTAGE (V)
3.0
2.5
2.0
1.5
1.0
0.5
3.5
4.0
4.5
5.0
5.5
7
6
5
4
VCC = 5.5 V
3
2
1
VCC = 3 V
0
−45 −30 −15
0
15
30
45
60
75
90 105 120
VCC, SUPPLY VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Supply Standby Current vs. Supply
Voltage
Figure 6. Supply Standby Current vs.
Temperature
IDYN, SUPPLY DYNAMIC CURRENT (mA)
ISTBY, SUPPLY STANDBY CURRENT (mA)
4.5
3.5
3.0
IDYN, SUPPLY DYNAMIC CURRENT (mA)
2.5
VIN = 5.0 V
5
3.0
0.5
VIN = 12 V
VCC = 3.3 V
500
450
400
350
300
250
200
VCC = 5.5 V
150
VCC = 3 V
100
0.5
2.5
4.5
6.5
8.5
10.5
12.5
500
450
VIN = 1.8 V
400
350
300
250
VIN = 12 V
200
150
100
3.0
3.5
4.0
4.5
5.0
5.5
VIN, INPUT VOLTAGE (V)
VCC, SUPPLY VOLTAGE (V)
Figure 7. Supply Dynamic Current vs. Input
Voltage
Figure 8. Supply Dynamic Current vs. Supply
Voltage
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NCP45541
TYPICAL CHARACTERISTICS
700
600
RBLEED, BLEED RESISTANCE (W)
115
VCC = 5.5 V, VIN = 1.8 V
500
400
300
VCC = 3.0 V, VIN = 12 V
200
100
−45
15
45
75
100
3.0
3.5
4.0
4.5
5.0
5.5
TJ, JUNCTION TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
Figure 9. Supply Dynamic Current vs.
Temperature
Figure 10. Bleed Resistance vs. Supply
Voltage
135
VCC = 3 V
125
115
VCC = 5.5 V
105
95
−15
15
45
75
105
120
115
110
105
100
95
90
85
−45
−15
15
45
75
105
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Bleed Resistance vs. Temperature
Figure 12. EN Pull Down/Up Resistance vs.
Temperature
0.140
VOL, PG OUTPUT LOW VOLTAGE (V)
RBLEED, BLEED RESISTANCE (W)
VOL, PG OUTPUT LOW VOLTAGE (V)
105
105
145
85
−45
110
95
−15
IPD/PU, EN PULL DOWN/UP RESISTANCE (kW)
IDYN, SUPPLY DYNAMIC CURRENT (mA)
(TJ = 25°C unless otherwise specified)
ISINK = 5 mA
0.135
0.130
0.125
0.120
0.115
0.110
3.0
3.5
4.0
4.5
5.0
5.5
0.20
ISINK = 5 mA
0.18
VCC = 3 V
0.16
0.14
VCC = 5.5 V
0.12
0.10
0.08
−45
−15
15
45
75
105
VCC, SUPPLY VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 13. PG Output Low Voltage vs. Supply
Voltage
Figure 14. PG Output Low Voltage vs.
Temperature
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NCP45541
TYPICAL CHARACTERISTICS
KSR, SLEW RATE CONTROL CONSTANT (mA)
KSR, SLEW RATE CONTROL CONSTANT (mA)
(TJ = 25°C unless otherwise specified)
37
35.5
36
35.0
VCC = 5.5 V
35
34.5
34
VCC = 3 V
33
34.0
32
33.5
31
30
32.5
29
28
0.5
2.5
4.5
6.5
8.5
10.5
32.0
−45
12.5
−15
15
45
75
105
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. Slew Rate Control Constant vs.
Input Voltage
Figure 16. Slew Rate Control Constant vs.
Temperature
14.0
VCC = 5.5 V
13
SR, OUTPUT SLEW RATE (kV/s)
SR, OUTPUT SLEW RATE (kV/s)
VCC = 3 V
33.0
14
VCC = 3 V
12
11
10
9
0.5
2.5
4.5
6.5
8.5
10.5
13.5
VCC = 3.3 V, VIN = 12 V
13.0
12.5
12.0
VCC = 5 V, VIN = 1.8 V
11.5
11.0
10.5
−40
12.5
−20
0
20
40
60
80
100
120
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 17. Output Slew Rate vs. Input Voltage
Figure 18. Output Slew Rate vs. Temperature
290
TON, OUTPUT TURN−ON DELAY (ms)
TON, OUTPUT TURN−ON DELAY (ms)
VCC = 5.5 V
270
VCC = 3 V
250
230
VCC = 5.5 V
210
190
170
150
0.5
2.5
4.5
6.5
8.5
10.5
12.5
275
VCC = 3.3 V, VIN = 12 V
250
225
200
175
150
−40
VCC = 5 V, VIN = 1.8 V
−20
0
20
40
60
80
100
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. Output Turn−on Delay vs. Input
Voltage
Figure 20. Output Turn−on Delay vs.
Temperature
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120
NCP45541
TYPICAL CHARACTERISTICS
3.0
TOFF, OUTPUT TURN−OFF DELAY (ms)
TOFF, OUTPUT TURN−OFF DELAY (ms)
(TJ = 25°C unless otherwise specified)
2.5
2.0
VCC = 3 V
1.5
1.0
VCC = 5.5 V
0.5
0
0.5
2.5
4.5
6.5
8.5
10.5
12.5
1.50
1.25
1.00
VCC = 3.3 V, VIN = 12 V
0.75
0.50
−40
−20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 22. Output Turn−off Delay vs.
Temperature
120
1.8
TPG,ON, PG TURN−ON TIME (ms)
TPG,ON, PG TURN−ON TIME (ms)
VCC = 5 V, VIN = 1.8 V
VIN, INPUT VOLTAGE (V)
1.8
VCC = 3 V
1.6
1.4
VCC = 5.5 V
1.2
1.0
0.8
0.5
2.5
4.5
6.5
8.5
10.5
1.7
1.6
VCC = 3.3 V, VIN = 12 V
1.5
1.4
1.3
1.2
1.1
1.0
VCC = 5 V, VIN = 1.8 V
0.9
0.8
−40
12.5
−20
0
20
40
60
80
100
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 23. Power Good Turn−on Time vs. Input
Voltage
Figure 24. Power Good Turn−on Time vs.
Temperature
120
26
TPG,OFF, PG TURN−OFF TIME (ns)
24
TPG,OFF, PG TURN−OFF TIME (ns)
1.75
Figure 21. Output Turn−off Delay vs. Input
Voltage
2.0
22
VIN = 13.5 V
20
18
2.00
VIN = 0.5 V
16
14
3.5
4.0
4.5
5.0
VCC = 3.3 V, VIN = 12 V
22
20
18
16
VCC = 5 V, VIN = 1.8 V
14
12
10
−40 −20
12
3.0
24
5.5
0
20
40
60
80
100
VCC, SUPPLY VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 25. Power Good Turn−off Time vs.
Supply Voltage
Figure 26. Power Good Turn−off Time vs.
Temperature
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120
NCP45541
APPLICATIONS INFORMATION
Enable Control
continuous power that can be dissipated across RBLEED is
0.4 W. REXT can be used to decrease the amount of power
dissipated across RBLEED.
The NCP45541 has two part numbers, NCP45541−H and
NCP45541−L, that only differ in the polarity of the enable
control.
The NCP45541−H device allows for enabling the
MOSFET in an active−high configuration. When the VCC
supply pin has an adequate voltage applied and the EN pin
is at a logic high level, the MOSFET will be enabled.
Similarly, when the EN pin is at a logic low level, the
MOSFET will be disabled. An internal pull down resistor to
ground on the EN pin ensures that the MOSFET will be
disabled when not being driven.
The NCP45541−L device allows for enabling the
MOSFET in an active−low configuration. When the VCC
supply pin has an adequate voltage applied and the EN pin
is at a logic low level, the MOSFET will be enabled.
Similarly, when the EN pin is at a logic high level, the
MOSFET will be disabled. An internal pull up resistor to
VCC on the EN pin ensures that the MOSFET will be
disabled when not being driven.
Power Good
The NCP45541 devices have a power good output (PG)
that can be used to indicate when the gate of the MOSFET
is fully charged. The PG pin is an active−high, open−drain
output that requires an external pull up resistor, RPG, greater
than or equal to 1 kW to an external voltage source, VTERM,
compatible with input levels of other devices connected to
this pin (as shown in Figures 27 and 28).
The power good output can be used as the enable signal for
other active−high devices in the system (as shown in
Figure 29). This allows for guaranteed by design power
sequencing and reduces the number of enable signals needed
from the system controller. If the power good feature is not
used in the application, the PG pin should be tied to GND.
Slew Rate Control
The NCP45541 devices are equipped with controlled
output slew rate which provides soft start functionality. This
limits the inrush current caused by capacitor charging and
enables these devices to be used in hot swap applications.
The slew rate can be decreased with an external capacitor
added between the SR pin and ground (as shown in
Figures 27 and 28). With an external capacitor present, the
slew rate can be determined by the following equation:
Power Sequencing
The NCP45541 devices will function with any power
sequence, but the output turn−on delay performance may
vary from what is specified. To achieve the specified
performance, there are two recommended power sequences:
1. VCC → VIN → VEN
2. VIN → VCC → VEN
Slew Rate +
Load Bleed (Quick Discharge)
The NCP45541 devices have an internal bleed resistor,
RBLEED, which is used to bleed the charge off of the load to
ground after the MOSFET has been disabled. In series with
the bleed resistor is a bleed switch that is enabled whenever
the MOSFET is disabled. The MOSFET and the bleed
switch are never concurrently active.
It is required that the BLEED pin be connected to VOUT
either directly (as shown in Figure 28) or through an external
resistor, REXT (as shown in Figure 27). REXT should not
exceed 100 MW and can be used to increase the total bleed
resistance and decrease the load bleed rate.
Care must be taken to ensure that the power dissipated
across RBLEED is kept at a safe level. The maximum
K SR
[Vńs]
C SR
(eq. 1)
where KSR is the specified slew rate control constant, found
in Table 4, and CSR is the slew rate control capacitor added
between the SR pin and ground. The slew rate of the device
will always be the lower of the default slew rate and the
adjusted slew rate. Therefore, if the CSR is not large enough
to decrease the slew rate more than the specified default
value, the slew rate of the device will be the default value.
The SR pin can be left floating if the slew rate does not need
to be decreased.
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NCP45541
VTERM = 3.3 V
Power Supply
or Battery
RPG
100 kW
3.0 V − 5.5 V
0.5 V − 13.5 V
Delay and
Slew Rate
Control
SR
CSR
VOUT
Charge
Pump
BLEED
Control
Logic
GND
Bandgap
&
Biases
VIN
PG
EN
VCC
Controller
REXT
Load
Figure 27. Typical Application Diagram − Load Switch
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NCP45541
VCC
3.0 V − 5.5 V
EN
VTERM
PG
GND
VIN
0.5 V − 13.5 V
RPG
BACKPLANE
CSR
VOUT
Delay and
Slew Rate
Control
BLEED
Charge
Pump
VIN
PG
Control
Logic
SR
Bandgap
&
Biases
GND
EN
VCC
REMOVABLE
CARD
Load
Figure 28. Typical Application Diagram − Hot Swap
VTERM = 3.3 V
EN
PG
EN
PG
RPG
10 kW
Controller
RPD
100 kW
RPD
100 kW
PG
PG
NCP45541−H
NCP45541−H
Figure 29. Simplified Application Diagram − Power Sequencing with PG Output
ORDERING INFORMATION
Device
EN Polarity
Package
Shipping†
NCP45541IMNTWG−H
Active−High
NCP45541IMNTWG−L
Active−Low
DFN12
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
11
NCP45541
PACKAGE DIMENSIONS
DFN12 3x3, 0.5P
CASE 506CD
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L
A B
D
L1
PIN ONE
INDICATOR
0.10 C
2X
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
0.10 C
2X
DETAIL A
ALTERNATE
CONSTRUCTIONS
E
MOLD CMPD
ÇÇ
ÉÉ
ÉÉ
EXPOSED Cu
TOP VIEW
A3
DETAIL B
0.05 C
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
L2
K
A1
A3
DETAIL B
A
ALTERNATE
CONSTRUCTION
0.05 C
A1
NOTE 4
C
SIDE VIEW
0.10
M
D2
DETAIL A
RECOMMENDED
SOLDERING FOOTPRINT*
C A B
2.86
L
12X
1
SEATING
PLANE
6
11X
0.10
M
0.32
C A B
L2
12X
0.48
E2
2.10
PACKAGE
OUTLINE
K
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.20
0.30
3.00 BSC
2.60
2.80
3.00 BSC
1.90
2.10
0.50 BSC
0.20
0.40
−−−
0.15
0.10 REF
0.15 MIN
12
7
12X
e
e/2
b
0.10
M
C A-B B
0.05
M
C
3.30
1
NOTE 3
BOTTOM VIEW
0.45
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ecoSWITCH is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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www.onsemi.com
12
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP45541/D