STK984-090A-E 20A/40V Integrated Power Module in SIP23 package The STK984-090A-E is a fully-integrated inverter power stage consisting of a gate driver, six MOSFET’s and a high-side shunt resistor, suitable for driving permanent magnet synchronous (PMSM) motors and brushlessDC (BLDC) motors. The MOSFET’s are configured in a 3-phase bridge with a single drain connection for the lower legs. The power stage has a full range of protection functions including cross-conduction protection, external shutdown and undervoltage lockout. www.onsemi.com PACKAGE PICTURE Features Module with six 40V/20A MOSFETs, driver and sense resistor 59.8mm 26.7mm single in-line package with 90° lead bend Built-in charge pump for operation with low battery voltage Over-current protection on both high-side and low-side MOSFETs Over-temperature shutdown Undervoltage and overvoltage shutdown for defined operation at all input voltages Integrated high-side resistor for external current sensing SIP23 / SIP2E 2nd MARKING DIAGRAM Typical Applications Automotive Fans Automotive Pumps STK984-090A-E = Specific Device Code A = Year B = Month C = Production Site DD = Factory Lot Code PIN CONNECTIONS ORDERING INFORMATION Figure 1: Functional Diagram Device STK984-090A-E © Semiconductor Components Industries, LLC, 2016 March 2016 - Rev. 2 1 Package SIP23 / SIP2E 2nd (Pb-Free) Shipping (Qty / Packing) 9 / Tube Publication Order Number: STK984-090A-E/D STK984-090A-E Figure 2: Application Schematic www.onsemi.com 2 STK984-090A-E Figure 3: Simplified Block Diagram www.onsemi.com 3 STK984-090A-E PIN FUNCTION DESCRIPTION Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Pin Name VB2 SG RESET HINU HINV HINW LINU LINV LINW DIAG1 DIAG2 U U V V W W PG PG VB1 VB1 S1 S2 Description Control System Power Control System GND RESET Terminal Driving Signal Input Upper U-phase Driving Signal Input Upper V-phase Driving Signal Input Upper W-phase Driving Signal Input Lower U-phase Driving Signal Input Lower V-phase Driving Signal Input Lower W-phase Fault Diagnosis Output 1 (Overcurrent) Fault Diagnosis Output 2 (Over Temperature) U-phase Output U-phase Output V-phase Output V-phase Output W-phase Output W-phase Output Power System GND Power System GND Power System Supply Power System Supply Current Sense Resistor Sensing (+) terminal Current Sense Resistor Sensing () terminal Table 1: Pin Function Description www.onsemi.com 4 STK984-090A-E ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Rating Supply Voltage Symbol Conditions Value Unit V VB1 max VB1 to PG 0.3 to 40 VB2 max VB2 to SG 0.3 to 40 V V Control Input Voltage Vin max HINx, LINx to SG (x=U,V,W) 0.3 to 6 DIAG Terminal Voltage VDIAG DIAG1, DIAG2 to SG 0.3 to 6 V Drain Current Id max DC 20 A Pulse (Single 10μs pulse) 180 A Junction Temperature Tjmax Semiconductor Device 150 C Storage Temperature Tstg 40 to +125 C 1. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 2. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. RECOMMENDED OPERATING RANGES (Note 3) Rating Supply Voltage Symbol Test Conditions Min Typ Max Unit VB1 VB1 to PG 8 13.5 18 V VB2 VB2 to SG 8 13.5 18 V - - 20 A 40 - 125 C Output Current Io Operating Substrate Temperature Tc 120deg Excitation Method with 100% duty cycle Drive PWM Frequency fo Duty cycle 10% to 90%, or 100% 20 kHz 3. Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 5 STK984-090A-E ELECTRICAL CHARACTERISTICS (Note 4) at Ta = 25C , VB1, VB2 = 13.5V unless otherwise specified Parameter Test Conditions Symbol Min Typ Max Unit - 10 15 mA - 0.3 0.5 V - 0.2 0.4 V 2.91 3.00 3.09 m 0.9 1.8 2.8 μs 0.9 1.9 3.0 μs - 0.3 - s 1.3 2.9 4.5 μs 0.8 2.2 3.5 μs Power output section Current consumption (Control system) VB1=16V, VB2=16V Icc Output saturation voltage IO=20A. VB1 to U, V, W IO=20A. U, V, W to PG Current sensing resistor Time delay (ON) VDS(sat) Rs IO=20A for U, V, W low to high IO=20A for U, V, W high to low Rise time IO=20A Time delay (OFF) IO=20A for U, V, W high to low td(on) tr IO=20A for U, V, W low to high td(off) tf - 0.3 - s θjc - 4.5 - C/W Undervoltage Lockout Falling Threshold Vuv 4.45 4.75 5.1 V Undervoltage Lockout Hysteresis Vuv(hy) 0.07 0.2 0.3 V Undervoltage Lockout Output Delay tuvoff - 1.0 - s 21 34 44 A tocdgoff - 4.3 - s tINT - 1 - ms tocoff - 4.3 - s 47 84 113 A tspdgoff - 3.0 - s tspoff - 3.0 - s Tst(rising) 146 155 165 C Tst(falling) 126 135 145 C tthdgoff - 3.4 - s tthoff - 3.4 - s Over Voltage Protection Rising Threshold Vov 24 - - V Over Voltage Protection Hysteresis Vov(hy) - 0.5 - V Over Voltage Protection Output Delay tovoff - 1.0 - s VDIAG - - 0.2 V Rise time IO=20A Thermal resistance Chip to case Thermal Resistance Junction-to-substrate (MOSFET) Protection Functions Over Current Threshold Automatic Recovery ISD Over Current DIAG Output Delay Time Over Current Shutdown Interval Over Current Shutdown Output Delay Ground Fault Short-Circuit Protection Power-Cycle IOC Ground Fault Short-Circuit Detection DIAG Output Delay Time Ground Fault Short-Circuit Shutdown Output Delay Time Temperature Protection Shutdown Temperature Protection Recovery IPM Substrate Temperature Rising Temperature Threshold IPM Substrate Temperature Falling Temperature Threshold Over Temperature DIAG Output Delay Time Over Temperature Shutdown Output Delay DIAG Output DIAG Output Voltage (DIAG1, DIAG2) DIAGx=LOW, Sink Current =1mA DIAG Output Leakage Current VDIAG=5V 1 IDILK A (DIAG1, DIAG2) 4. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 6 STK984-090A-E ELECTRICAL CHARACTERISTICS (Note 5) at 8V≤VB1,VB2≤18V, 40C≤Ta≤125C Parameter Test Conditions Symbol Min Typ Max Unit Motor Control Input Terminal HIGH level input voltage Output ON. LINx, HINx to SG. x=U,V,W Vin(on) 3.5 - - V LOW level input voltage Output OFF. LINx, HINx to SG. x=U,V,W Vin(off) - - 1.5 V Vreset(Hi) 3.5 - - V Reset Input Terminal Reset HIGH level input voltage Output ON 1.5 Output OFF Vreset(Lo) V From Reset Input Terminal (RESET=Hi) 0.25 Output Delay Time (ON) treset(on) ms to Output ON From Reset Input Terminal (RESET=Lo) 2 Output Delay Time (OFF) treset(off) s to Output OFF 5. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. Reset LOW level input voltage www.onsemi.com 7 STK984-090A-E TYPICAL CHARACTERISTICS Figure 7 Heatsink size for PD=10W, 20W and 30W versus ambient temperature Figure 6 Power Dissipation versus Heatsink Size Figure 4 Switching losses versus temperature at 20A Figure 5 Switching losses versus current at 25°C www.onsemi.com 8 STK984-090A-E APPLICATIONS INFORMATION Functional Description Operation in over-temperature conditions Table 2 shows the truth table for the normal operating mode. The truth table shows the U output which is controlled by the HINU and LINU inputs. The truth tables for the V and W outputs follow the same rules. The input signals are active HIGH. The RESET signal is active LOW. Table 4 shows the truth table for over-temperature operating conditions. Input An internal pull-down resistor (100k typical) is connected to each input signal terminal. If an additional external pull-down resistor is used, it is important to ensure the input voltage threshold requirements are still met. Input Output LINU RESET U DIAG1 DIAG2 L L H OFF L L Output OFF L H H L L L Lo Side ON H L H H L L Hi Side ON H H H OFF L L Output OFF X X L OFF H H Output OFF Operation Mode HINU LINU RESET U DIAG1 DIAG2 X X H OFF L H Over Temperature Protection Operating X X L OFF H H Output OFF Table 4: Truth Table Over-temperature Protection Operation in undervoltage conditions Table 5 shows the truth table for low voltage protection operating conditions. Operation Mode HINU Output Input Output Operation Mode HINU LINU RESET U DIAG1 DIAG2 X X H OFF L L Low voltage Protection Operating X X L OFF H H Output OFF Table 5: Truth Table Low Voltage Protection Table 2: Truth Table Normal Operating Mode Operation in over-voltage conditions Table 6 shows the truth table for over-voltage operating conditions. Operation in over-current and short-circuit conditions Table 3 shows the truth table for over-current and short-circuit protection operating conditions for the U output which is controlled by the HINU and LINU inputs. The truth tables for the V and W outputs follow the same rules. Over-current protection is activated only if LINU, LINV and LINW are in the high state. Short-circuit protection is activated only if LINU, LINV and LINW are in the low state. Input Output Operation Mode HINU LINU RESET U DIAG1 DIAG2 X X H OFF L L Over Voltage Protection Operating X X L OFF H H Output OFF Table 6: Truth Table Over-Voltage Protection DIAG Outputs Input Output HINU LINU RESET U DIAG1 DIAG2 L L H OFF L L L H H L H L Terminal DIAG1 and DIAG2 are open drain outputs. A pull-up resistor of 4.7k for a 5V power supply is recommended. Operation Mode Output OFF Over Current Protection Operating ShortCircuit Protection Operating H L H H H L H H H OFF L L Output OFF L/H L/H L OFF H H Output OFF Layout Voltage ringing due to stray inductance, especially in the power source wiring between VB1 and PG, will occur during switching. Use layout techniques such as short traces and wide traces to minimize the inductance of the power loop. Further, a high frequency capacitor needs to be placed very close to the terminals VB1 and PG, in addition to the electrolytic bulk capacitor. Table 3:Truth Table Over-current and Short-circuit Protection Modes System level fuse A system level fuse in the VB1 power line is recommend to ensure a fail-safe design. www.onsemi.com 9 STK984-090A-E Gate Driver Voltage: High-side and low-side The high-side MOSFETs are driven with an internal charge pump. The gate voltage VG from the built-in charge pump circuit is set at VG=VB1+12V. Figure 8: Gate drive voltage variation with battery voltage for high-side MOSFETs The gate drive voltage for the low-side MOSFETs follows the voltage on VB1. If VB1 exceeds 18.5V, the gate drive voltage is limited to 17V. Figure 9: Gate drive voltage versus battery voltage for low-side MOSFETs www.onsemi.com 10 STK984-090A-E RESET input An internal pull-up resistor (100k typical) is connected to the RESET signal. When the RESET pin is HIGH or left open, the IPM operates normally. If the RESET line is LOW, all six gate driver outputs will be set to the OFF state. When the short-circuit protection operates and latches the output OFF, the latched output OFF can be released by setting the RESET input LOW and then HIGH again. Figure 10: Timing diagram for RESET www.onsemi.com 11 STK984-090A-E Short-circuit Protection Circuit The Short-circuit Protection Circuit monitors the drain voltage of the high side MOSFET to detect short circuits. This circuit detects a short circuit when a short circuit current flows for longer than tspoff (typically 3μs). The outputs are switched to the OFF state and the DIAG1 signal is switched HIGH. The IPM is then latched in the short-circuit protection state. This state can be released by setting the RESET input LOW and then HIGH again. Figure 11: Timing Diagram Short-circuit Condition Over-current Protection Circuit The Over-current Protection Circuit monitors the drain voltage of the low-side MOSFETs to detect over currents. This circuit detects a short circuit when a short circuit current flows for longer than tocoff (typically 4.3μs). When a short circuit is detected, the outputs are switched off and the short circuit condition is flagged by switching on DIAG1. The over-current protection state is held for time tINT (typically 1ms) then released. It is not latched like the short-circuit current protection mode. Figure 12: Timing Diagram for Over-current Protection www.onsemi.com 12 STK984-090A-E Undervoltage Lockout Protection Circuit The Undervoltage Lockout Protection Circuit monitors voltages supplied to VB1 pin to detect low voltages. When the voltage on VB1 falls below the undervoltage lockout falling threshold, the outputs will be turned off. The undervoltage lockout circuit has a hysteresis. If the voltage on VB1 rises above the undervoltage lockout rising threshold, the module will return to normal operating mode. Figure 13: Timing Diagram Low Voltage Protection Overvoltage Protection Circuit The Overvoltage Protection Circuit monitors the voltage on VB1. If the voltage on VB1 exceeds the overvoltage protection threshold, the outputs will be switched off. The Overvoltage Protection Circuit has hysteresis. The IPM will return to normal operation when the voltage on VB1 falls below the over-voltage protection falling threshold voltage. Figure 14 Timing Diagram Overvoltage Protection www.onsemi.com 13 STK984-090A-E Over-temperature Protection Circuit The Over-temperature Protection Circuit monitors the circuit substrate temperature to detect excessive temperatures. When the case temperature rises above the temperature shutdown rising threshold, the outputs are switched off and the over temperature condition is flagged on output DIAG2. There is hysteresis in the over-temperature protection circuit. When the case temperature falls below the temperature shutdown falling threshold, the circuit returns to normal operation and the over-temperature condition is no longer flagged on the DIAG2 output. Figure 15: Timing Diagram Over-temperature Protection www.onsemi.com 14 STK984-090A-E Mounting Instructions Item Recommended Conditions Pitch 56.0 ± 0.2mm (Please refer to Package Outline Diagram) Screw Diameter : M3 Screw head types: pan head, truss head, binding head Washer Plane washer dimensions (Figure 16) D = 7mm, d = 3.2mm and t = 0.5mm JIS B 1256 Heat sink Torque Thermal Interface Material: Aluminum or Copper Warpage (the surface that contacts IPM ) : 50 to 100 μm Screw holes for the heat sink must be countersunk. No contamination on the heat sink surface that contacts IPM. Temporary tightening : 20 to 30 % of final tightening on first screw Temporary tightening : 20 to 30 % of final tightening on second screw Final tightening : 0.6 to 0.9Nm on first screw Final tightening : 0.6 to 0.9Nm on second screw Silicone grease is recommended. Thickness : 100 to 200 μm Uniformly apply silicon grease to whole back. Thermal foils are only recommended after careful evaluation. Thickness, stiffness and compressibility parameters have a strong influence on performance. Figure 16: Module Mounting details: components; washer drawing; need for even spreading of thermal grease www.onsemi.com 15 STK984-090A-E Reliability Specification Ta=25C±5C, Relative humidity 65%±20% unless otherwise specified Parameter Mechanical Strength Free-Fall Vibration Fatigue Test Conditions High = 75cm, drop on a woodblock Woodblock : maple 30×30×3cm Conform to JIS C 7021 A-8 Vibration Frequently f = 10HZ to 55HZ Logarithmic Sweep Total Amplitude = 1.5+0.2mm Evaluation Time Drop Time = 3 times X, Y, Z Each direction 2hr Evaluation Method Electrical Characteristics Test Time N=5 Electrical Characteristics N = 11 Visual Inspection Environmental Test Electrical Characteristics Thermal Shock (Vapor Tank) Ta = 40C125C (30min. each) Elapsed time after the test =2hr 1000 Cycles Visual Inspection N = 11 Solder Junction Ta = 121C, RH=100%, 2 air pressure 48hr Electrical Characteristics N = 11 High-Temperature Storage Ta = 125C Elapsed time after the test = 3hr Conform to JIS C 7201 B-10 1000hr Electrical Characteristics N = 11 Low-Temperature Storage Ta = 40C Elapsed time after the test=3hr Conform to JIS C 7021 B-12 1000hr Electrical Characteristics N = 11 High Temperature High Humidity Bias Ta = 85C±2C, RH = 85%±5% VB1, VB2 = 70% of Maximum Rating 1000hr Electrical Characteristics N = 11 Pressure Cooker Life Test Table 7: Reliability Specification www.onsemi.com 16 STK984-090A-E Test Circuits ■ VDS(sat) measurement (Pulse Measurement) Pin No Measured Phase M N m M 1,21 U V W UN VN WN 21 13 4 21 15 5 21 17 6 13 19 7 15 19 8 17 19 9 13.5V 2,19 5.0V Io Pulse V m VDSsat 10 11 N Figure 17 VDS Measurement Circuit ■ ICC Measurement 16.0V 1,21 A 2,19 Figure 18 ICC Measurement Circuit ■ ISD Measurement Io Pin No Measured Phase M N m Short-Circuit Threshold U V W 19 19 19 13 15 17 4 5 6 Overcurrent Threshold UN VN WN 13 15 17 21 21 21 7 8 9 1 21 A 13.5V 13.5V 2 19 5.0V 10 M 11 N Input Signal m Figure 19 ISD Measurement Circuit www.onsemi.com 17 STK984-090A-E ■ Measurement of rise, fall and delay times Pin No Measured Phase M N m Io U 19 13 4 V 19 15 5 W 19 17 6 UN 13 21 7 VN 15 21 8 WN 17 21 9 A 21 1 13.5V 13.5V 2 19 5.0V M 10 11 N Input Signal m Figure 20 Switch Time Measurement Circuit Input Signal Waveform Output Current Waveform 90% 90% 10% 10% tf tr td(on) td(off) Figure 21 Switch Time Definitions www.onsemi.com 18 STK984-090A-E PACKAGE DIMENSIONS unit : mm 56.0 ±0.2 3.4 -0.4 +0.2 note2 note3 R 1. 7 15.6 (24) 26.7 STK984-090A 23 1 0.5 ±0.1 note1 0.75 ±0.1 22×2.0=44.0 2.6 6.8 ±0.2 6.0 ±0.2 2.0 2.0 ±0.1 (Root) (50.0) +0.2 59.8 -0.4 note1 : Mark of mirror surface for No.1 pin identification. note2 : The form of a character in this drawing differs from that of IPM. note3 : This indicates the lot code. The form of a character in this drawing differs from that of IPM. ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without further notice to any products herein. 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