STK5Q4U362J-E Advance Information 10A/600V Integrated Power Module in Compact DIP package The STK5Q4U362J-E is a fully-integrated inverter power stage consisting of a high-voltage driver, six IGBT’s and a thermistor, suitable for driving permanent magnet synchronous (PMSM) motors, brushlessDC (BLDC) motors and AC asynchronous motors. The IGBT’s are configured in a 3-phase bridge with separate emitter connections for the lower legs for maximum flexibility in the choice of control algorithm. The power stage has a full range of protection functions including crossconduction protection, external shutdown and under-voltage lockout functions. An internal comparator and reference connected to the overcurrent protection circuit allows the designer to set the over-current protection level. www.onsemi.com PACKAGE PICTURE Features Three-phase 10A/600V IGBT module with integrated drivers Typical values : VCE(SAT) = 1.8V, VF = 1.5V, ESW = 390J at 10A Compact 29.6mm 18.2mm dual in-line package Cross-conduction protection Adjustable over-current protection level Integrated bootstrap diodes and resistors Enable pin Thermistor MODULE SPCM24 29.6x18.2 DIP S3 MARKING DIAGRAM Typical Applications Industrial Pumps Industrial Fans Industrial Automation Home Appliances STK5Q4U362J = Specific Device Code A = Year B = Month C = Production Site DD = Factory Lot Code Device marking is on package underside ORDERING INFORMATION Device STK5Q4U362J-E Package Shipping (Qty / Packing) MODULE SPCM24 29.6x18.2 DIP S3 (Pb-Free) 16 / Tube Figure 1. Functional Diagram This document contains information on a new product. Specifications and information herein are subject to change without notice. © Semiconductor Components Industries, LLC, 2016 March 2016- Rev. P2 1 Publication Order Number: STK5Q4U362J-E/D STK5Q4U362J-E STK5Q4U362J-E Figure 2. Application Schematic www.onsemi.com 2 STK5Q4U362J-E Figure 3. Simplified Block Diagram www.onsemi.com 3 STK5Q4U362J-E PIN FUNCTION DESCRIPTION Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 17 18 19 20 22 26 28 32 34 38 Name GND VDD HINU HINV HINW LINU LINV LINW FAULT ITRIP ENABLE RCIN TH1 TH2 NU NV NW W VBW V VBV U VBU VP Description Negative Main Supply +15V Main Supply Logic Input High Side Gate Driver - Phase U Logic Input High Side Gate Driver - Phase V Logic Input High Side Gate Driver - Phase W Logic Input Low Side Gate Driver - Phase U Logic Input Low Side Gate Driver - Phase V Logic Input Low Side Gate Driver - Phase W Fault output Current protection pin Enable input R,C connection terminal for setting FAULT clear time Thermistor output 1 Thermistor output 2 Low Side Emitter Connection - Phase U Low Side Emitter Connection - Phase V Low Side Emitter Connection - Phase W W phase output. Internally connected to W phase high side driver ground High Side Floating Supply Voltage for W phase V phase output. Internally connected to V phase high side driver ground High Side Floating Supply voltage for V phase U phase output. Internally connected to U phase high side driver ground High Side Floating Supply voltage for U phase Positive Bus Input Voltage Note: Pins 15, 16, 21, 23, 24, 25, 27, 29, 30, 31, 33, 35, 36, 37 are not present www.onsemi.com 4 STK5Q4U362J-E ABSOLUTE MAXIMUM RATINGS (Notes 1,2) Rating Symbol Conditions Value Unit 450 V 600 V ±10 A ±5 A ±20 A 0.3 to +20.0 V HINU, HINV, HINW, LINU, LINV, LINW 0.3 to VDD V VFAULT FAULT terminal 0.3 to VDD V RCIN terminal voltage VRCIN RCIN terminal 0.3 to VDD V ITRIP terminal voltage VITRIP ITRIP terminal 0.3 to +10.0 V 0.3 to VDD V Supply voltage VCC VP to NU, NV, NW, surge < 500V Collector-emitter voltage VCE max VP to U, V, W ; U to NU ; V to NV ; W to NW VP, U, V, W, NU, NV, NW terminal current Output current Io Output peak current Iop Gate driver supply voltages VDD,VBS Input signal voltage VIN FAULT terminal voltage (Note 3) VP, U, V, W, NU, NV, NW terminal current, Tc=100C VP, U, V, W, NU, NV, NW terminal current, pulse width 1ms VBU to U, VBV to V, VBW to W, VDD to GND (Note 4) ENABLE terminal voltage VENABLE ENABLE terminal Maximum power dissipation Pd IGBT per 1 channel 31 W Junction temperature Tj IGBT, Gate driver IC 150 C Storage temperature Tstg 40 to +125 C Operating case temperature Tc IPM case temperature 20 to +100 C Case mounting screw 0.6 Nm 2000 Vrms Package mounting torque Isolation voltage 1. 2. 3. 4. 5. Vis 50Hz sine wave AC 1 minute (Note 5) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. This surge voltage developed by the switching operation due to the wiring inductance between VP and NU,NV,NW terminals. VBS=VBU to U, VBV to V, VBW to W. Test conditions : AC2500V, 1 s RECOMMENDED OPERATING RANGES (Note 6) Rating Symbol Min Typ Max Unit 0 280 400 V VBU to U, VBV to V, VBW to W 12.5 15 17.5 VDD to GND (Note 4) 13.5 15 16.5 HINU, HINV, HINW, LINU, LINV, LINW 3.0 5.0 VIN(OFF) 0 0.3 PWM frequency fPWM 1 20 Dead time DT Turn-off to turn-on (external) Allowable input pulse width PWIN ON and OFF VCC VP to NU, NV, NW VBS VDD ON-state input voltage VIN(ON) OFF-state input voltage Supply voltage Gate driver supply voltage Package mounting torque 6. 1 0.4 5 kHz μs 0.6 Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com V μs 1 ‘M3’ type screw V Nm STK5Q4U362J-E ELECTRICAL CHARACTERISTICS at Tc=25C, VBS=15V,VDD=15V Parameter Test Conditions Symbol Min Typ Max Unit - - 100 μA 1.9 2.7 V 1.6 - V 1.5 2.2 V Power output section Collector-emitter leakage current Collector to emitter saturation voltage Diode forward voltage Junction to case thermal resistance Switching time VCE=600V ICE Ic=10A, Tj=25C VCE(SAT) Ic=5A, Tj=100C VF IF=10A, Tj=25C 1.2 - V IGBT θj-c(T) - - 4 C/W Freewheeling Diode θj-c(T) - - 5.5 C/W tON - 0.6 1.3 μs tOFF - 1.0 1.6 EON - 300 - μJ IF=5A, Tj=100C Ic=10A, VCC=300V, Tj=25C Turn-on switching loss Turn-off switching loss Ic=10A, VCC=300V, Tj=25C EOFF - 90 - μJ Total switching loss ETOT - 390 - μJ Turn-on switching loss EON - 360 - μJ EOFF - 110 - μJ ETOT - 470 - μJ EREC - 60 - μJ - ns Turn-off switching loss Ic=10A, VCC=300V, Tj=25C Total switching loss Diode reverse recovery energy Diode reverse recovery time Ic=10A, VCC=300V, Tj=25C (di/dt set by internal driver) trr - 160 - Reverse bias safe operating area Ic=20A, VCE=450V RBSOA Full Square Short circuit safe operating area VCE=400V SCSOA 4 - - μs Allowable offset voltage slew rate U to NU, V to NV, W to NW dv/dt 50 - 50 V/ns VBS=15V (Note 4), per driver ID - 0.07 0.4 mA VDD=15V, total ID - 0.95 3 mA Vin H 2.5 - - V Low level Input voltage HINU, HINV, HINW, LINU, LINV, LINW to GND Vin L - - 0.8 V Logic 1 input current VIN=+3.3V IIN+ - 660 900 μA Logic 0 input current VIN=0V IIN- - - 3 μA Bootstrap ON Resistance IB=1mA RB - 110 - Ω FAULT terminal sink current FAULT : ON / VFAULT=0.1V IoSD - 2 - mA FAULT clearance delay time RCLR=2MΩ, CCLR=1nF FLTCLR 1.1 1.65 2.2 ms VEN ON-state voltage VEN(ON) 2.5 - - V VEN OFF-state voltage VEN(OFF) - - 0.8 V ITRIP to GND VITRIP 0.44 0.49 0.54 V - 1.1 - μs 250 350 - ns Driver Section Gate driver consumption current High level Input voltage ENABLE ON/OFF voltage ITRIP threshold voltage ITRIP to shutdown propagation delay tITRIP ITRIP blanking time tITRIPBL VDD and VBS supply undervoltage VDDUV+ 10.2 11.1 11.8 V VBSUV+ positive going input threshold VDD and VBS supply undervoltage VDDUV10.0 10.9 11.6 V VBSUVnegative going input threshold VDD and VBS supply undervoltage Ilockout VDDUVH 0.2 V VBSUVH hysteresis 7. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 6 STK5Q4U362J-E TYPICAL CHARACTERISTICS 20 20 15 15 TJ = 100C 10 IF [A] Ic [A] TJ = 25C 5 10 5 TJ = 100C 0 TJ = 25C 0 0 1 2 3 0 1 2 VCE [V] Figure 4 VF versus ID for different temperatures Figure 5 VCE versus ID for different temperatures (VDD=15V) 800 250 200 600 400 TJ = 100C 150 Eoff [μJ] Eon [μJ] TJ = 100C TJ = 25C 200 100 TJ = 25C 50 0 0 0 2 4 6 8 10 12 Ic [A] 14 16 18 20 0 1.0 0.8 0.8 Standardized Rth [C/W] 1.0 0.6 0.4 0.2 0.0 0.0001 0.01 1 2 4 6 8 10 12 Ic [A] 14 16 18 20 Figure 6 EOFF versus ID for different temperatures Figure 7 EON versus ID for different temperatures Standardized Rth [C/W] 3 VF [V] 100 0.6 0.4 0.2 0.0 0.0001 0.01 1 100 PT [s] PT [s] Figure 8 Thermal impedance plot (IGBT) Figure 9 Thermal impedance plot (FRD) X:100ns/div X:100ns/div Vce: 100V/div Io:5A/div Io:5A/div Vce: 100V/div Figure 10 Turn-on waveform Tj=100C, VCC=400V Figure 11 Turn-off waveform Tj=100C, VCC=400V www.onsemi.com 7 STK5Q4U362J-E APPLICATIONS INFORMATION Input / Output Timing Chart Figure 12. Input/Output Timing Chart Notes 1. This section of the timing diagram shows the effect of cross-conduction prevention. 2. This section of the timing diagram shows that when the voltage on VDD decreases sufficiently all gate output signals will go low, switching off all six IGBTs. When the voltage on VDD rises sufficiently, normal operation will resume. 3. This section shows that when the bootstrap voltage VBS drops, the corresponding high side output (U or V or W) is switched off. When VBS rises sufficiently, normal operation will resume. 4. This section shows that when the voltage on ITRIP exceeds the threshold, all IGBT’s are turned off. Normal operation resumes later after the over-current condition is removed. 5. After VDD has risen above the threshold to enable normal operation, the driver waits to receive an input signal on the LIN input before enabling the driver for the HIN signal. Input / Output Logic Table INPUT OUTPUT HIN LIN Itrip Enable High side IGBT Low side IGBT U,V,W FAULT H L L H ON (Note 5) OFF VP OFF L H L H OFF ON NU,NV,NW OFF L L L H OFF OFF High Impedance OFF H H L H OFF OFF High Impedance OFF X X H H OFF OFF High Impedance ON X X X L OFF OFF High Impedance OFF www.onsemi.com 8 STK5Q4U362J-E Thermistor characteristics Parameter Resistance B-Constant (25 to 50℃) Symbol Condition Min Typ Max Unit R25 Tc=25℃ 99 100 101 kΩ R100 Tc=100℃ B 5.18 5.38 5.60 kΩ 4208 4250 4293 K +125 ℃ 40 Temperature Range Figure 10 Thermistor resistance versus case temperature Figure 11 Voltage on circuit connected to thermistor (RTH=39k, pull-up voltage 5V, see Figure 2) Figure 9 Thermistor Resistance versus Case Temperature Case Temperature (Tc) TH to GND voltage characteristic Figure 12 Thermistor Voltage versus Case Temperature Conditions: RTH=39kΩ, pull-up voltage 5.0V (see Figure 2) www.onsemi.com 9 STK5Q4U362J-E Fault output Calculation of bootstrap capacitor value The FAULT output is an open drain output requiring a pull-up resistor. If the pull-up voltage is 5V, use a pullup resistor with a value of 6.8kΩ or higher. If the pullup voltage is 15V, use a pull-up resistor with a value of 20kΩ or higher. The FAULT output is triggered if there is a VDD undervoltage or an overcurrent condition. The bootstrap capacitor value CB is calculated using the following approach. The following parameters influence the choice of bootstrap capacitor: Undervoltage lockout protection If VDD goes below the VDD supply undervoltage lockout falling threshold, the FAULT output is switched on. The FAULT output stays on until VDD rises above the VDD supply undervoltage lockout rising threshold. After VDD has risen above the threshold to enable normal operation, the driver waits to receive an input signal on the LIN input before enabling the driver for the HIN signal. VBS: Bootstrap power supply. 15V is recommended. QG: Total gate charge of IGBT at VBS=15V. 45nC UVLO: Falling threshold for UVLO. Specified as 12V. IDMAX: High side drive consumption current.. Specified as 0.4mA tONMAX: Maximum ON pulse width of high side IGBT. Capacitance calculation formula: CB = (QG + IDMAX * tONMAX)/(VBS - UVLO) Overcurrent protection An over-current condition is detected if the voltage on the ITRIP pin is larger than the reference voltage. There is a blanking time of typically 350ns to improve noise immunity. After a shutdown propagation delay of typically 1.1 us, the FAULT output is switched on. The FAULT output is held on for a time determined by the resistor and capacitor connected to the RCIN pin. If RCLR=2MΩ and CCLR=1nF, the FAULT output is switched on for 1.65ms (typical). CB is recommended to be approximately 3 times the value calculated above. The recommended value of CB is in the range of 1 to 47μF, however, the value needs to be verified prior to production. When not using the bootstrap circuit, each high side driver power supply requires an external independent power supply. The internal bootstrap circuit uses a MOSFET. The turn on time of this MOSFET is synchronized with the turn on of the low side IGBT. The bootstrap capacitor is charged by turning on the low side IGBT. The over-current protection threshold should be set to be equal or lower to 2 times the module rated current (IO). If the low side IGBT is held on for a long period of time (more than one second for example), the bootstrap voltage on the high side MOSFET will slowly discharge. An additional fuse is recommended to protect against system level or abnormal over-current fault conditions. Capacitors on High Voltage and VDD supplies Bootstrap capacitance µF Both the high voltage and VDD supplies require an electrolytic capacitor and an additional high frequency capacitor. Enable pin The ENABLE terminal pin is used to enable or shut down the built-in driver. If the voltage on the ENABLE pin rises above the ENABLE ON-state voltage the output drivers are enabled. If the voltage on the ENABLE pin falls below the ENABLE OFF-state voltage, the drivers are disabled. 100 10 1 0.1 0.01 0.1 1 10 tONMAX [ms] 100 1000 Figure 13: Bootstrap capacitance versus tONMAX Minimum input pulse width When input pulse width is less than 1μs, an output may not react to the pulse. (Both ON signal and OFF signal) www.onsemi.com 10 STK5Q4U362J-E Mounting Instructions Item Recommended Condition Pitch 26.0±0.1mm (Please refer to Package Outline Diagram) Screw Diameter : M3 Screw head types: pan head, truss head, binding head Washer Plane washer dimensions (Figure 14) D = 7mm, d = 3.2mm and t = 0.5mm JIS B 1256 Heat sink Torque Grease Material: Aluminum or Copper Warpage (the surface that contacts IPM ) : 50 to 50 μm Screw holes must be countersunk. No contamination on the heat sink surface that contacts IPM. Temporary tightening : 50 to 60 % of final tightening on first screw Temporary tightening : 50 to 60 % of final tightening on second screw Final tightening : 0.4 to 0.6Nm on first screw Final tightening : 0.4 to 0.6Nm on second screw Silicone grease. Thickness : 50 to 100 μm Uniformly apply silicon grease to whole back. Thermal foils are only recommended after careful evaluation. Thickness, stiffness and compressibility parameters have a strong influence on performance. Figure 14: Module Mounting details: components; washer drawing; need for even spreading of thermal grease www.onsemi.com 11 STK5Q4U362J-E TEST CIRCUITS ■ ICE ICE U+ V+ W+ U- V- W- M 38 38 38 32 26 20 N 32 26 20 17 18 19 VBS=15V VBS=15V U+,V+,W+ : High side phase U-,V-,W- : Low side phase 34 A M 32 28 26 VCE 22 VBS=15V VDD=15V 20 2 1 N Figure 15 Test Circuit for ICE ■ VCE(sat) (Test by pulse) VBS=15V 34 32 U+ V+ W+ U- V- W- M 38 38 38 32 26 20 26 N 32 26 20 17 18 19 22 m 3 4 5 6 7 8 VBS=15V M V VBS=15V VDD=15V 5V VCE(sat) 20 2 m N 1,10,N Figure 16 Test circuit for VCE(SAT) ■ VF (Test by pulse) U+ V+ W+ U- V- W- M 38 38 38 32 26 20 N 32 26 20 17 18 19 Figure 17 Test circuit for VF www.onsemi.com 12 Ic STK5Q4U362J-E M ■ RB (Test by pulse) U+ V+ W+ M 2 2 2 N 34 28 22 6 5V 7 V 8 VB (RB) IB 2 VDD=15V N 1,3,4,5,10 Figure 18 Test circuit for RB ID ■ ID A VBS U+ VBS V+ VBS W+ VDD M 34 28 22 2 N 32 26 20 1 M VD N Figure 19 Test circuit for ID ■ Switching time (The circuit is a representative example of the low side U phase.) Input signal (0 to5V) VBS=15V VBS=15V 90% 34 38 32 28 26 32 22 VBS=15V Io 10% tON VDD=15V Input signal tOFF Vcc CS 20 Ic 2 6 17 1,10 Figure 20 Switching time test circuit www.onsemi.com 13 STK5Q4U362J-E PACKAGE DIMENSIONS unit : mm www.onsemi.com 14 STK5Q4U362J-E ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without further notice to any products herein. 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