TLV431A, TLV431B, TLV431C, SCV431B, NCV431 Low Voltage Precision Adjustable Shunt Regulator The TLV431A, B and C series are precision low voltage shunt regulators that are programmable over a wide voltage range of 1.24 V to 16 V. The TLV431A series features a guaranteed reference accuracy of ±1.0% at 25°C and ±2.0% over the entire industrial temperature range of −40°C to 85°C. The TLV431B series features higher reference accuracy of ±0.5% and ±1.0% respectively. For the TLV431C series, the accuracy is even higher. It is ±0.2% and ±1.0% respectively. These devices exhibit a sharp low current turn−on characteristic with a low dynamic impedance of 0.20 W over an operating current range of 100 mA to 20 mA. This combination of features makes this series an excellent replacement for zener diodes in numerous applications circuits that require a precise reference voltage. When combined with an optocoupler, the TLV431A/B/C can be used as an error amplifier for controlling the feedback loop in isolated low output voltage (3.0 V to 3.3 V) switching power supplies. These devices are available in economical TO−92−3 and micro size TSOP−5 and SOT−23−3 packages. www.onsemi.com TO−92 LP SUFFIX CASE 29 3 STRAIGHT LEAD BULK PACK 1 • Programmable Output Voltage Range of 1.24 V to 16 V • Voltage Reference Tolerance ±1.0% for A Series, ±0.5% for B Series • • • • • • Applications • Low Output Voltage (3.0 V to 3.3 V) Switching Power Supply • • • • • Error Amplifier Adjustable Voltage or Current Linear and Switching Power Supplies Voltage Monitoring Current Source and Sink Circuits Analog and Digital Circuits Requiring Precision References Low Voltage Zener Diode Replacements 2 3 BENT LEAD TAPE & REEL AMMO PACK 4 5 Features and ±0.2% for C Series Sharp Low Current Turn−On Characteristic Low Dynamic Output Impedance of 0.20 W from 100 mA to 20 mA Wide Operating Current Range of 50 mA to 20 mA Micro Miniature TSOP−5, SOT−23−3 and TO−92−3 Packages These are Pb−Free and Halide−Free Devices SCV and NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable 1 12 2 3 TSOP−5 SN SUFFIX CASE 483 3 SOT−23−3 SN1 SUFFIX CASE 318 1 2 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet. DEVICE MARKING INFORMATION AND PIN CONNECTIONS See general marking information in the device marking section on page 13 of this data sheet. Cathode (K) Reference (R) + 1.24 Vref Anode (A) Figure 1. Representative Block Diagram © Semiconductor Components Industries, LLC, 2016 February, 2016 − Rev. 21 1 Publication Order Number: TLV431A/D TLV431A, TLV431B, TLV431C, SCV431B, NCV431 Cathode (K) Reference (R) Cathode (K) Reference (R) Anode (A) Device Symbol Anode (A) The device contains 13 active transistors. Figure 2. Representative Device Symbol and Schematic Diagram MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted) Symbol Value Unit VKA 18 V Cathode Current Range, Continuous IK −20 to 25 mA Reference Input Current Range, Continuous Iref *0.05 to 10 Rating Cathode to Anode Voltage Operating Junction Temperature Operating Ambient Temperature Range mA °C/W Thermal Characteristics LP Suffix Package, TO−92−3 Package Thermal Resistance, Junction−to−Ambient Thermal Resistance, Junction−to−Case SN Suffix Package, TSOP−5 Package Thermal Resistance, Junction−to−Ambient SN1 Suffix Package, SOT−23−3 Package Thermal Resistance, Junction−to−Ambient TLV431x NCV431, SCV431B Storage Temperature Range RqJA RqJC 178 83 RqJA 226 RqJA 491 TJ 150 °C TA *40 to 85 *40 to 125 °C Tstg *65 to 150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per JEDEC JESD22−A114F, Machine Model Method 200 V per JEDEC JESD22−A115C, Charged Device Method 1000 V per JEDEC JESD22−C101E. This device contains latch−up protection and exceeds ±100 mA per JEDEC standard JESD78. T P D + *T J(max) A R qJA RECOMMENDED OPERATING CONDITIONS Condition Cathode to Anode Voltage Cathode Current Symbol Min Max Unit VKA Vref 16 V IK 0.1 20 mA Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) TLV431A Characteristic Symbol Reference Voltage (Figure 3) (VKA = Vref, IK = 10 mA, TA = 25°C) (TA = Tlow to Thigh, Note 1) TLV431B Min Typ Max Min Typ Max 1.228 1.215 1.240 − 1.252 1.265 1.234 1.228 1.240 − 1.246 1.252 − 7.2 20 − 7.2 20 − −0.6 −1.5 − −0.6 −1.5 − 0.15 0.3 − 0.15 0.3 − 0.04 0.08 − 0.04 0.08 − 30 80 − 30 80 − − 0.01 0.012 0.04 0.05 − − 0.01 0.012 0.04 0.05 − 0.25 0.4 − 0.25 0.4 Vref Reference Input Voltage Deviation Over Temperature (Figure 3) (VKA = Vref, IK= 10 mA, TA = Tlow to Thigh, Notes 1, 2, 3) DVref Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4) (VKA = Vref to 16 V, IK= 10 mA) DV ref DV KA Reference Terminal Current (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open) V mV DIref Minimum Cathode Current for Regulation (Figure 3) IK(min) Off−State Cathode Current (Figure 5) (VKA = 6.0 V, Vref = 0) (VKA = 16 V, Vref = 0) IK(off) Dynamic Impedance (Figure 3) (VKA = Vref, IK =0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 4) |ZKA| mV V mA Iref Reference Input Current Deviation Over Temperature (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open, Notes 1, 2, 3) Unit mA mA mA W 1. Ambient temperature range: Tlow = *40°C, Thigh = 85°C. 2. Guaranteed but not tested. 3. The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the full operating ambient temperature range that applied. Vref Max DVref = Vref Max − Vref Min DTA = T2 − T1 Vref Min T1 Ambient Temperature T2 The average temperature coefficient of the reference input voltage, aVref is defined as: αV ref ǒ Ǔ ppm + °C ǒ (DV ) ref V (T + 25°C) ref A 10 6 Ǔ DT A aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8. Example: DVref = 7.2 mV and the slope is positive, Example: Vref @ 25°C = 1.241 V Example: DTA = 125°C 0.0072 ppm + 1.241 αV ref °C 125 ǒ Ǔ 10 6 + 46 ppmń°C 4. The dynamic impedance ZKA is defined as: ⏐Z DV KA ⏐+ KA DI K When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by: ⏐ZKA′⏐ + ⏐ZKA⏐ ǒ1 ) R1 Ǔ R2 www.onsemi.com 3 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) TLV431C Symbol Characteristic Reference Voltage (Figure 3) (VKA = Vref, IK = 10 mA, TA = 25°C) (TA = Tlow to Thigh, Note 5) Min Typ Max 1.237 1.228 1.240 − 1.243 1.252 − 7.2 2.0 − −0.6 −1.5 − 0.15 0.3 − 0.04 0.08 − 30 80 − − 0.01 0.012 0.04 0.05 − 0.25 0.4 Vref Reference Input Voltage Deviation Over Temperature (Figure 3) (VKA = Vref, IK = 10 mA, TA = Tlow to Thigh, Notes 5, 6, 7) DVref Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4) (VKA = Vref to 16 V, IK = 10 mA) DV ref DV KA Reference Terminal Current (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open) V mV DIref Minimum Cathode Current for Regulation (Figure 3) IK(min) Off−State Cathode Current (Figure 5) (VKA = 6.0 V, Vref = 0) (VKA = 16 V, Vref = 0) IK(off) Dynamic Impedance (Figure 3) (VKA = Vref, IK = 0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 8) |ZKA| mV V mA Iref Reference Input Current Deviation Over Temperature (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open, Notes 5, 6, 7) Unit mA mA mA W 5. Ambient temperature range: Tlow = *40°C, Thigh = 85°C. 6. Guaranteed but not tested. 7. The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the full operating ambient temperature range that applied. Vref Max DVref = Vref Max − Vref Min DTA = T2 − T1 Vref Min T1 Ambient Temperature T2 The average temperature coefficient of the reference input voltage, aVref is defined as: αV ref ǒ Ǔ ppm + °C ǒ (DV ) ref V (T + 25°C) ref A 10 6 Ǔ DT A aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8. Example: DVref = 7.2 mV and the slope is positive, Example: Vref @ 25°C = 1.241 V Example: DTA = 125°C 0.0072 ppm + 1.241 αV ref °C 125 ǒ Ǔ 10 6 + 46 ppmń°C 8. The dynamic impedance ZKA is defined as: ⏐Z DV KA ⏐+ KA DI K When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by: ⏐ZKA′⏐ + ⏐ZKA⏐ ǒ1 ) R1 Ǔ R2 www.onsemi.com 4 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) NCV431A Characteristic Symbol Reference Voltage (Figure 3) (VKA = Vref, IK = 10 mA, TA = 25°C) (TA = *40°C to 85°C) (TA = *40°C to 125°C) Min Typ Max 1.228 1.215 1.211 1.240 − − 1.252 1.265 1.265 − − 7.2 7.2 20 24 − −0.6 −1.5 − 0.15 0.3 − − 0.04 − 0.08 0.10 − 30 80 − − 0.01 0.012 0.04 0.05 − 0.25 0.4 Vref Reference Input Voltage Deviation Over Temperature (Figure 3) (VKA = Vref, IK= 10 mA, TA = *40°C to 85°C, Notes 9, 10) (VKA = Vref, IK= 10 mA, TA = *40°C to 125°C, Notes 9, 10) DVref Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4) (VKA = Vref to 16 V, IK= 10 mA) DV ref DV KA Reference Terminal Current (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open) V mV DIref Minimum Cathode Current for Regulation (Figure 3) IK(min) Off−State Cathode Current (Figure 5) (VKA = 6.0 V, Vref = 0) (VKA = 16 V, Vref = 0) IK(off) Dynamic Impedance (Figure 3) (VKA = Vref, IK =0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 11) |ZKA| mV V mA Iref Reference Input Current Deviation Over Temperature (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 85°C, Notes 9, 10) (IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 125°C, Notes 9, 10) Unit mA mA mA W 9. Guaranteed but not tested. 10. The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the full operating ambient temperature range that applied. Vref Max DVref = Vref Max − Vref Min DTA = T2 − T1 Vref Min T1 Ambient Temperature T2 The average temperature coefficient of the reference input voltage, aVref is defined as: αV ref ǒppm Ǔ+ °C ǒ (DV ) ref V (T + 25°C) ref A 10 6 Ǔ DT A aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8. Example: DVref = 7.2 mV and the slope is positive, Example: Vref @ 25°C = 1.241 V Example: DTA = 125°C 0.0072 αV ref ǒppm Ǔ + 1.241 °C 125 10 6 + 46 ppmń°C 11. The dynamic impedance ZKA is defined as: ⏐Z DV KA ⏐+ KA DI K When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by: ⏐ZKA′⏐ + ⏐ZKA⏐ ǒ1 ) R1 Ǔ R2 www.onsemi.com 5 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) SCV431B, NCV431B Characteristic Symbol Reference Voltage (Figure 3) (VKA = Vref, IK = 10 mA, TA = 25°C) (TA = *40°C to 85°C) (TA = *40°C to 125°C) Min Typ Max 1.234 1.228 1.224 1.240 − − 1.246 1.252 1.252 − − 7.2 7.2 20 24 − −0.6 −1.5 − 0.15 0.3 − − 0.04 − 0.08 0.10 − 30 80 − − 0.01 0.012 0.04 0.05 − 0.25 0.4 Vref Reference Input Voltage Deviation Over Temperature (Figure 3) (VKA = Vref, IK= 10 mA, TA = *40°C to 85°C, Notes 9, 10) (VKA = Vref, IK= 10 mA, TA = *40°C to 125°C, Notes 9, 10) DVref Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4) (VKA = Vref to 16 V, IK= 10 mA) DV ref DV KA Reference Terminal Current (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open) V mV DIref Minimum Cathode Current for Regulation (Figure 3) IK(min) Off−State Cathode Current (Figure 5) (VKA = 6.0 V, Vref = 0) (VKA = 16 V, Vref = 0) IK(off) Dynamic Impedance (Figure 3) (VKA = Vref, IK =0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 14) |ZKA| mV V mA Iref Reference Input Current Deviation Over Temperature (Figure 4) (IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 85°C, Notes 12, 13) (IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 125°C, Notes 12, 13) Unit mA mA mA W 12. Guaranteed but not tested. 13. The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the full operating ambient temperature range that applied. Vref Max DVref = Vref Max − Vref Min DTA = T2 − T1 Vref Min T1 Ambient Temperature T2 The average temperature coefficient of the reference input voltage, aVref is defined as: αV ref ǒppm Ǔ+ °C ǒ (DV ) ref V (T + 25°C) ref A 10 6 Ǔ DT A aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8. Example: DVref = 7.2 mV and the slope is positive, Example: Vref @ 25°C = 1.241 V Example: DTA = 125°C 0.0072 αV ref ǒppm Ǔ + 1.241 °C 125 14. The dynamic impedance ZKA is defined as: ⏐Z 10 6 + 46 ppmń°C DV KA ⏐+ KA DI K When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by: ⏐ZKA′⏐ + ⏐ZKA⏐ ǒ1 ) R1 Ǔ R2 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 6 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 Input VKA Input VKA IK Vref Figure 3. Test Circuit for VKA = Vref R1 Iref R2 Vref V VKA KA IK(off) +V ǒ Ǔ 1 ) R1 ) I SR1 ref R2 ref Figure 4. Test Circuit for VKA u Vref Figure 5. Test Circuit for IK(off) 110 30 Input Input 20 IK I K , CATHODE CURRENT (m A) 90 I K , CATHODE CURRENT (mA) Input IK VKA VKA = Vref TA = 25°C 10 0 VKA IK 70 IK(min) VKA = Vref TA = 25°C 50 30 10 −10 −10 −1.0 −30 −0.5 0 0.5 1.0 VKA, CATHODE VOLTAGE (V) 1.5 2.0 0 Figure 6. Cathode Current vs. Cathode Voltage Vref(typ) 1.24 Input VKA = Vref IK = 10 mA VKA IK Vref(min) TLV431A Typ. −15 10 35 60 TA, AMBIENT TEMPERATURE (°C) I ref , REFERENCE INPUT CURRENT (m A) Vref , REFERENCE INPUT VOLTAGE (V) 1.2 1.4 0.15 Vref(max) 1.22 −40 0.4 0.6 0.8 1.0 VKA, CATHODE VOLTAGE (V) Figure 7. Cathode Current vs. Cathode Voltage 1.25 1.23 0.2 Input 10 k 0.14 Iref IK = 10 mA 0.13 0.12 −40 85 VKA IK Figure 8. Reference Input Voltage versus Ambient Temperature −15 10 35 60 TA, AMBIENT TEMPERATURE (°C) Figure 9. Reference Input Current versus Ambient Temperature www.onsemi.com 7 85 4.0 0 IK = 10 mA TA = 25°C −2.0 I K(off) , CATHODE CURRENT ( mA) DVref , REFERENCE INPUT VOLTAGE CHANGE (mV) TLV431A, TLV431B, TLV431C, SCV431B, NCV431 −4.0 Input VKA −6.0 IK R1 R2 −8.0 Vref −10 Input 3.0 2.0 1.0 TA = 25°C 0 0 4.0 8.0 12 VKA, CATHODE VOLTAGE (V) 16 0 4.0 Figure 10. Reference Input Voltage Change versus Cathode Voltage 20 10 Output Input 0.3 |Za|, DYNAMIC IMPEDANCE (OHM) Ioff , OFF-STATE CATHODE CURRENT ( m A) 16 8.0 12 VKA, CATHODE VOLTAGE (V) Figure 11. Off−State Cathode Current versus Cathode Voltage 0.4 VKA VKA = 16 V Vref = 0 V Ioff 0.2 0.1 0 −40 IK 50 − + 1.0 IK = 0.1 mA to 20 mA TA = 25°C 0.1 −15 10 35 60 TA, AMBIENT TEMPERATURE (°C) 85 1.0 k Figure 12. Off−State Cathode Current versus Ambient Temperature Output 0.23 10 M Output IK − + 0.21 0.20 0.19 −40 100 k 1.0 M f, FREQUENCY (Hz) 60 IK = 0.1 mA to 20 mA f = 1.0 kHz 50 0.22 10 k Figure 13. Dynamic Impedance versus Frequency A vol , OPEN LOOP VOLTAGE GAIN (dB) 0.24 |Za|, DYNAMIC IMPEDANCE (OHM) VKA Ioff VKA = 16 V Vref = 0 V 15 k 50 IK 9 mF 40 230 − 8.25 k + 30 IK = 10 mA TA = 25°C 20 10 0 −15 10 35 60 TA, AMBIENT TEMPERATURE (°C) 100 85 Figure 14. Dynamic Impedance versus Ambient Temperature 1.0 k 10 k 100 k f, FREQUENCY (Hz) Figure 15. Open−Loop Voltage Gain versus Frequency www.onsemi.com 8 1.0 M TLV431A, TLV431B, TLV431C, SCV431B, NCV431 350 Pulse Generator f = 100 kHz Output 1.5 VKA = Vref IK = 10 mA TA = 25°C (VOLTS) NOISE VOLTAGE (nV/ √ Hz) IK Iref 325 1.8 k W Output Input Input 300 50 Output 1.0 TA = 25°C 0.5 Input 0 2.0 275 0 250 10 100 100 k 1.0 k 10 k f, FREQUENCY (Hz) 0 1.0 Figure 16. Spectral Noise Density 2.0 3.0 4.0 5.0 6.0 t, TIME (ms) 8.0 9.0 10.0 Figure 17. Pulse Response 1.0 k 25 TA = 25°C I K, CATHODE CURRENT (mA) 7.0 A 20 IK R1 Stable V+ 15 CL R2 C B Stable 10 5.0 0 10 pF Stable D 100 pF 1.0 nF 0.01 mF 0.1 mF 1.0 mF 10 mF 100 mF CL, LOAD CAPACITANCE Figure 18. Stability Boundary Conditions Unstable Regions VKA (V) R1 (kW) R2 (kW) A, C Vref 0 ∞ B, D 5.0 30.4 10 Figure 19. Test Circuit for Figure 18 Stability Figures 18 and 19 show the stability boundaries and circuit configurations for the worst case conditions with the load capacitance mounted as close as possible to the device. The required load capacitance for stable operation can vary depending on the operating temperature and capacitor equivalent series resistance (ESR). Ceramic or tantalum surface mount capacitors are recommended for both temperature and ESR. The application circuit stability should be verified over the anticipated operating current and temperature ranges. www.onsemi.com 9 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 TYPICAL APPLICATIONS Vin Vin Vout Vout R1 R1 R2 ǒ Vin R2 Ǔ ǒ Ǔ Vout + 1 ) R1 V R2 ref Vout + 1 ) R1 V R2 ref Figure 20. Shunt Regulator Figure 21. High Current Shunt Regulator In Vin MC7805 Out Common Vout Vout R1 R1 R2 R2 ǒ ǒ Ǔ Ǔ Vout + 1 ) R1 V R2 ref Vout + 1 ) R1 V R2 ref V + V ) 5.0 V out(min) ref V + Vout ) V in(min) be V + V out(min) ref Figure 22. Output Control for a Three Terminal Fixed Regulator Figure 23. Series Pass Regulator www.onsemi.com 10 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 Isink Vin I sink Iout RCL Vin V + ref R S Vout RS V I out + ref R CL Figure 24. Constant Current Source Vin Figure 25. Constant Current Sink Vin Vout ǒ Vout R1 R1 R2 R2 Ǔ ǒ Ǔ V + 1 ) R1 V out(trip) R2 ref V + 1 ) R1 V out(trip) R2 ref Figure 26. TRIAC Crowbar Figure 27. SCR Crowbar www.onsemi.com 11 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 25 V Vin 1N5305 R1 LED 2.0 mA R3 5k 1% 50 k 1% 10 kW V R2 R4 1.0 M 1% 500 k 1% 10 k Calibrate 100 kW V 1.0 kW V 1.0 MW V 25 V - L.E.D. indicator is ‘ON’ when Vin is between the upper and lower limits, Range ǒ Ǔ Upper limit + ǒ1 ) R3Ǔ V R4 ref Lower limit + 1 ) R1 V R2 ref R x + V outD W Range V Figure 29. Linear Ohmmeter 38 V T1 = 330 W to 8.0 W 330 T1 8.0 W + 360 k 470 mF 1.0 mF Volume 47 k * 0.05 mF * Thermalloy * THM 6024 * Heatsink on * LP Package. −5.0 V Rx Figure 28. Voltage Monitor 56 k 25 k Tone 10 k Figure 30. Simple 400 mW Phono Amplifier www.onsemi.com 12 Vout + TLV431A, TLV431B, TLV431C, SCV431B, NCV431 AC Input DC Output 3.3 V Gate Drive 100 VCC Controller R1 3.0 k VFB C1 0.1 mF Current Sense R2 1.8 k GND Figure 31. Isolated Output Line Powered Switching Power Supply The above circuit shows the TLV431A/B/C as a compensated amplifier controlling the feedback loop of an isolated output line powered switching regulator. The output voltage is programmed to 3.3 V by the resistors values selected for R1 and R2. The minimum output voltage that can be programmed with this circuit is 2.64 V, and is limited by the sum of the reference voltage (1.24 V) and the forward drop of the optocoupler light emitting diode (1.4 V). Capacitor C1 provides loop compensation. PIN CONNECTIONS AND DEVICE MARKING TO−92 TSOP−5 1 2 3 1 NC 2 Cathode 3 5 Anode 4 Reference Reference 1 XXXMG G 1. Reference 2. Anode 3. Cathode NC XXXAYWG G TLV43 1XXX ALYWWG G SOT−23−3 3 Anode Cathode 2 (Top View) (Top View) XXX = Specific Device Code A = Assembly Location Y = Year L = Wafer Lot WW, W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) www.onsemi.com 13 XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) TLV431A, TLV431B, TLV431C, SCV431B, NCV431 ORDERING INFORMATION Device Code Package Shipping† TLV431ALPG ALP TO−92−3 (Pb−Free) 6000 / Box TLV431ALPRAG ALP TO−92−3 (Pb−Free) 2000 / Tape & Reel TLV431ALPREG ALP TO−92−3 (Pb−Free) 2000 / Tape & Reel TLV431ALPRMG ALP TO−92−3 (Pb−Free) 2000 / Ammo Pack TLV431ALPRPG ALP TO−92−3 (Pb−Free) 2000 / Ammo Pack TLV431ASNT1G RAA TSOP−5 (Pb−Free, Halide−Free) 3000 / Tape & Reel TLV431ASN1T1G RAF SOT−23−3 (Pb−Free, Halide−Free) 3000 / Tape & Reel TLV431BLPG BLP TO−92−3 (Pb−Free) 6000 / Box TLV431BLPRAG BLP TO−92−3 (Pb−Free) 2000 / Tape & Reel TLV431BLPREG BLP TO−92−3 (Pb−Free) 2000 / Tape & Reel TLV431BLPRMG BLP TO−92−3 (Pb−Free) 2000 / Ammo Pack TLV431BLPRPG BLP TO−92−3 (Pb−Free) 2000 / Ammo Pack TLV431BSNT1G RAH TSOP−5 (Pb−Free, Halide−Free) 3000 / Tape & Reel TLV431BSN1T1G RAG SOT−23−3 (Pb−Free, Halide−Free) 3000 / Tape & Reel TLV431CSN1T1G AAN SOT−23−3 (Pb−Free, Halide−Free) 3000 / Tape & Reel SCV431BSN1T1G* RAC SOT−23−3 (Pb−Free, Halide−Free) 3000 / Tape & Reel NCV431ASNT1G* ACH TSOP−5 (Pb−Free, Halide−Free) 3000 / Tape & Reel NCV431BSNT1G* AD6 TSOP−5 (Pb−Free, Halide−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *SCV, NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 14 TLV431A, TLV431B, TLV431C, SCV431B, NCV431 PACKAGE DIMENSIONS TO−92 (TO−226) LP SUFFIX CASE 29−11 ISSUE AM A B STRAIGHT LEAD BULK PACK R P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. L SEATING PLANE K D X X G J H V C SECTION X−X 1 N DIM A B C D G H J K L N P R V INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --0.250 --0.080 0.105 --0.100 0.115 --0.135 --- MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --6.35 --2.04 2.66 --2.54 2.93 --3.43 --- N A R BENT LEAD TAPE & REEL AMMO PACK B P NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. T SEATING PLANE K D X X G J V 1 C SECTION X−X N www.onsemi.com 15 DIM A B C D G J K N P R V MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.40 0.54 2.40 2.80 0.39 0.50 12.70 --2.04 2.66 1.50 4.00 2.93 --3.43 --- TLV431A, TLV431B, TLV431C, SCV431B, NCV431 PACKAGE DIMENSIONS SOT−23−3 SN1 SUFFIX CASE 318−08 ISSUE AP NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D SEE VIEW C 3 HE E DIM A A1 b c D E e L L1 HE q c 1 2 b 0.25 e q A L A1 MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10 0° MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 −−− 10 ° L1 VIEW C SOLDERING FOOTPRINT 0.95 0.037 0.95 0.037 2.0 0.079 0.9 0.035 SCALE 10:1 0.8 0.031 www.onsemi.com 16 mm Ǔ ǒinches MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083 0° INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104 10 ° TLV431A, TLV431B, TLV431C, SCV431B, NCV431 PACKAGE DIMENSIONS TSOP−5 SN SUFFIX CASE 483−02 ISSUE K NOTE 5 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. D 5X 0.20 C A B 0.10 T M 2X 0.20 T B 5 1 4 2 S 3 K B DETAIL Z G A A TOP VIEW DIM A B C D G H J K M S DETAIL Z J C 0.05 H SIDE VIEW C SEATING PLANE END VIEW MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 0_ 10 _ 2.50 3.00 SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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