SQ2328ES www.vishay.com Vishay Siliconix Automotive N-Channel 100 V (D-S) 175 °C MOSFET FEATURES • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • AEC-Q101 Qualifiedc • 100 % Rg and UIS Tested • Compliant to RoHS Directive 2002/95/EC PRODUCT SUMMARY VDS (V) 100 RDS(on) () at VGS = 10 V 0.300 ID (A) 2 Configuration Single D TO-236 (SOT-23) G 1 S 2 3 D G Top View SQ2328ES (8L)* S * Marking Code N-Channel MOSFET ORDERING INFORMATION Package SOT-23 Lead (Pb)-free and Halogen-free SQ2328ES-T1-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 100 Gate-Source Voltage VGS ± 20 Continuous Drain Current TC = 25 °C ID TC = 125 °C Continuous Source Current (Diode Conduction) Pulsed Drain Currenta Single Pulse Avalanche Current Single Pulse Avalanche Energy Maximum Power Dissipationa L = 0.1 mH TC = 25 °C Operating Junction and Storage Temperature Range V 2 1.2 IS 3.7 IDM 8 IAS 5 EAS 1.3 PD TC = 125 °C UNIT 3 1 A mJ W TJ, Tstg - 55 to + 175 °C SYMBOL LIMIT UNIT RthJA 166 RthJF 50 THERMAL RESISTANCE RATINGS PARAMETER Junction-to-Ambient PCB Mountb Junction-to-Foot (Drain) °C/W Notes a. Pulse test; pulse width 300 μs, duty cycle 2 %. b. When mounted on 1" square PCB (FR-4 material). c. Parametric verification ongoing. S11-2111-Rev. B, 07-Nov-11 1 Document Number: 67052 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2328ES www.vishay.com Vishay Siliconix SPECIFICATIONS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. VDS VGS = 0 V, ID = 250 μA 100 - - VGS(th) VDS = VGS, ID = 250 μA 2.5 3.0 3.5 VDS = 0 V, VGS = ± 20 V UNIT Static Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Source Leakage IGSS - - ± 100 VGS = 0 V VDS = 100 V - - 1 - - 50 Zero Gate Voltage Drain Current IDSS VGS = 0 V VDS = 100 V, TJ = 125 °C VGS = 0 V VDS = 100 V, TJ = 175 °C - - 150 On-State Drain Currenta ID(on) VGS = 10 V VDS5 V 5 - - VGS = 10 V ID = 1.5 A - 0.214 0.300 VGS = 10 V ID = 1.5 A, TJ = 125 °C - - 0.552 VGS = 10 V ID = 1.5 A, TJ = 175 °C - - 0.720 - 3 - - 152 190 - 28 35 - 12 15 - 3.6 5.4 - 0.9 - Drain-Source On-State Resistancea Forward Transconductanceb RDS(on) gfs VDS = 15 V, ID = 1.5 A V nA μA A S Dynamicb Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Chargec Qg Gate-Source Chargec Qgs Gate-Drain Chargec Gate Resistance Turn-On Delay Timec Rise Timec Turn-Off Delay Timec Fall Timec VGS = 0 V VGS = 10 V VDS = 25 V, f = 1 MHz VDS = 50 V, ID = 1.5 A Qgd f = 1 MHz Rg td(on) tr td(off) VDD = 50 V, RL = 33 ID 2 A, VGEN = 10 V, Rg = 1 tf - 1.2 - 0.9 1.8 2.7 - 5 8 pF nC - 10 15 - 9 14 - 6 9 - - 8 A - 0.8 1.2 V ns Source-Drain Diode Ratings and Characteristicsb Pulsed Currenta ISM Forward Voltage VSD IF = 1.5 A, VGS = 0 V Notes a. Pulse test; pulse width 300 μs, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S11-2111-Rev. B, 07-Nov-11 2 Document Number: 67052 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2328ES www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 10 8.0 VGS = 10 V thru 7 V 8 ID - Drain Current (A) 6.0 ID - Drain Current (A) VGS = 6 V 6 4 VGS = 5 V TC = 25 °C 4.0 2.0 2 TC = 125 °C VGS = 3 V 0 TC = - 55 °C 0.0 0 2 4 6 8 VDS - Drain-to-Source Voltage (V) 10 0.0 2.0 4.0 6.0 8.0 VGS - Gate-to-Source Voltage (V) 10.0 Transfer Characteristics Output Characteristics 2.0 5.0 1.6 4.0 gfs - Transconductance (S) ID - Drain Current (A) TC = - 55 °C 1.2 TC = 25 °C 0.8 0.4 TC = 125 °C 2 4 6 8 2.0 1.0 0.0 0.0 10 VGS - Gate-to-Source Voltage (V) 1.2 1.8 ID - Drain Current (A) 2.4 3.0 Transfer Characteristics Transconductance 0.6 20 40 60 80 VDS - Drain-to-Source Voltage (V) 100 ID - Drain Current (A) On-Resistance vs. Drain Current Capacitance 300 0.5 250 C - Capacitance (pF) 0.4 RDS(on) - On-Resistance (Ω) TC = 125 °C 3.0 TC = - 55 °C 0.0 0 TC = 25 °C 0.3 VGS = 10 V 0.2 0.1 200 Ciss 150 100 50 Coss 0 0.0 0 2 4 S11-2111-Rev. B, 07-Nov-11 6 8 10 Crss 0 12 3 Document Number: 67052 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2328ES www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted) 2.5 RDS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) 10 ID = 1.5 A VDS = 50 V 8 6 4 2 2 3 4 5 1.7 1.3 0.9 25 50 75 100 125 150 175 TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature 100 1.0 10 0.8 TJ = 150 °C 1 TJ = 25 °C 0.1 0.01 0.001 0.0 0 Qg - Total Gate Charge (nC) RDS(on) - On-Resistance (Ω) IS - Source Current (A) 1 VGS = 10 V 0.5 - 50 - 25 0 0 ID = 1.5 A 2.1 0.6 TJ = 150 °C 0.4 0.2 TJ = 25 °C 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD - Source-to-Drain Voltage (V) 0 2 4 6 8 VGS - Gate-to-Source Voltage (V) 10 Source Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 135 0.5 ID = 1 mA VDS - Drain-to-Source Voltage (V) VGS(th) Variance (V) 0.2 - 0.1 - 0.4 ID = 5 mA - 0.7 ID = 250 μA - 1.0 - 1.3 - 50 - 25 0 25 50 75 100 125 150 128 121 114 107 100 - 50 - 25 175 0 25 50 75 100 125 150 175 TJ - Temperature (°C) TJ - Junction Temperature (°C) Threshold Voltage Drain Source Breakdown vs. Junction Temperature S11-2111-Rev. B, 07-Nov-11 4 Document Number: 67052 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2328ES www.vishay.com Vishay Siliconix THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 100 IDM Limited ID - Drain Current (A) 10 100 μs 1 1 ms 10 ms 0.1 0.01 0.01 Limited by RDS(on)* BVDSS Limited TC = 25 °C Single Pulse 100 ms 1 s, 10 s, DC 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 PDM 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 166 °C/W 0.02 3. TJM - TF = PDMZthJF (t) Single Pulse 4. Surface Mounted 0.01 10 -4 10 -3 10 -2 10 -1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Ambient S11-2111-Rev. B, 07-Nov-11 5 Document Number: 67052 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SQ2328ES www.vishay.com Vishay Siliconix THERMAL RATINGS (TA = 25 °C, unless otherwise noted) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 1 10 100 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Foot Note • The characteristics shown in the two graphs - Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C) - Normalized Transient Thermal Impedance Junction-to-Foot (25 °C) are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?67052. S11-2111-Rev. B, 07-Nov-11 6 Document Number: 67052 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SOT-23 (TO-236): 3-LEAD b 3 E1 1 E 2 e S e1 D 0.10 mm C 0.004" A2 A C q Gauge Plane Seating Plane Seating Plane C A1 Dim 0.25 mm L L1 MILLIMETERS Min INCHES Max Min Max 0.044 A 0.89 1.12 0.035 A1 0.01 0.10 0.0004 0.004 A2 0.88 1.02 0.0346 0.040 b 0.35 0.50 0.014 0.020 c 0.085 0.18 0.003 0.007 D 2.80 3.04 0.110 0.120 E 2.10 2.64 0.083 0.104 E1 1.20 1.40 0.047 e 0.95 BSC e1 L 1.90 BSC 0.40 L1 q 0.0748 Ref 0.60 0.016 0.64 Ref S 0.024 0.025 Ref 0.50 Ref 3° 0.055 0.0374 Ref 0.020 Ref 8° 3° 8° ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479 Document Number: 71196 09-Jul-01 www.vishay.com 1 AN807 Vishay Siliconix Mounting LITTLE FOOTR SOT-23 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286), for the basis of the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint . In converting this footprint to the pad set for a power device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. ambient air. This pattern uses all the available area underneath the body for this purpose. 0.114 2.9 0.081 2.05 0.150 3.8 0.059 1.5 0.0394 1.0 0.037 0.95 FIGURE 1. Footprint With Copper Spreading The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional function of providing the thermal connection from the package to the PC board. The total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. Also, heat spreads in a circular fashion from the heat source. In this case the drain pin is the heat source when looking at heat spread on the PC board. Figure 1 shows the footprint with copper spreading for the SOT-23 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the Document Number: 70739 26-Nov-03 Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device. www.vishay.com 1 Application Note 826 Vishay Siliconix 0.049 (1.245) 0.029 0.022 (0.559) (0.724) 0.037 (0.950) (2.692) 0.106 RECOMMENDED MINIMUM PADS FOR SOT-23 0.053 (1.341) 0.097 (2.459) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72609 Revision: 21-Jan-08 www.vishay.com 25 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000