MC14028B BCD-To-Decimal Decoder Binary-To-Octal Decoder The MC14028B decoder is constructed so that an 8421 BCD code on the four inputs provides a decimal (one−of−ten) decoded output, while a 3−bit binary input provides a decoded octal (one−of−eight) code output with D forced to a logic “0”. Expanded decoding such as binary−to−hexadecimal (one−of−sixteen), etc., can be achieved by using other MC14028B devices. The part is useful for code conversion, address decoding, memory selection control, demultiplexing, or readout decoding. http://onsemi.com SOIC−16 D SUFFIX CASE 751B Features • Diode Protection on All Inputs • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving Two Low−power TTL Loads or One Low−Power • • • • • Schottky TTL Load Over the Rated Temperature Range Positive Logic Design Low Outputs on All Illegal Input Combinations Similar to CD4028B NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable This Device is Pb−Free and is RoHS Compliant MAXIMUM RATINGS (Voltages Referenced to VSS) Parameter Symbol Value Unit VDD −0.5 to +18.0 V Vin, Vout −0.5 to VDD + 0.5 V Input or Output Current (DC or Transient) per Pin Iin, Iout ± 10 mA Power Dissipation per Package (Note 1) PD 500 mW Ambient Temperature Range TA −55 to +125 °C Storage Temperature Range Tstg −65 to +150 °C Lead Temperature (8−Second Soldering) TL 260 °C DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) August, 2014 − Rev. 9 Q4 1 16 VDD Q2 2 15 Q3 Q0 3 14 Q1 Q7 4 13 B Q9 5 12 C Q5 6 11 D Q6 7 10 A VSS 8 9 Q8 MARKING DIAGRAM 16 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. © Semiconductor Components Industries, LLC, 2014 PIN ASSIGNMENT 1 14028BG AWLYWW 1 A WL YY, Y WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Publication Order Number: MC14028B/D MC14028B BLOCK DIAGRAM 8421 BCD INPUTS 3-BIT BINARY INPUTS 10 A 13 B 12 C 11 D 3 14 2 15 1 6 7 4 9 5 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 OCTAL DECODED OUTPUTS DECIMAL DECODED OUTPUTS VDD = PIN 16 VSS = PIN 8 TRUTH TABLE D C B A Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 1 0 1 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ORDERING INFORMATION Package Shipping† MC14028BDG SOIC−16 (Pb−Free) 48 Units / Rail MC14028BDR2G SOIC−16 (Pb−Free) 2500 / Tape & Reel NLV14028BDR2G* SOIC−16 (Pb−Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 2 MC14028B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) −55_C 25_C VDD 125_C Symbol Vdc Min Max Min Typ (Note 2) Max Min Max Unit − − − 0.05 0.05 0.05 − − − 0 0 0 0.05 0.05 0.05 − − − 0.05 0.05 0.05 Vdc VOL 5.0 10 15 5.0 10 15 4.95 9.95 14.95 − − − 4.95 9.95 14.95 5.0 10 15 − − − 4.95 9.95 14.95 − − − Vdc VOH VIL 5.0 10 15 − − − 1.5 3.0 4.0 − − − 2.25 4.50 6.75 1.5 3.0 4.0 − − − 1.5 3.0 4.0 VIH 5.0 10 15 3.5 7.0 11 − − − 3.5 7.0 11 2.75 5.50 8.25 − − − 3.5 7.0 11 − − − IOH 5.0 5.0 10 15 –3.0 –0.64 –1.6 –4.2 − − − − –2.4 –0.51 –1.3 –3.4 –4.2 –0.88 –2.25 –8.8 − − − –1.7 –0.36 –0.9 –2.4 − − − − 5.0 10 15 0.64 1.6 4.2 − − − 0.51 1.3 3.4 0.88 2.25 8.8 − − − 0.36 0.9 2.4 − − − mAdc IOL Input Current Iin 15 − ±0.1 − ±0.00001 ±0.1 − ±1.0 mAdc Input Capacitance (Vin = 0) Cin − − − − 5.0 7.5 − − pF Quiescent Current (Per Package) IDD 5.0 10 15 − − − 5.0 10 20 − − − 0.005 0.010 0.015 5.0 10 20 − − − 150 300 600 mAdc Total Supply Current (Note 3, 4) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) IT 5.0 10 15 Characteristic Output Voltage Vin = VDD or 0 “0” Level “1” Level Vin = 0 or VDD Input Voltage “0” Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) “1” Level (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Vdc Vdc mAdc Source Sink IT = (0.3 mA/kHz) f + IDD IT = (0.6 mA/kHz) f + IDD IT = (0.9 mA/kHz) f + IDD mAdc Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3. The formulas given are for the typical characteristics only at 25_C. 4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL – 50) Vfk where: IT is in mA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001. SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25_C) Characteristic Symbol Output Rise and Fall Time tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns tTLH, tTHL Propagation Delay Time tPLH, tPHL = (1.7 ns/pF) CL + 215 ns tPLH, tPHL = (0.66 ns/pF) CL + 97 ns tPLH, tPHL = (0.5 ns/pF) CL + 65 ns tPLH, tPHL VDD Min Typ (Note 6) Max 5.0 10 15 − − − 100 50 40 200 100 80 5.0 10 15 − − − 300 130 90 600 260 180 ns ns 5. The formulas given are for the typical characteristics only at 25_C. 6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. http://onsemi.com 3 Unit MC14028B 20 ns Inputs B, C, and D switching in respect to a BCD code. 20 ns VDD 90% INPUT A All outputs connected to respective CL loads. f in respect to a system clock. 50% 10% VSS 1/f 20 ns 20 ns VDD 90% INPUT C 50% 10% Inputs A, B, and D low. VSS tPLH tPHL VOH 90% Q4 50% 10% VOL tTLH tTHL Figure 1. Dynamic Signal Waveforms Q0 Q1 A Q2 Q3 B Q4 Q5 C Q6 Q7 D Q8 Q9 LOGIC DIAGRAM INPUTS APPLICATIONS INFORMATION D Expanded decoding can be performed by using the MC14028B and other CMOS Integrated Circuits. The circuit in Figure 2 converts any 4−bit code to a decimal or hexadecimal code. The accompanying table shows the input binary combinations, the associated “output numbers” that go “high” when selected, and the “redefined output numbers” needed for the proper code. For example: For the combination DCBA = 0111 the output number 7 is redefined for the 4−bit binary, 4−bit gray, excess−3, or excess−3 gray codes as 7, 5, 4, or 2, respectively. Figure 3 shows a 6−bit binary 1−of−64 decoder using nine MC14028B circuits and two MC14069UB inverters. The MC14028B can be used in decimal digit displays, such as, neon readouts or incandescent projection indicators as shown in Figure 4. D C B A D Q0 15 B A C B A MC14028B MC14028B Q9 C -8 Q9 Q0 15 -0 OUTPUT NUMBERS Figure 2. Code Conversion Circuit and Truth Table http://onsemi.com 4 MC14028B Code and Redefined Output Numbers B A 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 1 2 3 0 1 3 2 0 0 0 0 0 1 1 1 1 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 5 6 7 7 6 4 5 1 2 3 4 1 1 1 1 0 0 0 0 0 0 1 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 9 10 11 15 14 12 13 5 6 7 8 1 1 1 1 1 1 1 1 0 0 1 1 0 1 0 1 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 13 14 15 8 9 11 10 9 4221 C Aiken D Decimal Excess−3 Gray Output Numbers Excess−3 Inputs 4−Bit Binary 4−Bit Gray Hexadecimal 0 3 0 1 2 3 0 1 2 4 4 3 4 1 2 5 6 9 5 5 6 8 7 6 7 8 9 INPUTS A B C D E F INHIBIT A B C MC14028B -D Q0 (NO SELECTION) Q9 A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D MC14028B MC14028B MC14028B MC14028B MC14028B MC14028B MC14028B MC14028B Q0 Q9 Q0 Q9 Q0 Q9 Q0 Q9 Q0 Q9 Q0 Q9 Q0 Q9 Q0 Q9 0 7 8 *1/6 MC14069UB 15 16 23 24 31 32 39 40 47 48 55 56 63 64 OUTPUTS (SELECTED OUTPUT IS HIGH) Figure 3. Six−Bit Binary 1−of−64 Decoder A B MC14028B C D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 APPROPRIATE VOLTAGE INCANDESCENT DISPLAY APPROPRIATE VOLTAGE NEON DISPLAY OR 0 9 9 Figure 4. Decimal Digit Display Application http://onsemi.com 5 2 1 0 7 8 9 MC14028B PACKAGE DIMENSIONS SOIC−16 D SUFFIX CASE 751B−05 ISSUE K −A− 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 −B− 1 P 8 PL 0.25 (0.010) 8 M B S DIM A B C D F G J K M P R G R K F X 45 _ C −T− SEATING PLANE J M D MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 PL 0.25 (0.010) M T B S A S SOLDERING FOOTPRINT* 8X 6.40 16X 1 1.12 16 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. 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