NL7SZ18 1-to-2 Demultiplexer with 3-State Deselected Output Features • High−Speed Propagation Delay • • • • • • tPD 2.5 nS (Typ), Load 50 pF @ 5.0 V Power Down Impedance Outputs in High−Z Output Drive Capability 32 mA @ 5.0 V Broad VCC Operating Range 1.65 V to 5.5 V Surface Mount Technology SC−70, 6−Lead and UDFN6 Packaging OVT* on Inputs/Outputs Pb−Free Package is Available MARKING DIAGRAMS 1 SOT−363/SC70−6/SC−88 DF SUFFIX CASE 419B LD M G G 1 TM G 1 UDFN6 MU SUFFIX CASE 517AA LD, T M G = Device Marking = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. Typical Applications • • • • http://onsemi.com M The NL7SZ18 is a high−performance non−inverting 1−to−2 demultiplexer. With the Select input [S] at Low, data at A is passed to Y0 and Y1 is set to high impedance. With the Select input [S] at High, data at A is passed to Y1 and Y0 is set to high impedance. The device operates over the voltage range from 1.65 V to 5.5 V. This device has been optimized for on−board buffering applications and offers mixed (1.65 V, 2.3 V, 3.0 V and 5.5 V) voltage capability by providing over voltage tolerance (OVT*) circuitry on I/O pins. PIN ASSIGNMENT Cell Phones PDAs Digital Cameras Video Cameras Important Information • ESD Protection: MM >200 V, Human Body Model >2000 V • Latch−Up Max Rating: 300 mA • Pin−to−Pin Compatible with NC7SZ18 S 1 6 Y0 GND 2 5 VCC A 3 4 Y1 *Over Voltage Tolerance (OVT) enables input and output pins to function outside (higher) of their operating voltages, with no damage to the devices or to signal integrity. (TOP VIEW) TRUTH TABLE PIN/FUNCTION TABLE Input Output Pin Function S A A Data Input Y0 Y1 S Demultiplexer Select Y0 Output 1 L L H H L H L H L H Z Z Z Z L H Y1 Output 2 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2010 August, 2010 − Rev. 9 1 Publication Order Number: NL7SZ18/D NL7SZ18 MAXIMUM RATINGS Rating Symbol Value Unit DC Supply Voltage VCC −0.5 to +7.0 V DC Input Voltage VIN −0.5 to +7.0 V VOUT −0.5 to +7.0 V DC Input Diode Current @ V1 t −0.5 V IIK −50 mA DC Output Diode Current @ V1 t −0.5 V IOK −50 mA DC Output Sink Current IOUT "50 mA DC Supply Current per Supply Pin ICC "100 mA DC Ground Current per Ground Pin IGND "100 mA Storage Temperature Range TSTG −65 to +150 °C DC Output Voltage Lead Temperature, 1 mm from Case for 10 Seconds TL 260 °C Junction Temperature Under Bias TJ +150 °C Thermal Resistance (Note 1) qJA 250 °C/W Power Dissipation in Still Air at 85°C PD 180 mW MSL Level 1 − FR UL 94 V−0 @ 0125 in − VESD > 2000 > 200 n/a V Moisture Sensitivity Flammability Rating Oxygen Index: 28 to 34 ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. RECOMMENDED OPERATING CONDITIONS Rating Symbol Value Unit DC Supply Voltage VCC 1.65 to 5.5 V DC Supply Voltage, Data Retention VCC 1.5 to 5.5 V Input Voltage VIN 0 to 5.5 V VOUT 0 to 5.5 V Output Voltage Operating Temperature Input Rise and Fall Times VCC @ 1.8 " 0.15 V VCC @ 2.5 " 0.2 V VCC @ 3.3 " 0.3 V VCC @ 5.0 " 0.5 V Thermal Resistance TA −55 to 125 °C tr, tf 0 to 20 0 to 20 0 to 10 0 to 5 nS/V qJA 350 °C/W ORDERING INFORMATION Device Order Number NL7SZ18DFT2 Package Shipping† SC70−6 3000 / Tape & Reel NL7SZ18DFT2G SC70−6 (Pb−Free) 3000 / Tape & Reel NL7SZ18MUR2G UDFN6 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 NL7SZ18 DC ELECTRICAL CHARACTERISTICS Parameter Condition Symbol TA = 255C VCC (V) Min 0.75 VCC 0.70 VCC Typ TA = −555C to 1255C Max Min High−Level Input Voltage VIH 1.65−1.95 2.3−5.5 Low−Level Output Voltage VIL 1.65−1.95 2.3−5.5 VOH 1.65 2.3 3.0 4.5 1.55 2.20 2.90 4.40 1.65 2.30 3.00 4.50 1.55 2.20 2.90 4.40 1.65 2.3 3.0 3.0 4.5 1.29 1.90 2.40 2.30 3.80 1.52 2.15 2.80 2.68 4.20 1.29 1.90 2.40 2.30 3.80 High−Level Output Voltage VIN = VIH IOH = −100 ma IOH = −4.0 mA IOH = −8.0 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA Low−Level Output Voltage VIN = VIL IOL = 100 ma VOL IOL = 4.0 mA IOL = 8.0 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA Max 0.75 VCC 0.70 VCC 0.25 VCC 0.30 VCC Unit V 0.25 VCC 0.30 VCC V V 1.65 2.3 3.0 4.5 0.0 0.0 0.0 0.0 0.10 0.10 0.10 0.10 0.10 0.10 0.10 0.10 1.65 2.3 3.0 3.0 4.5 0.08 0.10 0.15 0.22 0.22 0.24 0.30 0.40 0.55 0.55 0.24 0.30 0.40 0.55 0.55 V Input Leakage Current VIN = 5.5 V, GND IIN 0.0 to 5.5 "0.1 "1.0 mA Output High−Z Current VIN = VIH or VIL 0 t Vout v 5.5 V IOZ 1.65 to 5.5 "0.5 "5.0 mA Power−Off Leakage Current VIN or VCC = 5.5 V IOFF 0.0 1.0 10 mA Quiescent Supply Current VIN = 5.5 V, GND ICC 1.8 to 5.5 1.0 10 mA http://onsemi.com 3 NL7SZ18 AC ELECTRICAL CHARACTERISTICS TA = −555C to 1255C TA = 255C Parameter Propagation Delay A to Y0 or Y1 Output Enable Time Condition CL = 15 pF RD = 1.0 MW S = OPEN Figure Figures 1&3 VCC Min Typ Max Min Max Unit tPLH tPHL 1.8 " 0.15 2.5 " 0.2 3.3 " 0.3 5.0 " 0.5 2.0 1.0 0.8 0.5 6.3 3.6 2.7 2.0 10.1 5.7 4.0 3.1 2.0 1.0 0.8 0.5 10.5 6.0 4.3 3.3 nS 3.3 " 0.3 5.0 " 0.5 1.2 0.8 3.4 2.5 4.9 3.9 1.2 0.8 5.4 4.2 nS CL = 50 pF RD = 500 W S = OPEN Figures 1&3 CL = 50 pF RD, RU = 500 W S = GND for tPZH S = VIN for tPZL VI = 2 x VCC Figures 1&3 tPZL tPZH 1.8 " 0.15 2.5 " 0.2 3.3 " 0.3 5.0 " 0.5 3.0 1.8 1.2 0.8 6.9 4.2 3.2 2.5 12 6.8 5.0 4.0 3.0 1.8 1.2 0.8 12.5 7.3 5.5 4.3 nS CL = 50 pF RD, RD = 500 W S = GND for tPHZ S = VIN for tPLZ VI = 2 x VCC Figures 1&3 tPLZ tPHZ 1.8 " 0.15 2.5 " 0.2 3.3 " 0.3 5.0 " 0.5 2.5 1.5 0.8 0.3 6.0 4.0 2.9 1.8 10 6.8 4.9 3.5 2.5 1.5 0.8 0.3 10.5 7.1 5.3 3.7 nS CIN COUT OPEN 3.3 2.5 4.0 pF CPD 3.3 5.0 16 19.5 pF Input Capacitance Output Capacitance Power Dissipation Capacitance Symbol Note 5 Figure 2 5. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle (see Figure 2). CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD) (VCC) (fIN) + (ICCDstatic). VI OPEN GND VCC A RU OUTPUT A S INPUT CL A OUTPUT RD Figure 1. AC Test Circuit Figure 2. ICCD Test Circuit CL Includes Load and Stray Capacitance Input PRR = 1.0 MHz; tW = 500 nS Input = AC Waveform; tr = tf = 1.8 nS PRR = 10 MHz; Duty Cycle = 50% S Input = GND or x http://onsemi.com 4 NL7SZ18 tr = 3 nS tf = 3 nS 90% 50% A Input VCC 90% 50% 10% 10% tPLH GND tPHL VOH 50% 50% Output VOL IR = tF = 3 nS 90% S Input 50% 50% 10% 10% tPZL Output VCC 90% GND tPLZ 50% VOL + 0.3 V tPHZ tPZH Output VOH VOH − 0.3 V 50% Figure 3. AC Waveforms http://onsemi.com 5 VOL NL7SZ18 PACKAGE DIMENSIONS SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE W NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419B−01 OBSOLETE, NEW STANDARD 419B−02. D e 6 5 4 1 2 3 HE DIM A A1 A3 b C D E e L HE −E− b 6 PL 0.2 (0.008) M E M MILLIMETERS MIN NOM MAX 0.80 0.95 1.10 0.00 0.05 0.10 0.20 REF 0.10 0.21 0.30 0.10 0.14 0.25 1.80 2.00 2.20 1.15 1.25 1.35 0.65 BSC 0.10 0.20 0.30 2.00 2.10 2.20 A3 C A A1 L SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 INCHES NOM MAX 0.037 0.043 0.002 0.004 0.008 REF 0.004 0.008 0.012 0.004 0.005 0.010 0.070 0.078 0.086 0.045 0.049 0.053 0.026 BSC 0.004 0.008 0.012 0.078 0.082 0.086 MIN 0.031 0.000 NL7SZ18 PACKAGE DIMENSIONS UDFN6, 1.2x1.0, 0.4P CASE 517AA−01 ISSUE D EDGE OF PACKAGE PIN ONE REFERENCE 2X 0.10 C L1 ÉÉ ÉÉ E DETAIL A Bottom View (Optional) TOP VIEW 2X EXPOSED Cu 0.10 C (A3) 0.10 C A1 A 10X 0.08 C ÉÉÉ ÉÉÉ A3 DETAIL B Side View (Optional) 5X MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.30 0.40 0.00 0.15 0.40 0.50 MOUNTING FOOTPRINT* 6X C A1 DIM A A1 A3 b D E e L L1 L2 MOLD CMPD SEATING PLANE SIDE VIEW 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B D 6X 0.42 0.22 L 3 L2 6X b 0.10 C A B 0.05 C 6 0.40 PITCH 4 e NOTE 3 1.07 DIMENSIONS: MILLIMETERS BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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